JPH0235846A - Loop communicating system - Google Patents

Abstract

PURPOSE:To reorganize a loop with a simple processing at the time of a fault such as the disconnection of a transmission path and the trouble of station by receiving a frame from the other transmission path when the frame cannot be received from the currently used transmission path. CONSTITUTION:Each station consists of two sets of frame control parts 102 and 102 corresponding to respective duplicate transmission paths 3, an exchange control part 104, a CPU 106, a memory 108, plural interface parts 110,.... When the fault such as the disconnection is generated on one of the transmission paths 3 which receives information, and the frame cannot be sent, the CPU 106 instructs a receiving switch control part to select the other frame control part 102 instead of the receiving frame control path 102 which is selected by the reception switching part until then, Thus, the frame on the opposite side to that where the disconnection, etc., are generated can be made into the frame to normally receive the frame the other transmission path 3.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a loop communication system in which, for example, loop communication systems having different transmission speeds are interconnected.

(Prior art) With the development of information processing technology, various systems have been developed in which a plurality of distributed information processing devices are connected to an information transmission path through a station, and information is transmitted between these information processing devices. has been done. Moreover, in recent years, there has been a demand for the development of more advanced networks by integrating or combining various independently existing networks.

FIG. 10 is a diagram showing a schematic configuration of a loop communication system among such systems. The loop communication system shown in the figure is formed by connecting a plurality of stations 1a11b, . . . in a loop through a transmission path 2. Terminal devices such as personal computers and PBXs are connected to each station, and communication is performed between these terminal devices.

FIG. 11 is a diagram showing an example of a frame format used in communication of the system shown in FIG. 10. In the figure, the frame synchronization area indicates the beginning of the frame, the control communication area is used for communicating control information between each station, and the data communication area is composed of multiple time slots and is used as a communication path between each terminal. .

By the way, in such a loop communication system,
In order to cope with failures such as disconnection of the transmission line or failure of a station, the transmission line is generally duplicated, and when a failure occurs, loopback is performed and the loop is reorganized.

However, in such a loopback method, the control station needs to recognize the above-mentioned failure and issue a loopback instruction to each station, so there is a problem that the burden on the control station is large and the processing time becomes long.

(Problem to be Solved by the Invention) As described above, in loop communication systems, a loopback method has traditionally been adopted in order to deal with failures such as disconnection of the transmission line or failure of the station, but this method imposes a burden on the control station. This increases the processing time.

The present invention has been made to solve such problems, and an object of the present invention is to provide a loop communication system that can perform loop reorganization with simple processing in response to failures such as disconnections in transmission lines or failures in stations. It is an object.

[Structure of the Invention] (Means for Solving the Problems) The present invention connects a plurality of stations including a control station in a loop through a duplex transmission path, and connects a synchronization area for establishing frame synchronization and A frame including a control communication area for transmitting and receiving control information between the stations and a data communication area for transmitting and receiving data information between the stations is circulated in different directions on the duplex transmission path, and each of the stations Each duplex transmission path has means for transmitting the frame to the transmission path based on a clock generated from an independently given frequency source, and means for receiving the frame from the transmission path. and each station has the above 2 during normal operation.
The frame is transmitted to each duplicated transmission path, and when it becomes impossible to receive the frame from one of the transmission paths in use, the frame is received from the other transmission path. be.

(Function) In the present invention, since each station can transmit frames to the transmission path based on the clock generated from a frequency source independently given, when it becomes impossible to receive frames from the transmission path in use, frame can be received from the transmission path. As a result, loop reorganization can be performed with simple processing in response to a failure such as a disconnection of a transmission line or a failure of a station.

(Example) Hereinafter, an example of the present invention will be described in detail based on the drawings.

FIG. 1 is a schematic diagram of the loop communication system of this embodiment.

The loop communication system shown in the figure includes a first loop communication system 4 having a transmission line 3 with a high transmission rate of about 1.6 Gbps, and a transmission line 5 with a transmission rate of about loOMbps to 400 Mbps. It accommodates a plurality of second loop communication systems 6a, 6b, . . . Note that the transmission lines 3 are each duplicated for failure countermeasures, and one of them is always used.

In the first loop communication system 4, the control station 7 has its own frequency source and causes frames having the frame format shown in FIG. 2 to circulate in the duplicated transmission path 3 in different directions. When each station 8 receives such a frame,
After reducing the speed to 1/1B by serial-to-parallel conversion, the preamble length of each channel in the control communication data and data communication area in the synchronization area is controlled. Then, after passing through p+po, the first loop communication system 4 is
It is output to the transmission path 3 at. In addition, each station 7.8...
normally transmits frames to each duplexed transmission path 3. In addition, the stations 8.8... are connected to the first loop communication system 4 and the second loop communication systems 6a, 6b.
Accommodates...

The frame format in the first loop communication system 4 shown in FIG. 2 includes a synchronization area (including a control communication area),
Consists of data communication areas allocated to CH1 to CH15. One frame consists of 16 bits, with 1 bit allocated to the synchronization area (including the control communication area) and 1 bit allocated to each channel in the data communication area. Therefore, the bandwidth of each region and channel is 1/1G of the communication capacity (bandwidth) of the first loop communication system 4. Note that the band of each channel in the data communication area is different from that of the second loop communication system 6a, 6.
It is assumed that the band is the same or higher than the band b....

The synchronization field is defined by a specific synchronization pattern on the sender side, e.g. '0
101XX010101XXOI... is generated,
As long as the receiving side receives this synchronization pattern correctly, it determines that synchronization is established. "Xx" included in this synchronization pattern is a control communication area, in which control information is communicated between the stations 7, 8, 8, . . . belonging to the first loop communication system 4. The data communication area is used as a transparent transmission path for the second loop communication systems 6a, 6b, .

In the second loop communication system 6 a s 6 b..., each station 8 a s... 8b,... has a frequency source independently. Each station 8 a s...
8b, . . . absorb the difference in clock frequency caused by different frequency sources of each station by adjusting the preamble base, and prevent data slippage.

FIG. 3 shows such a second loop communication system 6a, 6.
b... shows the frame format. The frame shown in the figure is composed of a preamble, a frame synchronization area, and a data communication area.

The frame synchronization area is an area indicating the beginning of the frame, and uses a specific pattern that does not appear in other areas of the frame. The control communication area is the second loop communication system 6a, 6
This is an area where control information is communicated between stations 8a, 8b, . . . belonging to stations 8a, s, 8b, .

Each station 8a of the second loop communication system 6a, 6b...
,... 8b,... has a FIFO in which data is written using a clock extracted from a signal generated at an upstream station, and data is read using a clock from a frequency source of the own station.
The number of preamble groups is increased or decreased depending on the direction of displacement of the delay amount of P IFO. In other words, if the delay amount of the ptpo part is in the direction of decreasing, the preamble group is decreased and the FI
While the preamble passes through the FO section, the same data is read twice on the output side of the FIFO section, thereby preventing a decrease in the amount of delay in the ptpo section. Also, if the delay amount of the FIFO section is increasing, the number of preamble groups is increased, and data writing is stopped on the input side of the p+po section while the preamble is passing through the FIFO section. Prevent increase in delay amount. That is, the second loop communication system 6a, 6
Each of the stations 8a, s, 8b, . . .b, .

Further, such a preamble group adjustment function is also provided for each channel in the stations 7, 8, . . . of the first loop communication system 4.

Now, in this embodiment, the following failure recovery operation is performed.

That is, in the first loop communication system 4,
As shown in FIG. 3, if a disconnection occurs in both of the duplicated transmission paths 3 at the same time, some stations will be unable to receive frames from one of the transmission paths 3 in use. For example, transmission line 3
When using the inner side as the station 8, the station 8 will not be able to receive the frame. At this time, the station 8 switches the receiving section and uses the frame from the outer transmission path 3 as a frame for normal communication. As a result, as seen from the station 8 of (2), the outer transmission line 3 becomes a receiving transmission line, and the inner transmission line 3 becomes a transmission line, and the loop is reorganized.

In other words, the conventional loopback method used in such cases places a burden on the control station and increases the processing time, but in this embodiment, the station downstream of the disconnection is simply Since all you have to do is perform the following processing, you can easily reorganize the loop.

Hereinafter, the configuration of each station will be explained in detail in order to clarify such functions and effects.

FIG. 4 is a block diagram showing the configuration of the stations of the first loop communication system 4, in which two sets of frame control units 102 and 102, transmission/reception control units 104, It is composed of a CPU 10G, a memory 108, a plurality of interface units 110, and so on.

Each frame control unit 102 has the function of establishing frame synchronization from the signal from the first transmission path 3 and supplying the received data of the control channel and the communication channel to the transmission/reception control unit 104, and the function of supplying the transmission data from the transmission/reception control unit 104. It has a function of adding a frame synchronization pattern and sending it to the first transmission path 3.

FIG. 5 is a block diagram showing the configuration of the frame control section 102, in which the receiving section 112, the transmitting section 113, the selector section 11
4, serial-to-parallel converter 115, transmission switch unit 11B, first
and second frame monitoring units 117 and 118, control data extraction unit 119, synchronization pattern generation unit 120, ptpo
section 121, FIFO delay control section 122, preamble generation section 123, parallel/serial conversion section 124, timing control section 1
25 and a frequency source 126.

The receiving section 112 extracts tarock from the received data from the first transmission line 3 and outputs the received data and clock to the serial/parallel converting section 115. The serial/parallel converter 115 is the first
The serial data is converted into parallel data based on the timing signal and clock from the frame monitoring section 117, and the received data, which is the parallel data, is output to the transmission/reception control section 104, the transmission switch section 11B, and the first frame monitoring section 117. . The first frame monitoring section 117 detects a frame synchronization pattern, outputs this timing signal to the serial/parallel conversion section 115, and outputs synchronization area data to the control data extraction section 119. The control data extraction unit 119 extracts control data from the synchronization area data and outputs this control data to the transmission/reception control unit 104. The reception switch section 116 bypasses channels unrelated to the own station among the reception data sent from the serial/parallel conversion section 115 to the FIFO section 121, and when there is a transmission request from the transmission/reception control section 104, the reception switch section 116 bypasses the reception data sent from the serial/parallel conversion section 115 to the FIFO section 121. F the data
It is sent to the IFO section 121. The PIFO unit 121 reads data from the transmission switch unit 118 using its own frequency source,
It is output to the selector section 114.

Switch to sending data. The FIFO delay control section 122 and the timing control section 125 control the selector section 114, and the C.
The preamble lengths of H1 to CH15 are varied. The synchronization pattern generator 120 generates a synchronization pattern.

The parallel-to-serial converter 124 converts the parallel data output from the selector 114 into serial data and outputs the serial data to the transmitter 113. The timing control unit 125 provides the selector unit 114 with switching timing, the preamble generation unit 123 with preamble generation timing, and the parallel-to-serial conversion unit 124 with parallel data latch timing.

FIG. 6 is a block diagram showing the configuration of the transmission/reception control section 104, including the control data reception section 128 and the control data transmission section 13.
0, reception switch section 132, transmission switch section 134, transmission switch control section 13B, reception switch control section 138,
It is composed of a selector 140.

The control data receiving unit 128 receives the control data, transfers the received data to the memory 108, and notifies CPoloB that the control data has been received. When there is a transmission request from the CPU 10G, the control data transmitting unit 130 transmits control data to the control communication area when it detects that the control communication area is vacant. The reception switch unit 132 selects to which boat the data communication area (CHI-15) of the received data is allocated. The transmission switch section 134 outputs the transmission data from the boat to both of the duplexed transmission paths 3 via each frame control section 102 and 102, and outputs it to which channel (CHI to 15) in the data communication area. Choose one.

The operation of these switches is performed by the CPU 10B via the transmission and reception switch control units 13B and 138. It is configured to have a function to perform conversion.

FIG. 7 is a block diagram showing the configuration of the stations of the second loop communication system 6a, 6b, . . .
6. Transmission/reception control unit 18g, CPU 190. Memory 19
2. Consists of a plurality of terminal interface units 194...

The frame control unit 18B controls the second transmission path 5a15b...
・A function that establishes frame synchronization from the signal from and supplies received data in the control area and data communication area to the transmission/reception control unit 188, and adds a frame synchronization pattern and a preamble to the transmission data from the transmission/reception control unit 188. It has a function of transmitting data to the second transmission paths 5a, 5b, . . .

FIG. 8 is a block diagram showing the configuration of the frame control section 186, which includes a receiving section 19B, a FIFO section 200, a FIFO delay control section 201, a serial/parallel converting section 202, and a latch section 204.
, frame monitoring section 20B, byte counter section 208, frequency source 210, reception slot counter section 212, timing control section 214, synchronization pattern generation section 21B, first and second selector sections 218 and 220, parallel/serial conversion section 2
22, a preamble generator 224, and a transmitter 226.

The receiving section 196 extracts the clock from the serial data on the second transmission lines 5a, 5b... and sends the data and clock to F.
Output to the IFO section 200. FIFO delay control section 201
monitors the amount of delay of the FIFO, and if the amount of delay of the FIFO is in the direction of decreasing, it notifies the timing control section, and the timing control section generates a timing to reduce the preamble length in the data to be output to the transmission data. . FIFO
The delay control unit 201 controls the same data to be read twice on the output side of the FIFO unit while the preamble is passing through the FIFO unit. Further, the FIFO delay control unit 201
If the delay amount of p+po is increasing, the timing control unit is notified, and the timing control unit generates a timing to increase the preamble length in the data to be output to the transmission data. The FIFO delay control unit 201 stops writing to the input side of the ptpo unit while the preamble passes through the ptpo unit, thereby preventing a decrease in the amount of delay in the FIFO unit. The FIFO section reads data received from the second transmission paths 5a, 5b, . The serial/parallel converter 202 converts the serial data output from the FIFO unit 200 into parallel data with the bit width of the slot (8 bits), and converts the serial data output from the FIFO unit 200 into parallel data with the slot bit width (8 bits).
Output to. When the frame monitoring section 20B detects a frame synchronization pattern, it resets the byte counter section 208. Byte counter unit 208 counts clocks 8
The latch timing is given to the latch unit 204 by the counter. The latch unit 204 latches the data output from the serial/parallel converter 202 at the timing of the clock output from the byte counter unit 208 and outputs the data. The reception slot counter section 212 counts the output of the latch timing clock output from the byte counter section 212, and controls the transmission/reception control section 18.
8, the slot number corresponding to the slot in the data communication area is output. A synchronization pattern generation section 216 generates a synchronization pattern. After the preamble transmission is completed, the second selector section 220 selects the output of the synchronization pattern generation section 216 and transmits the synchronization pattern. When the time slot in the data communication area is being output, the transmission data from the transmission/reception control section 188 is selected. The parallel-to-serial conversion section 222 latches the parallel data output from the second selector section 220 and outputs serial data to the first selector section 218. The first selector section 218 is a selector that selects transmission data or preamble. The timing control unit 216 provides switching timing to the first and second selector units 218 and 220, preamble generation timing to the preamble generation unit 224, and parallel data latch timing to the parallel/serial conversion unit 222.

FIG. 9 is a block diagram showing the configuration of the transmission/reception control section 188, which includes a control section 228, a first selector section 230, a second selector section 232, and a delay circuit section 234.

The control unit 228 performs packet communication of control data under the control of the CPU 190 using the GA control area on the frame. Here, the control area is detected by the CPU 190 setting the start time slot number and end time slot number of the control area in a register (not shown) in the control unit 228 during system configuration. That is, this is performed by comparing the output of the reception slot counter section 212 with a register in which a start time slot number and an end time slot number are set. The control unit 228 constantly monitors the control area, and if it detects a bucket addressed to its own station, it receives it, and if there is transmission data, it detects an empty packet and transmits it. This is done, for example, by providing an area indicating empty/busy information in the packet format and detecting whether the packet is empty/busy. Then, the packets received addressed to the local station are passed to the CPU 190 via a buffer (not shown) in the control unit 228. Furthermore, the control area and data communication area that are not addressed to the local station are output to the first selector section 230 as they are. In addition, this control section 2
28 switches the first selector section 230 and the second selector section 232 in response to a transmission request from the circuit switching interface section 194 .
. . . to the frame control unit 18B. The first and second selector sections 230 and 232 control transmission and reception of instruction data from the control section 228. 1st
The selector section 230 selects the output from the control section 228 and the output from the delay circuit section 234. Second selector section 23
2 selects the destination from among the circuit switching interface units 194 . The delay circuit section 234 generates the same delay as that generated by the control section 228.

The terminal interface section 194 cuts out the time slot in the frame format assigned to the accommodated terminal and provides it as reception data, sends the transmission data to the position of the assigned time slot, and provides the terminal with a transparent transmission path.

Now, when there is a break in one of the transmission lines 3 that was receiving frames and frames are no longer sent, the CPU 10B
is the frame monitoring unit 117 in the frame control unit 102
Become more aware of this and recognize disconnections, etc. And C.P.
U10B instructs the reception switch control unit 13B to select another frame control unit 102 from the reception frame control unit 102 that the reception switch unit 132 has selected so far. Thereby, the frame from the other transmission line 3 can be used as a frame for normal reception on the opposite side where the disconnection or the like has occurred.

[Effects of the Invention] As explained in detail above, according to the present invention, when frames cannot be received from the transmission line in use, frames are received from another transmission line, so that disconnection of the transmission line is avoided. Alternatively, in response to a failure such as a station failure, loop reorganization can be performed with simple processing.

[Brief explanation of the drawing]

FIG. 1 is a diagram for explaining the schematic configuration of a communication system consisting of a plurality of loop communication systems according to an embodiment of the present invention, and FIG. 2 is a diagram of the format of a frame used in the first loop communication system. Fig. 3 is a frame format diagram used in the second loop communication system, Fig. 4 is a block diagram showing the configuration of a station in the first loop communication system, and Fig. 5 is a block diagram showing the configuration of the frame control section. figure,
FIG. 6 is a block diagram showing the configuration of the transmission/reception control section, FIG. 7 is a block diagram showing the configuration of the station of the second loop communication system, and FIG. 8 is a block diagram showing the configuration of the frame control section.
FIG. 9 is a block diagram showing the configuration of the transmission/reception control section;
The figure is a schematic configuration diagram of a loop communication system, and FIG. 11 is a frame format diagram used in this system. 4...First loop communication system, 6a, 6b
... ...Second loop communication system, 7.
...Control station, 8.8... 8a... 8b.
・・・・・・・・・ Bureau. Applicant: Toshiba Corporation

Claims (1)

[Claims] A plurality of stations including a control station are connected in a loop through a duplex transmission path, and a synchronization area for establishing frame synchronization and control communication for transmitting and receiving control information between the stations are provided. and a data communication area for transmitting and receiving data information between the stations, the frame is circulated in different directions on the duplex transmission path, and each station generates a frequency from an independently given frequency source. each duplex transmission path has means for transmitting the frame to the transmission path based on a clock,
The station has means for receiving the frame from the transmission path, and each station transmits the frame to each of the duplex transmission paths during normal operation, and receives the frame from one of the transmission paths in use. A loop communication system characterized in that when a frame cannot be received, the frame is received from another transmission path.