JPH0234950A - Mounting structure of semiconductor element - Google Patents
Mounting structure of semiconductor elementInfo
- Publication number
- JPH0234950A JPH0234950A JP22572588A JP22572588A JPH0234950A JP H0234950 A JPH0234950 A JP H0234950A JP 22572588 A JP22572588 A JP 22572588A JP 22572588 A JP22572588 A JP 22572588A JP H0234950 A JPH0234950 A JP H0234950A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor element
- resin
- microcapsules
- wiring board
- bump
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 62
- 239000011347 resin Substances 0.000 claims abstract description 52
- 229920005989 resin Polymers 0.000 claims abstract description 52
- 239000003094 microcapsule Substances 0.000 claims abstract description 31
- 229910052751 metal Inorganic materials 0.000 claims abstract description 27
- 239000002184 metal Substances 0.000 claims abstract description 27
- 239000002245 particle Substances 0.000 claims description 21
- 239000000758 substrate Substances 0.000 claims description 10
- 239000007788 liquid Substances 0.000 abstract description 10
- 239000003795 chemical substances by application Substances 0.000 abstract description 4
- 238000012423 maintenance Methods 0.000 abstract description 4
- 230000001070 adhesive effect Effects 0.000 description 12
- 239000000853 adhesive Substances 0.000 description 11
- 239000002775 capsule Substances 0.000 description 11
- 239000000463 material Substances 0.000 description 10
- 238000000034 method Methods 0.000 description 8
- 229920000642 polymer Polymers 0.000 description 8
- 239000000126 substance Substances 0.000 description 8
- 229920001187 thermosetting polymer Polymers 0.000 description 8
- 239000002904 solvent Substances 0.000 description 7
- 239000011162 core material Substances 0.000 description 5
- 239000002612 dispersion medium Substances 0.000 description 5
- 230000000694 effects Effects 0.000 description 4
- VZGDMQKNWNREIO-UHFFFAOYSA-N tetrachloromethane Chemical compound ClC(Cl)(Cl)Cl VZGDMQKNWNREIO-UHFFFAOYSA-N 0.000 description 4
- YXFVVABEGXRONW-UHFFFAOYSA-N Toluene Chemical compound CC1=CC=CC=C1 YXFVVABEGXRONW-UHFFFAOYSA-N 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000003756 stirring Methods 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 238000002788 crimping Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 239000011824 nuclear material Substances 0.000 description 2
- 239000000843 powder Substances 0.000 description 2
- 230000000717 retained effect Effects 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- 238000007740 vapor deposition Methods 0.000 description 2
- 239000001856 Ethyl cellulose Substances 0.000 description 1
- ZZSNKZQZMQGXPY-UHFFFAOYSA-N Ethyl cellulose Chemical compound CCOCC1OC(OC)C(OCC)C(OCC)C1OC1C(O)C(O)C(OC)C(CO)O1 ZZSNKZQZMQGXPY-UHFFFAOYSA-N 0.000 description 1
- 208000007256 Nevus Diseases 0.000 description 1
- 239000004793 Polystyrene Substances 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 238000003776 cleavage reaction Methods 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000004132 cross linking Methods 0.000 description 1
- 238000001723 curing Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000004807 desolvation Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 229920001249 ethyl cellulose Polymers 0.000 description 1
- 235000019325 ethyl cellulose Nutrition 0.000 description 1
- 239000010419 fine particle Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 235000021388 linseed oil Nutrition 0.000 description 1
- 239000000944 linseed oil Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 239000011859 microparticle Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 229920003023 plastic Polymers 0.000 description 1
- 239000004014 plasticizer Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229920001084 poly(chloroprene) Polymers 0.000 description 1
- 229920002223 polystyrene Polymers 0.000 description 1
- 230000007017 scission Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
- 239000000243 solution Substances 0.000 description 1
- 238000001179 sorption measurement Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000008646 thermal stress Effects 0.000 description 1
- 238000003466 welding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83851—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester being an anisotropic conductive adhesive
Abstract
Description
【発明の詳細な説明】
［産業上の利用分野］
本発明は、半導体素子と基板との実装構造に関し、特に
フェースダウン実装に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a mounting structure for a semiconductor element and a substrate, and particularly to face-down mounting.
［従来の技術１
従来、フェースダウンによる半導体素子と基板との実装
は、例えば、特開昭６０−２６２４３０号公報に記載さ
れ、第２図に示すような構造が知られていた。第２図に
おいて、■は配線基板であり、この上に配線パターン２
が形成されている。[Prior Art 1] Conventionally, face-down mounting of a semiconductor element and a substrate is described in, for example, Japanese Unexamined Patent Publication No. 60-262430, and a structure as shown in FIG. 2 has been known. In Fig. 2, ■ is a wiring board, and a wiring pattern 2 is placed on this board.
is formed.
配線基板１は、ガラス、セラミクス、樹脂もしくは金属
酸化物を表面に被覆した金属等の平面に、少くとも半導
体素子６の金属突起４と対応した位置に配線パターン２
が形成しである。配線パターンは金属であれば何でも良
い６配線基板１上か、もしくは半導体素子６の能動面上
に、光又は熱硬化性樹脂９を塗布、載置する。次に、半
導体素子上の金属突起４と配線基板１上の配線パターン
２とを位置合わせし、両者を圧接する。この圧接により
光又は熱硬化性樹脂９は押し広げられ、金属突起４と配
線パターン２とは電気的接続を得、結構半導体素子６上
に形成された電極パッド５と配線パターン２との電気的
接続が得られる。この状態で、光又は熱硬化性樹脂９に
、光もしくは熱を加えればその樹脂は硬化するので、半
導体素子６と配線基板１とは、上記電気的導通が保持さ
れたまた固定される。The wiring board 1 has a wiring pattern 2 on a flat surface of glass, ceramics, resin, or metal whose surface is coated with a metal oxide, at least at a position corresponding to the metal protrusion 4 of the semiconductor element 6.
is formed. The wiring pattern may be any metal as long as it is made of metal.6 A photo- or thermosetting resin 9 is applied and placed on the wiring board 1 or the active surface of the semiconductor element 6. Next, the metal protrusions 4 on the semiconductor element and the wiring pattern 2 on the wiring board 1 are aligned and pressed together. Due to this pressure contact, the optical or thermosetting resin 9 is pushed out and the metal protrusion 4 and the wiring pattern 2 are electrically connected, and the electrode pad 5 formed on the semiconductor element 6 and the wiring pattern 2 are electrically connected. You get a connection. In this state, if light or heat is applied to the thermosetting resin 9, the resin will be cured, so that the semiconductor element 6 and the wiring board 1 are fixed while maintaining the electrical continuity.
［発明が解決しようとする課題）
しかし、従来の半導体素子の実装構造では、半導体素子
と配線基板との保持に光又は熱硬化性樹脂を用いるため
、光又は熱硬化性樹脂を硬化させる際に光又は熱を加え
なければならなかった。光又は熱を半導体素子に加える
ために、専用の硬化装置が必要であり、その導入投資の
ために、製品自体のコストが高くなるという問題点を有
していた。また、硬化装置は高精度の平坦度を保持しな
がら、光又は熱を加える必要が有り、実装時に熱で平坦
度がずれるなど、その保守も煩雑であるという問題点を
有していた。[Problems to be Solved by the Invention] However, in the conventional semiconductor element mounting structure, a light or thermosetting resin is used to hold the semiconductor element and the wiring board, so when curing the light or thermosetting resin, Light or heat had to be applied. In order to apply light or heat to the semiconductor element, a dedicated curing device is required, and the cost of the product itself increases due to the investment for its introduction. In addition, the curing device requires the application of light or heat while maintaining highly accurate flatness, and has the problem that the flatness may shift due to heat during mounting, and its maintenance is also complicated.
このような問題点を解決するため、本発明では半導体素
子と配線基板との保持に光又は熱硬化性樹脂を用いずに
、高価な専用の実装装置も不要で、保守の簡便な装置で
実装できる半導体素子の実装構造を提供することを目的
としている。In order to solve these problems, the present invention does not use light or thermosetting resin to hold the semiconductor element and the wiring board, does not require expensive dedicated mounting equipment, and can be mounted using equipment that is easy to maintain. The purpose of the present invention is to provide a mounting structure for semiconductor devices that can be implemented easily.
［課題を解決するための手段］
上記問題点を解決するため、本発明の半導体素子の実装
構造では、電極上に金属突起を有する半導体素子と、前
記電極と相対する配線パターンを有する基板と、前記半
導体素子と前記基板とがフェースダウンにて実装されて
おり、前記半導体素子と前記基鈑との間には樹脂が存在
する半導体素子の実装構造において、前記樹脂はマイク
ロカプセルを含有することを特徴とする。[Means for Solving the Problems] In order to solve the above problems, the semiconductor element mounting structure of the present invention includes: a semiconductor element having a metal protrusion on an electrode; a substrate having a wiring pattern facing the electrode; In a semiconductor element mounting structure in which the semiconductor element and the substrate are mounted face-down, and a resin is present between the semiconductor element and the substrate, the resin may contain microcapsules. Features.
本発明の前記樹脂は、マイクロカプセルと導電粒子を含
有することを特徴とする。The resin of the present invention is characterized by containing microcapsules and conductive particles.
［作 用］
本発明では、半導体素子と配線パターンを有する基板と
の間にマイクロカプセルを含有した樹脂を存在させたの
で、単に半導体素子と配線基板を位置合わせした後圧接
するだけで、半導体素子と配線基板の接触部分に存在す
るマイクロカプセルが開裂し、樹脂の硬化に必要な硬化
剤、溶剤あるいは樹脂そのものが放出され、半導体素子
と配線基板の間に存在する樹脂の硬化が完結し、半導体
素子と配線基板が電気的導通を保ったまま保持され続け
る。[Function] In the present invention, since the resin containing microcapsules is present between the semiconductor element and the substrate having the wiring pattern, the semiconductor element and the wiring board can be bonded by pressure after simply aligning the semiconductor element and the wiring pattern. The microcapsules existing at the contact area between the semiconductor element and the wiring board are cleaved, and the curing agent, solvent, or resin itself necessary for curing the resin is released, and the curing of the resin between the semiconductor element and the wiring board is completed, and the semiconductor The element and the wiring board continue to be held while maintaining electrical continuity.
また本発明でぽ、半導体素子と配線パターンを有する配
線基板との間にマイクロカプセルと導電粒子を含有する
樹脂を存在させたので、圧接時に、マイクロカプセルの
開裂・樹脂の硬化の完結と同時に、半導体素子と配線基
板の接触部分に存在する導電粒子がそのまま存在し続け
、半導体素子と配線パターンとの間の上下方向の導通の
みを保持し続ける。In addition, in the present invention, since the resin containing microcapsules and conductive particles is present between the semiconductor element and the wiring board having the wiring pattern, at the time of pressure bonding, the cleavage of the microcapsules and the curing of the resin are completed at the same time. The conductive particles existing at the contact portion between the semiconductor element and the wiring board continue to exist as they are, and continue to maintain only vertical conduction between the semiconductor element and the wiring pattern.
［実 施 例］ 以下に本発明の実施例を図面に基き、詳細に説明する。[Example] Embodiments of the present invention will be described in detail below with reference to the drawings.
第１図は、本発明の半導体素子の実装構造の断面図であ
る。半導体素子６の電極バッド５に、例えばＣｒ−Ｃｕ
、Ｔｉ−Ｐｄ等の金属を被着した後、金属突起４を形成
する。金属突起４はＡｕ、Ｃｕ、ハンダ等の金属であり
、電気メツキ、スパック、蒸着等で数μｍ−数１０μｍ
の厚さに形成されることが多い。配線基板１は、ガラス
、セラミクス、樹脂等であり、少なくとも表面が絶縁さ
れており、半導体素子６の金属突起４と対応した位置に
配線パターン２が形成されている。配線パターンは、金
属もしくは、複数の金属、金属酸化物等を用いるのが一
般的であり、Ｎｉ、Ｃｕ。FIG. 1 is a sectional view of a mounting structure for a semiconductor element of the present invention. The electrode pad 5 of the semiconductor element 6 is made of, for example, Cr-Cu.
, Ti--Pd, etc., and then the metal protrusions 4 are formed. The metal protrusion 4 is made of a metal such as Au, Cu, or solder, and is formed by electroplating, spacing, vapor deposition, etc. to a thickness of several μm to several tens of μm.
It is often formed to a thickness of . The wiring board 1 is made of glass, ceramics, resin, etc., and at least the surface thereof is insulated, and the wiring pattern 2 is formed at a position corresponding to the metal protrusion 4 of the semiconductor element 6. The wiring pattern generally uses metal, a plurality of metals, metal oxides, etc., such as Ni and Cu.
Ａｕ、ＡＩ又はＩＴＯ等をメツキ、スパッタ、蒸着等の
方法で形成すれば良い。配線基板１面上か、もしくは半
導体素子６の金属突起４を形成した面上に樹脂３を塗布
あるいは設置する。樹脂３は、液状もしくはシート状で
あって、樹脂３中にはマイクロカプセル７が分散存在し
ている。Au, AI, ITO, or the like may be formed by plating, sputtering, vapor deposition, or the like. The resin 3 is applied or placed on the surface of the wiring board 1 or on the surface of the semiconductor element 6 on which the metal protrusions 4 are formed. The resin 3 is in the form of a liquid or a sheet, and the microcapsules 7 are dispersed in the resin 3.
次に、半導体素子６上の金属突起４と配線基板ｌ上の配
線バクーン２とを位置合わせし、両者を圧接する。する
と、主に直接接触する金属突起４と配線パターン２とに
より押し広げられる樹脂３中に存在するマイクロカプセ
ル７が開裂し、マイクロカブセルフ中に含まれ、樹脂３
が接着剤としての性能を示す硬化、粘着等の性状を発現
するための、硬化剤、溶剤あるいは樹脂そのものが放出
され、硬化もしくは接着、粘着が始まり、やがて完了す
る。この状態では、金属突起４と配線パターン２は電気
的に接続が行なわれており、この接続は保持されたまま
固定され続ける。樹脂３の周囲に、さらに耐湿性を向上
させるために樹脂を塗布しても良い。Next, the metal protrusion 4 on the semiconductor element 6 and the wiring back cover 2 on the wiring board l are aligned and pressed together. Then, the microcapsules 7 present in the resin 3 that are pushed and spread by the metal protrusions 4 and the wiring pattern 2 that are in direct contact with each other are cleaved, and the microcapsules 7 contained in the microcaps self are ruptured.
The curing agent, solvent, or resin itself that exhibits properties such as curing and adhesion that indicate performance as an adhesive is released, and curing, adhesion, and adhesion begin and eventually complete. In this state, the metal protrusion 4 and the wiring pattern 2 are electrically connected, and this connection continues to be maintained and fixed. A resin may be applied around the resin 3 to further improve moisture resistance.
第３図は、本発明のその他の実施例を示している半導体
素子の実装構造の断面図である。樹脂３中には、マイク
ロカブセルフの他、導電粒子８が存在している。導電粒
子８は、Ｎｉ、Ｃｒ等の金属粉もしくはそのメツキ物、
ハンダ粒子、ポリスチレン等のプラスチック上にＮｉ、
Ａｕ等のメツキを施しである粒子等であり、導電性を有
する物であれば何でも良い。その他の実装構造、材料、
方法等は、第１図の実施例において説明したのとまった
く同一である。ただ、この実施例においては、金属突起
４と配線パターン２との間に、導電粒子８が存在してお
り、このため、単なる接着剤による圧接に比べてより実
装信頼性は向上する。FIG. 3 is a sectional view of a semiconductor element mounting structure showing another embodiment of the present invention. In the resin 3, conductive particles 8 are present in addition to the micro-cube self. The conductive particles 8 are metal powders such as Ni and Cr, or plated materials thereof;
Ni on solder particles, plastics such as polystyrene, etc.
Particles plated with Au or the like may be used as long as they have electrical conductivity. Other mounting structures, materials,
The method is exactly the same as that described in the embodiment of FIG. However, in this embodiment, the conductive particles 8 are present between the metal protrusion 4 and the wiring pattern 2, so that the mounting reliability is improved more than when pressure bonding is performed simply using an adhesive.
当然、導電粒子８の混合濃度は隣接する金属突起４、同
志、あるいは配線パターン２同志が短絡しない濃度にお
さえなければならない。Naturally, the mixed concentration of the conductive particles 8 must be kept at a concentration that does not cause short-circuits between adjacent metal protrusions 4, adjacent metal protrusions 4, or interconnect patterns 2.
ここで、本発明の半導体素子の実装構造に用いられるマ
イクロカプセルについて述べる。マイクロカプセルを用
いた接着の系については、大きく分けて次の４つの系が
公知である。Here, the microcapsules used in the semiconductor device mounting structure of the present invention will be described. Regarding adhesion systems using microcapsules, the following four systems are generally known.
１）感圧性カプセル接着剤：接着剤の全量をカプセル化
している接着剤である。この場合は、樹脂３全量がマイ
クロカプセル７で構成されていることになる。1) Pressure-sensitive capsule adhesive: An adhesive in which the entire amount of adhesive is encapsulated. In this case, the entire amount of resin 3 is composed of microcapsules 7.
２）溶剤再活性型カプセル接着剤：接着剤組成中の溶剤
成分だけをカプセル化する。この溶剤カプセルを接着剤
溶媒中に分散させ、接着時には圧力を加えて溶剤を放出
させ接着作用を与える。2) Solvent-reactivated capsule adhesive: Only the solvent component in the adhesive composition is encapsulated. These solvent capsules are dispersed in an adhesive solvent, and during bonding, pressure is applied to release the solvent and provide an adhesive effect.
３）熱再活性カプセル接着剤：溶剤再活性型と似ている
が、カプセル壁材に熱溶融性のポリマーを用い：カプセ
ルに封入される物質は溶剤の代わりに可塑剤を使用する
。3) Heat-reactivated capsule adhesive: Similar to the solvent-reactivated type, but uses a heat-melting polymer for the capsule wall material: The substance encapsulated in the capsule uses a plasticizer instead of a solvent.
４）反応型カプセル接着剤；２成分型接着剤の硬化剤成
分をカプセル内に封入し、これを樹脂成分と混合して一
成分とし、圧接時に反応成分を放出させて接着する。4) Reactive capsule adhesive: The curing agent component of a two-component adhesive is encapsulated in a capsule, mixed with a resin component to form one component, and the reactive component is released during pressure contact for bonding.
実施例では、これらの系のうちいずれかのマイクロカプ
セルを使用する。In the examples, microcapsules of any of these systems are used.
さて、実際のマイクロカプセルの製法について説明する
。マイクロカプセル化は物質の微小粒子を薄い均一なポ
リマーの連続膜で再現的に被覆する方法で、この方法で
作られた数μｍから数百μｍの微小カプセルを゛°マイ
クロカプセル°゛と呼んでいる。従って、マイクロカプ
セルはいわば顕微鏡的な微小カプセルの包装容器ともい
うべきものである。Now, the actual method for manufacturing microcapsules will be explained. Microencapsulation is a method of reproducibly covering microparticles of a substance with a continuous film of thin, uniform polymer.The microcapsules made by this method, ranging in size from several micrometers to several hundred micrometers, are called ``microcapsules.'' There is. Therefore, microcapsules can be called microscopic packaging containers for microcapsules.
カプセル内に封入される物質は、液体・溶液・固体のい
ずれでも良く、カプセル内に封入された物質は外界から
隔離された状態で保存され、必要な時に適当な方法、例
えば加圧によってカプセル内から放出される。The substance encapsulated in the capsule may be in the form of a liquid, solution, or solid.The substance encapsulated in the capsule is stored isolated from the outside world, and when necessary, it is removed into the capsule by an appropriate method, such as pressurization. released from.
マイクロカプセル化の工程は、第４図に示すような連続
撹拌の下で行なわれる３つの手順から成る。第４図（ａ
）は、液体分散媒１２と核物質１０（カプセル化される
物質）と壁物質１１ （カプセル化する物質）の３相系
の生成工程である。The microencapsulation process consists of three steps carried out under continuous stirring as shown in FIG. Figure 4 (a
) is a process for producing a three-phase system of a liquid dispersion medium 12, a core substance 10 (substance to be encapsulated), and a wall substance 11 (substance to be encapsulated).
壁物質は多くの場合ポリマーの溶液である。この工程で
は分散媒１２中に、核物質ｌ゛０を微粒子状に撹拌ロッ
ド１３を回転することにより分散させ、次にこの系に壁
膜を形成する物質１１を加えて３相系を生成させる。The wall material is often a solution of polymers. In this step, the nuclear material l'0 is dispersed in the form of fine particles in the dispersion medium 12 by rotating the stirring rod 13, and then the material 11 that forms the wall film is added to this system to generate a three-phase system. .
第４図（ｂ）は、核物質粒子１０の周囲に壁物質１１の
ポリマーが集合沈積する段階である。壁ポリマーの集積
は、核物質と液体分散媒の界面におけるポリマーの吸着
に依存しているので、カプセル化を有効に行うためには
、系の全界面自由エネルギーを減少させることが必要で
ある。FIG. 4(b) shows a stage where the polymer of the wall material 11 is aggregated and deposited around the core material particle 10. Since wall polymer accumulation relies on adsorption of the polymer at the interface of the core material and liquid dispersion medium, effective encapsulation requires reducing the total interfacial free energy of the system.
第４図（ｃ）は、壁物質の表面に集積した液状壁ポリマ
ーの固化段階である。第４図（ｂ）の段階で核物質の周
囲に形成された壁ポリマーはまだ液状で不安定であるた
め、化学的あるいは物理的にこれを強化し、安定な膜に
する必要がある。液膜の強化方法としては、冷却、架橋
、硬化、脱溶媒和などの方法が用いられる。このように
して、安定なマイクロカプセルが形成され、これを目的
樹脂中に混合すれば良い。もしくは、マイクロカプセル
全量が樹脂そのものである場合も有る。また、この段階
で導電粒子を混入すれば、樹脂中にマイクロカプセルと
導電粒子が存在することになる。FIG. 4(c) is the solidification stage of the liquid wall polymer accumulated on the surface of the wall material. Since the wall polymer formed around the core material at the stage shown in FIG. 4(b) is still liquid and unstable, it is necessary to chemically or physically strengthen it to form a stable film. Methods such as cooling, crosslinking, curing, and desolvation are used to strengthen the liquid film. In this way, stable microcapsules are formed, which can be mixed into the target resin. Alternatively, the entire amount of the microcapsules may be the resin itself. Furthermore, if conductive particles are mixed at this stage, microcapsules and conductive particles will be present in the resin.
さらに、具体的にマイクロカプセル含有の樹脂の製法に
ついて述べる。樹脂本体は、ネオプレンＡＤ−２０・・
・・・・３００部、ＭｇＯ・・・・・・１２部、Ｚｎ
Ｏ−−１５部、Ｎｅ０ＺＯｎｅ” Ｄ” −・−・４５
部、ＮｅＶｉ ｌ １ｅＲ−１４・−−−−−９００部
、亜麻仁油・・・・・・４５部、トルエン・・・・・・
１９１７部から成っている。この上に、エチルセルロー
スを壁物質、四塩化炭素を核物質、液体分散媒として形
成されたマイクロカプセルを塗布する。この状態の樹脂
を第１図に示されるように半導体素子と配線基板にはさ
み込み、位置合わせ後、加圧する。するとマイクロカプ
セル中に含まれた四塩化炭素が、開裂・放出され、それ
が樹脂を濡らし接着に至る。このまま、半導体素子と配
線基板とが保持され続ける。Furthermore, a method for producing a resin containing microcapsules will be specifically described. The resin body is neoprene AD-20...
...300 parts, MgO...12 parts, Zn
O--15 part, Ne0ZOne "D" -・-・45
part, NeVi l 1eR-14・----900 parts, linseed oil...45 parts, toluene...
It consists of 1917 parts. On top of this, microcapsules formed of ethyl cellulose as a wall material, carbon tetrachloride as a core material, and a liquid dispersion medium are applied. The resin in this state is sandwiched between the semiconductor element and the wiring board as shown in FIG. 1, and after alignment, pressure is applied. Then, the carbon tetrachloride contained in the microcapsules is cleaved and released, which wets the resin and leads to adhesion. The semiconductor element and the wiring board continue to be held in this state.
また、樹脂本体中に導電粒子としてＮｉ粉末を混入して
おくと、圧接時に、半導体素子の金属突起と配線パター
ンとの間にＮ１扮末が存在したまま、半導体素子と配線
基板が保持され続ける。In addition, if Ni powder is mixed as conductive particles into the resin body, the semiconductor element and wiring board will continue to be held together while N1 particles remain between the metal protrusions of the semiconductor element and the wiring pattern during pressure bonding. .
［発明の効果］
以上、説明したように本発明による半導体素子の実装構
造では、半導体素子と配線基板との間にマイクロカプセ
ルを含有した樹脂を存在させ、それらを保持させる構造
としたので以下の効果を持つ。[Effects of the Invention] As explained above, in the semiconductor element mounting structure according to the present invention, the resin containing microcapsules is present between the semiconductor element and the wiring board, and the structure is such that the resin is retained. have an effect.
（１）圧接時に、従来の光又は熱を同時に加える装置が
不要となったので、加圧機構のみの簡略化した装置で済
み、装置コストが低減する。また、実装時には加圧のみ
のため、実装性も向上する。(1) Since the conventional device for applying light or heat at the same time during pressure welding is no longer necessary, a simplified device with only a pressurizing mechanism is sufficient, and the cost of the device is reduced. Furthermore, since only pressure is applied during mounting, mounting performance is also improved.
（２）装置そのものも、加圧機構のみになるため、保守
、調整等も大幅に簡略化される。(2) Since the device itself consists only of a pressurizing mechanism, maintenance, adjustment, etc. are greatly simplified.
（３）硬化・接着等に必要な成分を樹脂から完全に分離
しであるので、従来の光又は熱硬化性樹脂よりも、保存
性が大幅に向上する。(3) Since the components necessary for curing, adhesion, etc. are completely separated from the resin, the shelf life is significantly improved compared to conventional photo- or thermosetting resins.
（４）圧接時に半導体素子に加わるエネルギーは、微少
なので、圧接時に半導体素子に与えるダメージが激減し
、そのダメージによる半導体素子・配線基板の不良は発
生しなくなる。(4) Since the energy applied to the semiconductor element during pressure bonding is minute, damage to the semiconductor element during pressure bonding is drastically reduced, and defects in semiconductor elements and wiring boards due to such damage will no longer occur.
さらに、説明したように本発明による半導体素子の実装
構造では、半導体素子と配線基板との間にマイクロカプ
セルと導電粒子を含有した樹脂を存在させ、それを保持
させる構造としたので、前述の効果に加えさらに以下の
効果を持つ。Furthermore, as explained above, in the semiconductor element mounting structure according to the present invention, the resin containing microcapsules and conductive particles is present between the semiconductor element and the wiring board, and the structure is such that the resin is retained, so that the above-mentioned effects can be achieved. In addition, it has the following effects.
（５）半導体素子の金属突起と配線パターンの間に導電
粒子が存在するため、金属突起の高さのバラツキを導電
粒子が吸収できるため、より高い信頼性の実装が可能に
なる。(5) Since conductive particles are present between the metal protrusions of the semiconductor element and the wiring pattern, the conductive particles can absorb variations in the height of the metal protrusions, allowing for higher reliability mounting.
（６）また、導電粒子がクツション材的な役割を行い、
圧着の圧力に対するマージンも広がるため、圧着装置の
保守、例えば平坦度の調整等がよりシビアでなくなり、
調整も簡略化できる。(6) Also, the conductive particles act as a cushioning material,
The margin for crimping pressure is also expanded, so maintenance of the crimping equipment, such as adjusting flatness, becomes less severe.
Adjustment can also be simplified.
（７）混入する導電粒子の熱膨張係数を半導体素子、配
線基板に近い物を導入すれば、樹脂の見かけの熱膨張係
数は半導体素子、配線基板に近ずくため、熱ストレスに
よる半導体〜素子配線基板間のオーブンモード不良の発
生をおさえることができる。(7) If the thermal expansion coefficient of the mixed conductive particles is close to that of the semiconductor element or wiring board, the apparent thermal expansion coefficient of the resin will be close to that of the semiconductor element or wiring board, so the semiconductor to element wiring due to thermal stress It is possible to suppress the occurrence of oven mode failures between substrates.
第１図は、本発明による半導体素子の実装構造を示す断
面図であり、第２図は従来の半導体素子の実装構造を示
す断面図である。第３図は、本発明による半導体素子の
実装構造を示す断面図であり、第４図（ａ）〜（ｃ）は
、本発明による半導体素子の実装構造に用いられるマイ
クロカプセルの製造工程概略図である。
配線基板
配線パターン
樹脂
金属突起
電極パッド
半導体装置
・マイクロカプセル
・導電粒子
・光又は熱硬化性樹脂
・核物質
・壁物質
・液体分散媒
・撹拌ロッドFIG. 1 is a sectional view showing a semiconductor element mounting structure according to the present invention, and FIG. 2 is a sectional view showing a conventional semiconductor element mounting structure. FIG. 3 is a sectional view showing a semiconductor device mounting structure according to the present invention, and FIGS. 4(a) to 4(c) are schematic diagrams of the manufacturing process of a microcapsule used in the semiconductor device mounting structure according to the present invention. It is. Wiring board wiring pattern Resin metal protrusion electrode pad Semiconductor device, microcapsule, conductive particle, photo or thermosetting resin, nuclear material, wall material, liquid dispersion medium, stirring rod
Claims (2)
極と相対する配線パターンを有する基板と、前記半導体
素子と前記基板とがフェースダウンにて実装されており
、前記半導体素子と前記基板との間には樹脂が存在する
半導体素子の実装構造において、前記樹脂はマイクロカ
プセルを含有することを特徴とする半導体素子の実装構
造。(1) A semiconductor element having a metal protrusion on an electrode, a substrate having a wiring pattern facing the electrode, the semiconductor element and the substrate being mounted face down, and the semiconductor element and the substrate being mounted face down. 1. A semiconductor element mounting structure in which a resin exists between the semiconductor element mounting structures, wherein the resin contains microcapsules.
ることを特徴とする請求項１記載の半導体素子の実装構
造。(2) The semiconductor element mounting structure according to claim 1, wherein the resin contains microcapsules and conductive particles.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63225725A JP2623762B2 (en) | 1988-04-28 | 1988-09-09 | Semiconductor element mounting structure |
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63-106094 | 1988-04-28 | ||
| JP10609488 | 1988-04-28 | ||
| JP63225725A JP2623762B2 (en) | 1988-04-28 | 1988-09-09 | Semiconductor element mounting structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0234950A true JPH0234950A (en) | 1990-02-05 |
| JP2623762B2 JP2623762B2 (en) | 1997-06-25 |
Family
ID=26446275
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63225725A Expired - Lifetime JP2623762B2 (en) | 1988-04-28 | 1988-09-09 | Semiconductor element mounting structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2623762B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03173436A (en) * | 1989-12-01 | 1991-07-26 | Matsushita Electric Ind Co Ltd | Semiconductor device |
| JP2010242053A (en) * | 2009-04-07 | 2010-10-28 | Kanhin Kagaku Kofun Yugenkoshi | Ambient-curable anisotropic conductive adhesive |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004331910A (en) | 2003-05-12 | 2004-11-25 | Seiko Epson Corp | Anisotropic conductive adhesive, method for mounting the same, electrooptical device module and electronic instrument |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56138989A (en) * | 1980-03-31 | 1981-10-29 | Sharp Kk | Connecting method |
| JPS61194732A (en) * | 1985-02-22 | 1986-08-29 | Casio Comput Co Ltd | Method for jointing semiconductor pellet and substrate |
| JPS62141083A (en) * | 1985-12-13 | 1987-06-24 | Sony Chem Kk | Thermosetting adhesive film |
-
1988
- 1988-09-09 JP JP63225725A patent/JP2623762B2/en not_active Expired - Lifetime
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56138989A (en) * | 1980-03-31 | 1981-10-29 | Sharp Kk | Connecting method |
| JPS61194732A (en) * | 1985-02-22 | 1986-08-29 | Casio Comput Co Ltd | Method for jointing semiconductor pellet and substrate |
| JPS62141083A (en) * | 1985-12-13 | 1987-06-24 | Sony Chem Kk | Thermosetting adhesive film |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH03173436A (en) * | 1989-12-01 | 1991-07-26 | Matsushita Electric Ind Co Ltd | Semiconductor device |
| JP2010242053A (en) * | 2009-04-07 | 2010-10-28 | Kanhin Kagaku Kofun Yugenkoshi | Ambient-curable anisotropic conductive adhesive |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2623762B2 (en) | 1997-06-25 |
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