JPH0233787B2 - SUPATSUTARINGUSOCHODENRYOKUKYOKYUSOCHI - Google Patents
SUPATSUTARINGUSOCHODENRYOKUKYOKYUSOCHIInfo
- Publication number
- JPH0233787B2 JPH0233787B2 JP13662783A JP13662783A JPH0233787B2 JP H0233787 B2 JPH0233787 B2 JP H0233787B2 JP 13662783 A JP13662783 A JP 13662783A JP 13662783 A JP13662783 A JP 13662783A JP H0233787 B2 JPH0233787 B2 JP H0233787B2
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- circuit
- phase
- electrodes
- sputtering
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004544 sputter deposition Methods 0.000 claims description 16
- 238000001514 detection method Methods 0.000 claims description 8
- 230000010355 oscillation Effects 0.000 claims description 8
- 239000000758 substrate Substances 0.000 claims description 8
- 239000010408 film Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000001020 plasma etching Methods 0.000 description 2
- 239000013076 target substance Substances 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/34—Gas-filled discharge tubes operating with cathodic sputtering
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
- C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
- C23C14/54—Controlling or regulating the coating process
Landscapes
- Chemical & Material Sciences (AREA)
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Plasma & Fusion (AREA)
- Analytical Chemistry (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Materials Engineering (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Physical Vapour Deposition (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
Description
【発明の詳細な説明】
この発明は高周波電力を同時に複数の電極に印
加するスパツタリング装置の改良に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a sputtering device that simultaneously applies high frequency power to a plurality of electrodes.
従来のこの種のスパツタリング装置は第1図の
構成をもつている。第1図にてVは真空容器、
T1,T2,T3は一方の電極で例えばターゲツト、
Sは他方の電極で例えば基板ホルダーである。タ
ーゲツトの各々には個別に電力供給系1,2,3
が設備されている。例えばターゲツトT1に設備
されている電力供給系1は、高周波発振回路
OSC1、電力増幅回路AM1、インピーダンス整合
回路MB1の直列接続回路から成る等である。こ
の従来の装置には次の欠点がある。 A conventional sputtering apparatus of this type has the configuration shown in FIG. In Figure 1, V is a vacuum container,
T 1 , T 2 , T 3 are one electrode, for example, a target,
S is the other electrode, for example, a substrate holder. Each target has separate power supply systems 1, 2, and 3.
are equipped. For example, the power supply system 1 installed in target T 1 is a high frequency oscillation circuit.
It consists of a series connection circuit of OSC 1 , power amplification circuit AM 1 , and impedance matching circuit MB 1 . This conventional device has the following drawbacks.
各電力供給系1,2,3は発振周波数を異にす
る。このため真空容器V内で兎角ビートを生じ、
このビートは
(1) 放電プラズマ発光強度の振動(緩又は急)を
生ずる。 Each power supply system 1, 2, and 3 has a different oscillation frequency. For this reason, a rabbit-horn beat occurs inside the vacuum vessel V,
This beat causes (1) oscillations (slow or sudden) in the discharge plasma emission intensity;
(2) インピーダンス整合回路の振動、従つて投入
電力に振動を生ずる。(2) Vibrations occur in the impedance matching circuit and therefore in the input power.
(3) このためスパツタリングが不安定となり、成
膜等の処理に不揃い(時間的、空間的不揃い)
を生ずる。(3) As a result, sputtering becomes unstable, resulting in irregularities in processing such as film formation (temporal and spatial irregularities).
will occur.
等の不具合を生む。This causes problems such as
また電極T1,T2,…を近接配置するときはこ
のビートが助長されるため、これらは隔離せざる
を得ずこのため装置を小型に構成することが困難
であつた。 Moreover, when the electrodes T 1 , T 2 , . . . are placed close to each other, this beat is promoted, so they have to be separated, which makes it difficult to make the device compact.
この不具合を解消する目的で高周波発振回路を
共通にすることも行なわれているが、その場合も
なお位相差及び位相差の浮動を免れることはでき
ず改善の程度は充分とは言えないものであつた。 In order to solve this problem, high-frequency oscillation circuits have been made common, but even in this case, the phase difference and the floating phase difference cannot be avoided, and the degree of improvement cannot be said to be sufficient. It was hot.
本発明は上述のビート、位相差及びそれらの浮
動を皆無とし、小型化の可能な装置を提供するこ
とを目的とする。また、本発明は薄膜形成、物理
的食刻あるいはリアクテイブイオンエツチング
(RIE)の如き化学的食刻等の作業において、電
極相互間に所望の条件を正しく附与し、かつそれ
を維持することのできる装置を提供することを目
的とする。以下実施例によつて本発明の装置を説
明する。 An object of the present invention is to provide an apparatus which can eliminate the above-mentioned beats, phase differences, and their floating, and which can be miniaturized. Furthermore, the present invention provides a method for correctly providing and maintaining desired conditions between electrodes in operations such as thin film formation, physical etching, or chemical etching such as reactive ion etching (RIE). The purpose is to provide a device that can. The apparatus of the present invention will be explained below with reference to Examples.
第2図には本発明の実施例を示す。この実施例
では、電極T1,T2,T3の電力供給系1,20,
30が発振回路OSCを共有している。そして、
電力供給系1は従来と変らないが、電力供給系2
0,30はそれぞれ位相補正回路FS2,FS3及び
位相検出回路FD2,FD3を設備し、電力供給系1
の出力の位相を基準にしてそれぞれの出力の位相
を位相検出回路FD2,FD3で検出し、その検出出
力で位相補正回路FS2,FS3を制御する位相制御
ループをそなえている。 FIG. 2 shows an embodiment of the invention. In this embodiment, the power supply system 1 , 20 ,
30 share the oscillation circuit OSC. and,
Power supply system 1 is the same as before, but power supply system 2
0 and 30 are equipped with phase correction circuits FS 2 and FS 3 and phase detection circuits FD 2 and FD 3 , respectively, and the power supply system 1
Phase detection circuits FD 2 and FD 3 detect the phase of each output based on the phase of the output of , and a phase control loop is provided that controls the phase correction circuits FS 2 and FS 3 using the detected output.
一般に各電力供給系の所望電力及びT1,T2,
T3部の負荷状態には差異及び経時変動のあるの
が普通であり、このため発振回路OSCを共通に
しても増幅回路、インピーダンス整合回路を調整
しただけではこれら電力供給系1,20,30の
出力の位相を揃えることは困難であるし、その作
業は煩わしい。しかし、本発明が開示する上記の
ような構成をとるときは、電極T1,T2,T3に印
加される電力の位相をすべて一致させるか、若く
は所望位相差に正しくかつ微細に調整しこれを維
持することができる。 In general, the desired power of each power supply system and T 1 , T 2 ,
It is normal for there to be differences and changes over time in the load conditions of the T3 sections, so even if the oscillation circuit OSC is shared, simply adjusting the amplifier circuit and impedance matching circuit will cause the power supply system 1, 20, 30 It is difficult to align the phases of the outputs, and the task is troublesome. However, when adopting the above-described configuration disclosed by the present invention, the phases of the powers applied to the electrodes T 1 , T 2 , and T 3 must all be made to match, or more accurately and finely adjusted to a desired phase difference. and can maintain this.
第3図は本発明の別の実施例を示す。この場合
は、高周波電力供給系1,20はターゲツトT1,
T2に、300は基板ホルダーSに供給されてい
る。 FIG. 3 shows another embodiment of the invention. In this case, the high frequency power supply systems 1 and 20 are connected to the targets T 1 and
At T 2 , 300 is being fed to the substrate holder S.
この第2図の構成の装置は多元スパツタリング
装置あるいは、同時スパツタリング装置と呼ばれ
ている装置であり、複数の異種ターゲツト物質を
使用し組成比制御する合金膜形成、あるいは、複
数の同種ターゲツト物質を使用し高速膜形成を行
なう場合に使用され、第3図の構成の装置はバイ
アススパツタリング方式の装置とも呼ばれている
もので、基板上に膜付着と食刻を同時に進行させ
ステツプカバレイジ向上及び膜質改善等を計る場
合に使用される。 The apparatus with the configuration shown in Fig. 2 is called a multi-source sputtering apparatus or a simultaneous sputtering apparatus, and is capable of forming an alloy film by controlling the composition ratio using a plurality of different target substances, or by forming a plurality of homogeneous target substances. The device with the configuration shown in Fig. 3 is also called a bias sputtering system, and is used to perform high-speed film formation. Used to measure film quality improvement, etc.
第4図は本願の第2の発明を説明する図であ
る。前述の各実施例の、位相補正回路FS2,FS3
には既存の様々の方式のものが使用できるが、そ
の多くで、位相を補正するとゲインがそれに附随
して変化する現象が見られる。スパツタリング作
業の場合は電力供給系のゲインの変動は製品の仕
上りに大きい影響をもたらすので、出来るだけゲ
インを一定に保つ必要がある。第2の発明はこの
問題を解決するものである。 FIG. 4 is a diagram explaining the second invention of the present application. Phase correction circuits FS 2 and FS 3 in each of the above-mentioned embodiments
Various existing methods can be used, but in many of them, a phenomenon is observed in which when the phase is corrected, the gain changes accordingly. In the case of sputtering work, fluctuations in the gain of the power supply system have a large effect on the finished product, so it is necessary to keep the gain as constant as possible. The second invention solves this problem.
第4図は電力供給系4では、位相補正回路FS、
増幅回路AM、インピーダンス整合回路MB、位
相検出回路FDで構成する上述の第1の発明の電
力供給系の一部にゲインコントロール回路GCが
付設されており、出力41をゲインコントロール
回路GCを経て入力42に負き・還し、この系のゲ
インを一定に維持している。負き還の方式として
は既存の様々のものが流用できる。 Figure 4 shows that in the power supply system 4, the phase correction circuit FS,
A gain control circuit GC is attached to a part of the power supply system of the first invention described above, which is composed of the amplifier circuit AM, the impedance matching circuit MB, and the phase detection circuit FD, and the output 41 is inputted through the gain control circuit GC. 42, and maintains the gain of this system constant. Various existing methods can be used as methods for giving back.
本発明の電力供給装置は上記の通りであつて、
スパツタリング装置の電極相互間に所望の位相条
件、電力条件を正しく設定し、かつそれを長期に
亘つて維持することができる。従つて、下記の諸
効果がある。 The power supply device of the present invention is as described above,
Desired phase conditions and power conditions can be set correctly between the electrodes of the sputtering device and maintained for a long period of time. Therefore, there are the following effects.
1 第2図の実施例において、異種ターゲツトを
使用した場合には、基板に付着した合金膜の組
成比を正確に制御できる。又同種ターゲツトを
使用した場合には各電極に投入された電力の和
に対し最大の膜付着速度が得られる様位相を制
御することができる。1 In the embodiment shown in FIG. 2, when different types of targets are used, the composition ratio of the alloy film deposited on the substrate can be accurately controlled. Furthermore, when the same type of target is used, the phase can be controlled so as to obtain the maximum film deposition rate with respect to the sum of the power applied to each electrode.
2 第3図の実施例において、基板上に膜付着と
食刻を同時に進行させた場合、前項の効果に加
えて、基板上の食刻速度の変動及び膜質の変動
を極めて抑制することができる。2 In the embodiment shown in FIG. 3, if film adhesion and etching proceed simultaneously on the substrate, in addition to the effects described in the previous section, fluctuations in the etching speed and film quality on the substrate can be extremely suppressed. .
3 加工精度、加工の均質さ、が時間的にも空間
的にも大きく向上し、それらを意のまゝに調整
することができるようになる。3. Processing accuracy and uniformity of processing will be greatly improved both temporally and spatially, and it will be possible to adjust them at will.
従つて本発明の装置はこれを例えばLSIの製造
の工程に使用して、その品質の向上、歩留りの向
上に大いにその力量を発揮するものである。産業
上極めて有益な発明ということができる。 Therefore, the apparatus of the present invention can be used, for example, in the manufacturing process of LSIs, and can greatly demonstrate its ability to improve the quality and yield. This invention can be said to be extremely useful industrially.
第1図は従来の装置の電力供給装置を示すブロ
ツク図。第2図は本願の第1の発明の実施例の同
様の図。第3図は別の実施例の同様の図。第4図
は本願の第2の発明を説明するためのブロツク
図。
1,20,30,300,…:電力供給系、
OSC,OSC1,…:発振器。AM,AM1…:電力
増幅器。MB,MB1…:インピーダンス整合回
路。FD,FD1,…:位相検出回路。FS,FS1,
…:位相補正回路。T1,T2,T3:電極(ターゲ
ツト)。S:電極(基板ホルダー)V:真空容器。
GC:ゲインコントロール回路。
FIG. 1 is a block diagram showing a power supply device for a conventional device. FIG. 2 is a similar diagram of an embodiment of the first invention of the present application. FIG. 3 is a similar diagram of another embodiment. FIG. 4 is a block diagram for explaining the second invention of the present application. 1, 20, 30, 300,...: power supply system,
OSC, OSC 1 ,...: Oscillator. AM, AM 1 ...: Power amplifier. MB, MB 1 ...: Impedance matching circuit. FD, FD 1 ,...: Phase detection circuit. FS, FS 1 ,
...: Phase correction circuit. T 1 , T 2 , T 3 : Electrodes (targets). S: Electrode (substrate holder) V: Vacuum container.
GC: Gain control circuit.
Claims (1)
それぞれに、高周波発振回路を共通にして、電力
増幅回路とインピーダンス整合回路よりなる電力
供給系を経由する高周波電力を印加して真空放電
させるスパツタリング装置において、該電力供給
系の少くとも一つに位相補正回路を設けるととも
にこの系の出力周波数と他の系の出力周波数を位
相比較する位相検出回路を設け、この位相検出回
路の出力で該位相補正回路を制御する位相制御ル
ープを加味したことを特徴とするスパツタリング
装置用電力供給装置。 2 該複数の電極がすべてターゲツトである第1
項記載のスパツタリング装置用電力供給装置。 3 該複数の電極がターゲツトと基板ホルダの両
者を含む第1項記載のスパツタリング装置用電力
供給装置。 4 単一の真空容器内に設けられた複数の電極の
それぞれに、高周波発振回路を共通にして、電力
増幅回路とインピーダンス整合回路よりなる電力
供給系を経由する高周波電力を印加して真空放電
させるスパツタリング装置において、該電力供給
系の少くとも一つに位相補正回路を設けるととも
にこの系の出力周波数と他の系の出力周波数を位
相比較する位相検出回路を設け、この位相検出回
路の出力で該位相補正回路を制御する位相制御ル
ープを加味するとともに、該位相補正回路を内包
して、この電力供給系のゲインを一定にするゲイ
ン制御負き還回路をも加味したことを特徴とする
スパツタリング装置用電力供給装置。 5 該複数の電極がすべてターゲツトである第4
項記載のスパツタリング装置用電力供給装置。 6 該複数の電極がターゲツトと基板ホルダの両
者を含む第4項記載のスパツタリング装置用電力
供給装置。[Claims] 1. A high-frequency oscillation circuit is shared between each of a plurality of electrodes provided in a single vacuum container, and high-frequency power is supplied via a power supply system consisting of a power amplifier circuit and an impedance matching circuit. In a sputtering device that generates a vacuum discharge by applying a voltage, at least one of the power supply systems is provided with a phase correction circuit, and a phase detection circuit is provided to compare the output frequency of this system with the output frequency of another system, and this phase A power supply device for a sputtering device, characterized in that it includes a phase control loop that controls the phase correction circuit using the output of the detection circuit. 2. A first electrode in which all of the plurality of electrodes are targets.
A power supply device for a sputtering device as described in 1. 3. The power supply device for a sputtering apparatus according to claim 1, wherein the plurality of electrodes include both a target and a substrate holder. 4 A common high-frequency oscillation circuit is applied to each of the plurality of electrodes provided in a single vacuum container, and high-frequency power is applied via a power supply system consisting of a power amplifier circuit and an impedance matching circuit to cause vacuum discharge. In a sputtering device, at least one of the power supply systems is provided with a phase correction circuit, and a phase detection circuit is provided to compare the output frequency of this system with the output frequency of another system, and the output of this phase detection circuit is used to detect the phase difference. A sputtering device characterized in that it includes a phase control loop that controls a phase correction circuit, and also includes a gain control feedback circuit that includes the phase correction circuit and keeps the gain of the power supply system constant. power supply equipment. 5. A fourth electrode in which all of the plurality of electrodes are targets.
A power supply device for a sputtering device as described in 1. 6. The power supply device for a sputtering apparatus according to claim 4, wherein the plurality of electrodes include both a target and a substrate holder.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13662783A JPH0233787B2 (en) | 1983-07-26 | 1983-07-26 | SUPATSUTARINGUSOCHODENRYOKUKYOKYUSOCHI |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13662783A JPH0233787B2 (en) | 1983-07-26 | 1983-07-26 | SUPATSUTARINGUSOCHODENRYOKUKYOKYUSOCHI |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6029467A JPS6029467A (en) | 1985-02-14 |
JPH0233787B2 true JPH0233787B2 (en) | 1990-07-30 |
Family
ID=15179722
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13662783A Expired - Lifetime JPH0233787B2 (en) | 1983-07-26 | 1983-07-26 | SUPATSUTARINGUSOCHODENRYOKUKYOKYUSOCHI |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0233787B2 (en) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61207573A (en) * | 1985-03-09 | 1986-09-13 | Matsufumi Takatani | Multi-component electric power sputtering method |
JP2678745B2 (en) * | 1985-04-11 | 1997-11-17 | 日本高周波 株式会社 | Constant phase difference multiple load supply high frequency power supply |
JPH02258976A (en) * | 1988-09-26 | 1990-10-19 | Tokuda Seisakusho Ltd | Sputtering device |
JPH02156080A (en) * | 1988-12-09 | 1990-06-15 | Tokuda Seisakusho Ltd | Sputtering device |
JP2901634B2 (en) * | 1989-03-20 | 1999-06-07 | 株式会社日立製作所 | High frequency bias sputtering apparatus and method |
JPH0747820B2 (en) * | 1989-09-22 | 1995-05-24 | 株式会社日立製作所 | Film forming equipment |
WO2001075187A1 (en) * | 2000-04-04 | 2001-10-11 | Advanced Energy Industries, Inc. | System for driving multiple magnetrons with multiple phase ac |
JP4436350B2 (en) * | 2006-09-14 | 2010-03-24 | 株式会社アルバック | Thin film forming method and thin film forming apparatus |
JP6004921B2 (en) * | 2012-11-28 | 2016-10-12 | 株式会社アルバック | Sputtering apparatus, thin film manufacturing method |
JP2014159614A (en) * | 2013-02-19 | 2014-09-04 | Ulvac Japan Ltd | Sputtering apparatus and sputtering method |
-
1983
- 1983-07-26 JP JP13662783A patent/JPH0233787B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPS6029467A (en) | 1985-02-14 |
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