JPH0232545A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To produce a compact and high-performance semiconductor device by performing ion implantation of Ti directly into a semiconductor, preventing unneeded impurities from entering the semiconductors, and forming an alloy at a low temperature. CONSTITUTION:After forming an Si oxide film 3' and a gate electrode 4'' of a gate insulation film on an Si substrate 1', the electrodes 4'', a source area 5, and a drain area 6 are formed, an Si film 17 is formed on the surface, impurities forming a conductive area are introduced, and an Si nitriding film 18 is formed. Then, a specified amount of Ti is ion-implanted to the main surface side of the substrate 1' by a specified amount of energy, and Ti and semiconductor Si and Ti and Si nitriding film 18 are allowed to react. As a result, with formation of alloy at a low temperature, Ti silicide films 4b, 5b and 6b, Ti silicide films 22a-22c are formed on a source area 5 and a drain area 6 and then Ti silicide films 21a-21d are formed on Si layers 19a-19d. Then, the Ti silicide film is eliminated by hydrofluoric acid, an Si oxide film 8 is accumulated on the substrate to form a contact hole, and then a source electrode 9 and a drain electrode 10 are made.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device that stably manufactures a semiconductor device that operates at high speed.

[Conventional technology]

FIG. 4 is a sectional view of a main part showing the structure of a conventional semiconductor device. In the figure, 1 is a first quadrielectric single crystal semiconductor substrate, 2 is an insulating film for horizontally electrically insulating between semiconductor devices, 3 is a gate insulating film, and 4m is a gate using a semiconductor. Electrodes, 4b is a gate electrode using a semiconductor alloy thin film, 5m is a source region of the second conductivity type, 5b is a source region formed by the semiconductor alloy layer, 6a is a drain region of the second conductivity type, 6b is a drain region formed by a semiconductor alloy layer, I is an insulating film formed on the side walls of gate insulating films 4m and 4b, 8 is an insulating film for electrically insulating between wirings, and 9 is a source '1 pole, 10 is the drain electrode, 11
a to 11C are titanium nitride films, 12 is a gate electrode 4m, 4
This is an insulating film formed on the side wall of b.

In the semiconductor device constructed in this way, the upper electrodes 4m, 4b, the source regions 5m, 5b, and the drain regions 5a, fib are formed only of semiconductor. In addition, the operating speed of a semiconductor device is mainly determined by the effective channel length (distance between the source and drain), but in reality, the sheet resistance of the gate electrode thin film and the sheet resistance of the source and drain regions have finite values. In miniaturized semiconductor devices, the time for signals to propagate through the gate cannot be ignored, and the drain current and gain decrease due to the sheet resistance of the source and drain. That is, when the overall dimensions of a semiconductor device are reduced in order to improve the operating speed or degree of integration of an LSI, the operating speed of the semiconductor device becomes smaller than the characteristics predicted by simple reduction due to the parasitic effect. and becomes significantly worse.

Conventionally, efforts have been made to lower the sheet resistance using only semiconductor thin films, but so far it has been possible to reduce the sheet resistance by 1 with a film thickness of 500 nm or less.
It has not been possible to make it below 0 ohm. To solve this problem, a method using semiconductor alloy films has recently been proposed. For example, in the case of an alloy film of silicon and titanium (titanium silicide), it is known that the sheet resistance can be lowered to about several ohms. However, in the manufacturing process of semiconductor devices that use silicon as a semiconductor substrate, for example, hydrofluoric acid is commonly used to clean the silicon surface, but since hydrofluoric acid significantly attacks silicide,
The drawback was that hydrofluoric acid could not be used to clean the silicide surface. When aluminum (At), which is commonly used as a metal for twisted wiring, is deposited on titanium silicide, the heat treatment after deposition causes the At to react with the silicide, damaging not only the underlying silicide layer but also the underlying silicide layer. There is a problem in that it reaches silicon l and deteriorates the electrical characteristics of the gate insulating film or source/drain junction of the semiconductor device.

Contrary to the properties of titanium silicide films, titanium nitride films are hardly attacked by hydrofluoric acid, are less likely to react with aluminum, and are conductors with relatively low resistivity. , was used to solve the aforementioned problem. The ninth semiconductor device devised by utilizing the characteristics of titanium nitride film is shown in Figure @4. In the same figure, the semiconductor layer remaining below the gate electrodes 4m and 4b is as follows.
This is to ensure controllability of the threshold voltage of the semiconductor device and to avoid reaction between the semiconductor alloy film and the gate insulating film 3.

An example of a conventional manufacturing method devised to realize this structure is shown in FIG. In the figure, 1 is a single crystal semiconductor substrate of the first conductivity type, 2 is an insulating film for laterally electrically insulating semiconductor devices, 3 is a gate insulating film, and 4 is a gate using a semiconductor. The electrode 4b is a gate electrode using an alloy thin film of semiconductor and titanium, and 13 is a titanium thin film.

In the conventional method, as shown in FIG. A semiconductor thin film 4 is formed.

Next, as shown in the same figure (b), the semiconductor thin film 4 for gate electrode is
After processing into predetermined dimensions to form gate electrode 4#,
This gate electrode 4' is covered with a first insulating film 12. Subsequently, a second insulating film 7 is deposited on the main surface side of the semiconductor substrate 1, and then,
The main surface side of the semiconductor substrate 1 on which the amorphous mark is formed is etched using a method such as reactive ion etching to leave the second insulating film T only on the side surfaces of the gate electrode. After that, desired amounts of impurities are introduced into the region to become the source, the region to become the drain, and the region to become the gate electrode, for example, by ion implantation to make these regions of the second conductivity type. After activation by heat treatment at, for example, 900° C. for about 15 minutes, the surfaces of these regions are exposed and a titanium thin film to be alloyed is deposited on the main surface side of the semiconductor substrate 1. Next, as shown in FIG. 1C, the semiconductor substrate 1 is heat-treated in an argon gas atmosphere at a predetermined temperature, for example, 550°C to 600°C, for about 30 minutes to form a gate electrode made of an alloy film of titanium and a semiconductor. 4b, source region 5b, and drain region 6b, unreacted titanium is removed. Thereafter, the gate electrode 4b and the source region 5b are heat-treated at a predetermined temperature, for example, 850° C. to 900° C. for about 30 minutes in a nitrogen gas atmosphere.

Titanium nitride film openings a and 11b are formed on the drain region 6b.

11o is formed. Next, as shown in FIG. 4(d), after forming an insulating film 8 for electrically insulating between the electrodes, a contact e hole is opened to expose a part of the titanium nitride films 11a and llb, and then the north 1! A pole 9 and a drain electrode 10 are formed.

[Problem to be solved by the invention]

Three major problems occur in the above manufacturing method. This will be explained using FIG. In the figure, 14 is a metal impurity contained in the titanium nitride film 110. The first problem is the following general rule. That is, Fig. 5 (
In b), a sputtering method is usually adopted as a method for depositing a titanium thin film on a semiconductor film, but in the case of this method, the purity of the deposited thin film does not exceed the purity of the target. The highest target purity is currently 99.99.
I am in charge of 99. Therefore, from Fig. 5(b) to Fig. 5(c)
) When a sample is heat-treated to cause a reaction between titanium and a semiconductor film, or when the silicide surface is nitrided, iron (Fe) mixed into the titanium thin film from the target
Transition metal elements such as sodium (N&).

At the same time, an alkali metal impurity 14 such as potassium (6) is diffused toward the gate insulating film. These metal impurities 14 cause thermal instability in the operating characteristics of the semiconductor device and a decrease in the withstand voltage of the gate insulating film 3. Furthermore, the diffusion coefficient of the impurity metal mentioned above is larger than that of titanium atoms undergoing an alloying reaction, and the metal diffuses to a deeper position or near the bottom of the source region 5m and drain region 6a. This significantly increases leakage current between the drain and the substrate and between the source and drain of the semiconductor device. Second, until now, when a titanium film was deposited on the surface of a semiconductor film, the semiconductor film was exposed and then attached to the titanium film deposition equipment, so oxygen in the air was adsorbed onto the semiconductor film surface during the process. I couldn't avoid it. As a result, when the titanium film is deposited, a layer containing a large amount of oxygen remains at the interface Vζ between the titanium film and the semiconductor film. If heat treatment is performed in this state, the layer containing oxygen at the interface between the titanium film and the semiconductor film will suppress the reaction, and not only will the reaction temperature substantially increase, but it will also become an obstacle to a uniform reaction, and the gate electrode 4a and 4
b, the interface between source regions 5& and 5b, and the interface between drain regions 6a and 6b are no longer flat. Therefore, not only does this cause variations in the operating characteristics of semiconductor devices, but when the alloy film reaches the gate insulating film 3, the alloy often corrodes the gate insulating film 3 and causes damage to the semiconductor substrate 1.
There was a problem that it could get mixed in. Third, there is a problem in that radioactive elements in the deposited titanium film induce soft errors.

Due to these problems, this type of semiconductor device and its manufacturing method have not been completed to date, despite their advantages.

Therefore, the present invention has been made in view of the above-mentioned conventional problems, and its purpose is to provide a gate electrode that uses both an alloy film of titanium and a semiconductor film and a semiconductor film, or a gate electrode that uses the same alloy film and a semiconductor film. An object of the present invention is to provide a method for manufacturing a semiconductor device that can improve the overall operating characteristics, stability, and yield of a semiconductor device having the above-mentioned film structure while lowering the resistance of the source/drain region by using be.

[Means to solve the problem]

The method for manufacturing a semiconductor device of the present invention first uses a semiconductor film as a gate electrode base material, deposits a semiconductor nitride film on the semiconductor film, and deposits a semiconductor nitride film on a semiconductor source region and a semiconductor drain region. After the deposition, titanium (Tl) is introduced into the semiconductor region and the semiconductor nitride film by an ion implantation method, and then a semiconductor/titanium alloy layer and a titanium nitride layer are simultaneously formed by heat treatment. By providing a shield on the side wall of the gate electrode,
Ti ions are implanted into the source region, the drain region, and the gate electrode region to electrically insulate and isolate the titanium compound layers formed.

[Effect]

In the present invention, the interface between the manufactured alloy film and the lower semiconductor layer or lower semiconductor region is smooth, and unnecessary impurities are not mixed in, so that the operating characteristics of the semiconductor device can be stabilized and the yield can be improved.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

FIGS. 1(-) to 1(f) are cross-sectional views of steps sb for explaining an embodiment of the method for manufacturing a semiconductor device according to the present invention, and the same parts as in the previous figures are given the same reference numerals.

In the figure, first, as shown in the figure (-), on a semiconductor of a first conductivity type, for example, a silicon substrate 1', an insulating film, for example, a silicon oxide film 2' and a gate insulating film, for laterally separating the semiconductor device, are formed. For example, a silicon oxide film 3' is formed, and a thin film for a gate electrode, for example a polycrystalline silicon film 4', is further formed on this silicon oxide film 3'. Next, as shown in FIG. 4B, the polycrystalline silicon film 4' is processed to a predetermined size to form a gate electrode 4#, and then this gate electrode 4', a source region 5, and a drain region 6 are formed. After exposing the region and postmortem, the entire surface of the gate electrode 4'', source region 5, and drain region 6 is covered with an insulating layer, for example, a silicon oxide film 15, and the main surface side of the silicon substrate 1' is further covered with, for example, a silicon oxide film 15. An insulating film different from that, for example, silicon nitride film 1
Cover with 6. Next, as shown in 1m (C), the gate electrode 4
``In order to leave the insulating film 16' only on the side wall portion, the silicon substrate 1
The silicon nitride film 16 is etched on the main surface side by reactive ion etching or the like without using a mask such as a resist. Thereafter, after exposing the gate electrode 4', the semiconductor region that will become the source region 5, and the semiconductor region that will become the drain region 6 on the main surface side of the silicon substrate 1', an insulating film, such as silicon oxide, is again deposited on these regions. A film 17f is formed. Thereafter, impurities capable of forming second conductive shadow regions are introduced into these regions to form source or drain regions and are activated.

Next, as shown in FIG. 2D, only the insulating film 16' is selectively removed, and the semiconductor region that will become the gate electrode 4' and source region 5 on the main surface side of the silicon substrate 1' is then removed.

After exposing the semiconductor region that will become the drain region 6, an insulating film, for example a silicon nitride film 18, is again formed on these regions. Thereafter, the main surface side of the silicon substrate 1' is covered with a semiconductor, for example, a silicon film 19.

Thereafter, a mask is formed using a resist or the like so that the silicon film 19 is exposed only in the region of each semiconductor device arranged on the main surface side of the silicon substrate 1'. Thereafter, the main surface of the silicon substrate 1 is etched by, for example, an anticentric ion etching method to leave silicon films 191 to 19d on the side surfaces of the gate electrode 4'' of the semiconductor device and in areas where the semiconductor device is not formed. Titanium (T1) is applied to the main surface side of the substrate 1' with a predetermined energy, for example, 3
A predetermined amount, e.g. The semiconductor silicon and Tl are reacted with the silicon nitride film 18. As a result, a titanium-written silicide film 4b is formed in the source region 5 and drain region 6.

5b, 6b and titanium nitride films 22jL to 22e are formed. At this time, titanium silicide films 21&-21d are also formed on the upper surfaces of silicon films 19m-19d. Since this material is easily attacked by hydrofluoric acid, the silicon substrate 1' is immersed in hydrofluoric acid to remove only the titanium silicide films 22&-228. Silicon films 19a' to 19d' that are expected to remain
is removed by plasma etching, etc. Finally, the same figure (
As shown in f), an insulating film, for example, a silicon oxide film 8, is deposited on the main surface side of the silicon substrate 1', contact holes are formed at predetermined locations, and then a source electrode 9 and a drain electrode 10 are formed. .

It should be noted that the steps explained in FIGS. 3(b) to 4(d) are not limited to the order of the steps in the embodiment described above, and may be performed in the following manner. That is, in the above step, the source region 5. Drain region5.
Drain region6. Impurity ion implantation for reducing the resistance of the gate electrode 4N may be performed after titanium ion implantation.

In the above step, after removing the insulating film 16' shown in FIG.
9 is deposited, and after processing the silicon film 19 as shown in FIG. 5(d), the exposed silicon oxide film 17 is removed to form a source region 5.9 in which the silicon semiconductor is exposed. Drain region6. A step of forming the silicon nitride film 18 only on the gate electrode 4' and then implanting titanium ions may be performed.

In addition, in the step shown in FIG. 5(d) described above, after depositing the silicon nitride film 18, a silicon oxide film 1T is successively formed thereon, and a silicon film 19 is further formed on it. ), the silicon film 19 may be processed, the exposed silicon oxide film IT may be removed, and then titanium ions may be implanted.

Figure 2 shows that a p-n junction was actually formed on the surface of a silicon semiconductor, and then titanium was introduced into the silicon nitride film and silicon semiconductor region by ion implantation based on the method of the present invention, and heat treatment was performed. This is an example of measurement of reverse current versus reverse voltage characteristics of a p+-n junction. The main manufacturing conditions for the p-n junction are shown in Bag 1 below. Reverse direction f of p-n junction! Comparing the current at an applied voltage of -5 V, when titanium silicide is formed using the conventional method, the reverse current value increases by about one order of magnitude, whereas when fabricated using the method of the present invention, the current increases, that is, the characteristics deteriorate. It turns out that there are few.

Table 3 shows that an n-p junction is actually formed on the surface of a silicon semiconductor, and then υ titanium is introduced into the silicon nitride film and silicon semiconductor region by ion implantation based on the method of the present invention, and heat treatment is performed. This is an example of measurement of reverse current versus reverse voltage characteristics of an n+-p junction. Table 2 shows the main manufacturing conditions for the n-p junction. Comparing the reverse current of the n-p junction at an applied voltage of 5V, it is found that when titanium silicide is formed using the conventional method, the reverse current value not only increases by about 6 orders of magnitude, but also the breakdown voltage deteriorates. It can be seen that when manufactured using the method described above, the increase in current can be suppressed to about two digits, and there is no deterioration in breakdown voltage.

〔Effect of the invention〕

As explained above, according to the present invention, the following effects can be obtained.

(1) Since titanium is introduced into the semiconductor film by ion implantation, unnecessary impurities are not mixed into the semiconductor device. Therefore, it is possible to lower the resistance of the layer containing titanium, and at the same time prevent deterioration of the operating characteristics of the semiconductor device.
Yield is improved.

(11) Furthermore, since titanium is directly introduced into the semiconductor using the ion implantation method, there is no problem that the reaction is inhibited by a large amount of oxygen present at the interface between the titanium film and the semiconductor film, which is the case with conventional methods. Therefore, for example, when forming an alloy film of titanium and silicon, the alloy can be formed at a temperature of about 700° C., which is 100 to 150° C. lower than the conventional temperature.

(Ill') Because alloying can be done at lower temperatures than before,
The alloying process hardly affects the impurity concentration distribution in the source/drain regions of the semiconductor device. This is extremely advantageous, for example, in forming shallow source/drain junctions necessary for downsizing semiconductor devices.

(1v) Since titanium is directly introduced into the semiconductor film by ion implantation, the reaction progresses essentially uniformly, and the interface between the two becomes smooth. Thereby, the yield of semiconductor devices can be improved.

(■) Since the titanium nitride film can be formed simultaneously by heat treatment after titanium ion implantation, the process can be simplified.

(vl) Since the titanium nitride layer/semiconductor alloy layer region can be manufactured in a self-aligned manner, the semiconductor device can be made smaller.

It can promote higher performance.

[Brief explanation of the drawing]

FIGS. 1(a) to (f) are cross-sectional views of steps for explaining an embodiment of the method for manufacturing a semiconductor device according to the present invention, and FIG. Figure 3 shows the measurement results of reverse current versus reverse voltage characteristics of a p-n junction in which titanium is introduced by ion implantation into a silicon nitride film and a silicon semiconductor region and heat treated based on the method of the invention. The figure shows an n-p structure in which an n+ junction was actually formed on the surface of a silicon semiconductor, and then, based on the method of the present invention, nitride was introduced into the silicon nitride film and silicon semiconductor region by ion implantation, and heat treatment was performed.
A diagram showing the measurement results of the reverse current vs. reverse voltage characteristics of a junction, Figure 4 is a cross-sectional view of a conventional semiconductor device, and Figure 5 (,)~
(d) is a cross-sectional view of a process for explaining a conventional method for manufacturing a semiconductor device, and FIG. 6 is a cross-sectional view of a main part of a semiconductor device for explaining problems in the conventional method for manufacturing a semiconductor device. 1'・φ・Conductivity type silicon substrate (semiconductor substrate)
, 2'... Silicon oxide film (insulating film), 3'...
・Silicon oxide film (gate insulating film), 4'--Polycrystalline silicon film, 4'--Gate electrode, 4b...Fist-
Titanium silicide film, 5 - source region (semiconductor region of second conductivity type), 5 &... source region of second conductivity type, 5b - - titanium e-silicide film, 60 -
・Drain region, 6 & . . . Drain region of second conductivity type, 6 b ・ Self-titanium layer 7 Reside film, 8 ・ Silicon oxide film, 9 ・ Source electrode, 10 ・ Drain Electrodes, 11a to 11c --- Titanium nitride film,
12...Insulating film, 15-...Silicon oxide film, 1
6...Silicon nitride film, 16'...Insulating film, 1
T...Fist/Silicon oxide film, 18...Silicon nitride film, 19.19a to 19d. 19&'P+-19d' 111111 No. 7 recon membrane, 20 @ e * aT1 ion, 21a to 21d
e a * a Silicon film implanted with Ti ions, 2
21-22C--titanium nitride film. Patent Applicant Nippon Telegraph and Telephone Corporation Figure 1 Representative Masaki Yamakawa (and 1 other person) Figure ← Pτ Exit 11F Snake (V)

Claims (1)

[Claims] In a method for manufacturing a field effect semiconductor device, two side surfaces of a gate electrode formed on a first insulating film on a semiconductor substrate in a direction normal to the upper surface of the first insulating film immediately below the side surfaces of the gate electrode are formed on a first insulating film on a semiconductor substrate. a step of forming a second insulating film group made of at least one type of film on at least a portion thereof; and at least a portion of the gate electrode, a semiconductor region serving as a source region, a semiconductor region serving as a drain region, or these semiconductors. a step of forming a semiconductor nitride film on at least a portion of the region; a step of forming a semiconductor film adjacent to the second insulating film group; a semiconductor region that will become the gate electrode, the source region, and the drain region; A method of manufacturing a semiconductor device, comprising the step of ion-implanting titanium into a semiconductor region and a semiconductor nitride film.