JPH0232414A - Over-current limiting circuit - Google Patents
Over-current limiting circuitInfo
- Publication number
- JPH0232414A JPH0232414A JP63181590A JP18159088A JPH0232414A JP H0232414 A JPH0232414 A JP H0232414A JP 63181590 A JP63181590 A JP 63181590A JP 18159088 A JP18159088 A JP 18159088A JP H0232414 A JPH0232414 A JP H0232414A
- Authority
- JP
- Japan
- Prior art keywords
- current
- semiconductor integrated
- overcurrent
- integrated circuit
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 30
- 230000010365 information processing Effects 0.000 claims description 8
- 230000006378 damage Effects 0.000 abstract description 3
- 238000001514 detection method Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 2
- 238000011144 upstream manufacturing Methods 0.000 description 1
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- Power Sources (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は半導体集積回路の電源供給に係わり、特にその
過電流を制限する過電流制限回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to power supply for semiconductor integrated circuits, and particularly to an overcurrent limiting circuit for limiting overcurrent thereof.
一般に、情報処理システムのディジタル回路は複数個の
半導体集積回路で構成され、これら複数個の半導体集積
回路には電源ユニットから電源が供給される。この電源
ユニットは複数個の電源モジュールから成り、各々の電
源モジュールはそれぞれ自己の分担する複数個の半導体
集積回路に対して電源を供給する。Generally, a digital circuit of an information processing system is composed of a plurality of semiconductor integrated circuits, and power is supplied to these plurality of semiconductor integrated circuits from a power supply unit. This power supply unit consists of a plurality of power supply modules, and each power supply module supplies power to the plurality of semiconductor integrated circuits that it is responsible for.
このような情報処理システムの過電流検出は、電源ユニ
ットに設けられた過電流検出機構で各々の電源モジニー
ルの過電流を検出することによって行われている。Overcurrent detection in such an information processing system is performed by detecting overcurrent of each power supply module using an overcurrent detection mechanism provided in a power supply unit.
ところが、上述の過電流検出機構による過電流検出は主
として各々の電源モジュールの過電流検出であるので、
個々の半導体集積回路の過電流が検出できない。従って
、半導体集積回路1個に対する過電流が発生しても電源
モジュールから見れば微増であるから、そのような過電
流を検出できないことがある。However, since overcurrent detection by the above-mentioned overcurrent detection mechanism mainly detects overcurrent of each power supply module,
Overcurrents in individual semiconductor integrated circuits cannot be detected. Therefore, even if an overcurrent occurs for one semiconductor integrated circuit, it is a slight increase from the power supply module's perspective, so such an overcurrent may not be detected.
また、過電流検出機構が故障し、過電流検出が不能とな
った場合には、大規模の電流が半導体集積回路内部に流
入し、半導体集積回路を破壊してしまうおそれがある。Furthermore, if the overcurrent detection mechanism fails and overcurrent detection becomes impossible, a large amount of current may flow into the semiconductor integrated circuit, potentially destroying the semiconductor integrated circuit.
従って、本発明の目的は個々の半導体集積回路の過電流
を検出し、過電流による半導体集積回路の破壊を防止す
ることのできる過電流制限回路を得ることにある。SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide an overcurrent limiting circuit that can detect overcurrents in individual semiconductor integrated circuits and prevent damage to the semiconductor integrated circuits due to overcurrents.
本発明の過電流制限回路は、各々の半導体集積回路に実
装され、半導体集積回路に流入する流入電流値を検出す
る電流検出手段と、この電流検出手段で検出した流入電
流値と予め定めた過電流制限値とを比較する比較手段と
、この比較手段の比較により流入電流値が予め定めた過
電流制限値以上であると判定されたときは流入電流を過
電流制限値に制限する電流制限手段とからなることを特
徴とする。The overcurrent limiting circuit of the present invention is implemented in each semiconductor integrated circuit, and includes a current detection means for detecting an inflow current value flowing into the semiconductor integrated circuit, and a predetermined overcurrent value and an inflow current value detected by the current detection means. a comparison means for comparing the inflow current with a current limit value, and a current limiter for limiting the inflow current to the overcurrent limit value when it is determined that the inflow current value is equal to or higher than a predetermined overcurrent limit value as a result of the comparison between the comparison means. It is characterized by consisting of.
個々の半導体集積回路で過電流を検出し、半導体集債回
路に流入する流入電流を過電流制限値に制限するので、
半導体集積回路の焼損等の破壊を防止し情報処理システ
ムの安全性を向上できる。Overcurrent is detected in each semiconductor integrated circuit, and the inflow current flowing into the semiconductor integrated circuit is limited to the overcurrent limit value.
It is possible to prevent destruction such as burnout of semiconductor integrated circuits and improve the safety of information processing systems.
第1図は本発明の過電流制限回路のブロック構成図であ
る。電源モジュールからの電流は電源供給線11Aを通
って電流制限手段12に供給される。電流制限手段12
は比較手段13からの制限指令Sがない限りは電源供給
線11Aから供給される電流に制限を加えることなく電
源供給線11Bを介して電流検出手段14に供給する。FIG. 1 is a block diagram of an overcurrent limiting circuit according to the present invention. Current from the power supply module is supplied to the current limiting means 12 through the power supply line 11A. Current limiting means 12
is supplied to the current detection means 14 via the power supply line 11B without limiting the current supplied from the power supply line 11A unless there is a restriction command S from the comparison means 13.
電流検出手段14は電源供給線11Bから供給される電
流を電源供給線11Cに通過させるとともに、通過する
電流の値Iを検出する。ここで検出された電流値Iは比
較手段13に入力され、予め定めた過電流制限値I。と
比較される。The current detection means 14 allows the current supplied from the power supply line 11B to pass through the power supply line 11C, and detects the value I of the passing current. The current value I detected here is input to the comparison means 13, and is determined as a predetermined overcurrent limit value I. compared to
比較手段13では検出された電流値■が予め定めた過電
流制限値I。以上であるときは電流制限手段12に対し
、制限指令Sを出力する。一方、電流値Iが過電流制限
値10未満であるときは制限指令Sは出力されない。In the comparison means 13, the detected current value ■ is the predetermined overcurrent limit value I. If this is the case, a limiting command S is output to the current limiting means 12. On the other hand, when the current value I is less than the overcurrent limit value 10, the limit command S is not output.
制限指令Sが電流制限手段12に人力されると、電流制
限手段12は電源供給線11Aから供給される電流に制
限を加え、電源供給線11Bに供給される電流を過電流
制限値I。に制限する。When the limit command S is manually input to the current limiter 12, the current limiter 12 limits the current supplied from the power supply line 11A, and the current supplied to the power supply line 11B is reduced to the overcurrent limit value I. limited to.
これによって、電源供給線11Cに流れる電流は過電流
制限値I。に制限されることになり、半導体集積回路に
流入する流入電流が過大になることを防止できる。As a result, the current flowing through the power supply line 11C reaches the overcurrent limit value I. Therefore, the current flowing into the semiconductor integrated circuit can be prevented from becoming excessive.
次iこ、第2図は本発明の過電流制限回路を半導体集積
回路15に実装した場合の説明図であり、半導体集積回
路15の情報処理回路16への電源の供給は電源供給線
11Cを通して行われる。すなわち、情報処理回路16
の電源供給線11Cの前段に本発明の過電流制限回路を
設ける。これによって、半導体集積回路15の中核をな
す情報処理回路16が保護できる。Next, FIG. 2 is an explanatory diagram when the overcurrent limiting circuit of the present invention is mounted on the semiconductor integrated circuit 15. Power is supplied to the information processing circuit 16 of the semiconductor integrated circuit 15 through the power supply line 11C. It will be done. That is, the information processing circuit 16
The overcurrent limiting circuit of the present invention is provided upstream of the power supply line 11C. Thereby, the information processing circuit 16 that forms the core of the semiconductor integrated circuit 15 can be protected.
以上述べたように、本発明によれば半導体集積回路上に
過電流制限回路を実装することにより、半導体集積回路
内部へ過大電流が流入することを防止することができる
。また外部に特別な保護回路を設けなくとも半導体集積
回路はもちろん、それに付随して設けられるパッケージ
等の構成部品の保護も図ることができる。As described above, according to the present invention, by mounting an overcurrent limiting circuit on a semiconductor integrated circuit, it is possible to prevent excessive current from flowing into the semiconductor integrated circuit. In addition, it is possible to protect not only the semiconductor integrated circuit but also components such as a package attached to the semiconductor integrated circuit without providing a special protection circuit externally.
第1図は本発明の過電流制限回路の一実施例を示すブロ
ー)り構成図、第2図は本発明の過電流制限回路を半導
体集債回路に実装した場合の説明図である。
11・・・・・・電源供給線、12・・・・・・電流制
限手段、13・・・・・・比較手段、14・・・・・・
電流検出手段、15・・・・・・半導体集積回路、
16・・・・・・情報処理回路。
出 願 人 日本電気株式会社
代 理 人 弁理士 山内梅雄FIG. 1 is a block diagram showing one embodiment of the overcurrent limiting circuit of the present invention, and FIG. 2 is an explanatory diagram of the overcurrent limiting circuit of the present invention implemented in a semiconductor integrated circuit. 11... Power supply line, 12... Current limiting means, 13... Comparing means, 14...
Current detection means, 15... semiconductor integrated circuit, 16... information processing circuit. Applicant NEC Corporation Representative Patent Attorney Umeo Yamauchi
Claims (1)
導体集積回路に実装され、前記半導体集積回路に流入す
る流入電流値を検出する電流検出手段と、この電流検出
手段で検出した流入電流値と予め定めた過電流制限値と
を比較する比較手段と、この比較手段の比較により前記
流入電流値が前記過電流制限値以上であると判定された
ときは前記流入電流を前記過電流制限値に制限する電流
制限手段とからなる過電流制限回路。A current detecting means that is mounted on each semiconductor integrated circuit constituting a digital circuit of an information processing system and detects an inflow current value flowing into the semiconductor integrated circuit, and a predetermined inflow current value detected by the current detecting means. a comparison means for comparing the inflow current value with an overcurrent limit value; and a current that limits the inflow current to the overcurrent limit value when the comparison means determines that the inflow current value is greater than or equal to the overcurrent limit value. An overcurrent limiting circuit consisting of limiting means.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63181590A JPH0232414A (en) | 1988-07-22 | 1988-07-22 | Over-current limiting circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63181590A JPH0232414A (en) | 1988-07-22 | 1988-07-22 | Over-current limiting circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0232414A true JPH0232414A (en) | 1990-02-02 |
Family
ID=16103470
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63181590A Pending JPH0232414A (en) | 1988-07-22 | 1988-07-22 | Over-current limiting circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0232414A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04160519A (en) * | 1990-10-24 | 1992-06-03 | Nec Corp | Power supply control circuit |
JP2007304986A (en) * | 2006-05-12 | 2007-11-22 | Fuji Electric Fa Components & Systems Co Ltd | Overcurrent control circuit |
-
1988
- 1988-07-22 JP JP63181590A patent/JPH0232414A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04160519A (en) * | 1990-10-24 | 1992-06-03 | Nec Corp | Power supply control circuit |
JP2007304986A (en) * | 2006-05-12 | 2007-11-22 | Fuji Electric Fa Components & Systems Co Ltd | Overcurrent control circuit |
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