JPH01227623A - Fault detecting circuit - Google Patents
Fault detecting circuitInfo
- Publication number
- JPH01227623A JPH01227623A JP5293288A JP5293288A JPH01227623A JP H01227623 A JPH01227623 A JP H01227623A JP 5293288 A JP5293288 A JP 5293288A JP 5293288 A JP5293288 A JP 5293288A JP H01227623 A JPH01227623 A JP H01227623A
- Authority
- JP
- Japan
- Prior art keywords
- rectifier
- output
- detection circuit
- circuit
- overvoltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 claims description 24
- 238000010586 diagram Methods 0.000 description 5
- 230000000903 blocking effect Effects 0.000 description 3
- 230000007423 decrease Effects 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000005856 abnormality Effects 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
Landscapes
- Protection Of Static Devices (AREA)
- Rectifiers (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は故障検出回路に関するもので、さらに詳しく言
えば蓄電池を充電しながら負荷に直流出力を供給する直
流電源装置における並列接続された整流器の故障検出回
路に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a failure detection circuit, and more specifically, failure detection of parallel-connected rectifiers in a DC power supply device that supplies DC output to a load while charging a storage battery. It is related to circuits.
従来技術とその問題点
蓄電池を充電しながら負荷に直流出力を供給する直流電
源装置は、負荷の省電力化、装置の小型化要求により、
装置内の整流器が複数台並列に接続できるユニット式の
ものが用いられるようになり、並列に接続するユニット
の数を増減させて負荷容量の増減に対応している。一方
、このような装置では、従来より整流器の出力側に阻止
用ダイオードが挿入されていたが、整流器の出力電圧精
度の低下や効率の低下の原因になるため、近年は阻止用
ダイオードを挿入せずに用いられる場合が多くなってき
ている。このような場合、整’ｆＭ 器内に設けられた
故障検出回路、たとえは不足電圧検出回路は、その整流
器が故障して出力電圧が零になっていても、並列に接続
された他の正常な整流器からの出力電圧や蓄電池の電圧
が前記不足電圧検出回路に印加中れるため、不足電圧検
出回路は動作せず、故障していても正常であるかの如き
印象を与えたり、正常な整流器から電流が流入して電流
検出回路を誤動作させてしまうという欠点があった。Conventional technology and its problems DC power supply devices that supply DC output to loads while charging storage batteries are becoming more and more popular due to demands for power saving of loads and miniaturization of devices.
Unit-type rectifiers have come into use in which multiple rectifiers can be connected in parallel, and the number of units connected in parallel can be increased or decreased to accommodate increases or decreases in load capacity. On the other hand, in such devices, a blocking diode has traditionally been inserted on the output side of the rectifier, but in recent years it has become necessary to insert a blocking diode because it causes a decrease in the output voltage accuracy and efficiency of the rectifier. Increasingly, it is being used without In such a case, a fault detection circuit, for example an undervoltage detection circuit, installed in the rectifier will detect other normal connected rectifiers even if the rectifier fails and the output voltage becomes zero. Since the output voltage from the rectifier and the voltage of the storage battery are being applied to the undervoltage detection circuit, the undervoltage detection circuit does not operate, giving the impression that it is normal even if it is faulty, or even if the rectifier is in normal condition. This has the disadvantage that current flows into the circuit, causing the current detection circuit to malfunction.
発明の目的
本発明は上記欠点を解消するもので、製流器の電圧−電
流特性が許容範囲から逸脱したことを検出することによ
り、整流器が並列に接続されたユ＝ツ）式の装置におい
ても正確に故障が検出できる故−検出回路を得ることを
目的とする。OBJECT OF THE INVENTION The present invention solves the above-mentioned drawbacks.It is an object of the present invention to detect that the voltage-current characteristics of the rectifier deviate from the permissible range, and to detect the deviation of the voltage-current characteristic of the rectifier from the permissible range. The object of the present invention is to obtain a detection circuit that can accurately detect failures.
発明の構成
本発明の故障検出回路は、整流器の電圧−電流特性が許
容範囲から逸脱した時を故障モードとし、この状態を検
出する論理回路を設け、この論理回路により前記故障モ
ードが検出された時に警報を発生させるか、整流器を停
止させるものである。Structure of the Invention The failure detection circuit of the present invention defines a failure mode when the voltage-current characteristics of the rectifier deviates from an allowable range, and is provided with a logic circuit for detecting this state, and the failure mode is detected by this logic circuit. This will either generate an alarm or stop the rectifier.
実施例
以下実施例により説明する。第１図は本発明の故障検出
回路における故障モードを示す図、第２図は本発明の故
障検出回路の回路図である。EXAMPLES The present invention will be explained below using examples. FIG. 1 is a diagram showing failure modes in the failure detection circuit of the present invention, and FIG. 2 is a circuit diagram of the failure detection circuit of the present invention.
第１図に示したように、故障モードは過電圧モード、過
電流モード、不足電恍不足電流モードがあり、これらの
モードにならない範囲が電圧−電流゛特性の許容範囲で
ある。第２図は前記許容範囲を逸脱したこと誉検出する
論理回路１を整流器２に設けた故障検出回路の回路図で
、この論理回路１の出力により整流器２に警報を発生さ
せるか、整流器２を停止させるものである。As shown in FIG. 1, the failure modes include overvoltage mode, overcurrent mode, and undervoltage/undercurrent mode, and the range in which these modes do not occur is the permissible range of the voltage-current characteristic. FIG. 2 is a circuit diagram of a failure detection circuit in which a logic circuit 1 is installed in a rectifier 2 to detect a deviation from the above-mentioned allowable range. It is something that makes it stop.
次に第１図、第２図により動作を説明する。Next, the operation will be explained with reference to FIGS. 1 and 2.
過電圧モードによる故障は、整流＠′６２の出力電圧の
制御機能が破壊された場合に発生し、出力端子３，６′
間に接ｉされる負荷に過電圧が印加されないよう舎こす
るもので、論理回路１内の過電圧検出回路１人によって
過電圧が検出されると、たとえはＨレベルの出力が発生
するように構成され、この出力は論理回路１内の第１の
ＯＲゲート１−１の一方に入力される。次に過電流電−
ドによる故障は、整流器２の垂下機能が破壊された場合
ｅこ発生し、整流器２が過電流によって破壊されないよ
うにするもので、電流検出器４によって検出された過電
流信号が過電流検出回路１Ｂに入力されると、たとえば
該回路１Ｂの出力がＨレベルになるように構成され、こ
の出力は論理回路１内め第１のＯＲゲート１−１の他方
に入力される。前記第１のＯＲゲート１−１の出力は、
第２のＯＲゲート１−２の一方に入力される。従って過
電圧モードまたは過電流モードによる故障が発生した場
合、前記第１のＯＲゲート１−１の出力はＨレベルにな
り、第２のＯＲゲート１−２の出力も■レベルになる。Failure due to overvoltage mode occurs when the control function of the output voltage of the rectifier @'62 is destroyed, and the output terminals 3 and 6'
This is to prevent overvoltage from being applied to the load connected between the logic circuit 1 and the logic circuit 1. If an overvoltage is detected by one overvoltage detection circuit in the logic circuit 1, an H level output is generated. , this output is input to one of the first OR gates 1-1 in the logic circuit 1. Next, the overcurrent
Failures due to overcurrent occur when the drooping function of the rectifier 2 is destroyed, and the purpose is to prevent the rectifier 2 from being destroyed by overcurrent. 1B, the output of the circuit 1B becomes H level, and this output is input to the other of the first OR gates 1-1 in the logic circuit 1. The output of the first OR gate 1-1 is
It is input to one of the second OR gates 1-2. Therefore, when a failure occurs due to overvoltage mode or overcurrent mode, the output of the first OR gate 1-1 becomes H level, and the output of the second OR gate 1-2 also becomes level 2.
このＨレベル信号により、整流器２１ｃ警報を発生させ
るか、整流器２を停止させるように構成するものである
。次に不足電圧、不足電流モードによる故障は、整流器
２の出力電圧の制御機能が異常になった場合に発生し、
出力端子３．３′間に接続される負荷に異常がなけれは
、二の不足電圧、不足電流モードによる故障は同時に発
生する。すなわち、不足電流が不足電流検出回路１Ｃに
より検出されると、たとえば該回路１Ｃの出力がＨレベ
ルになるように構成され、不足電圧が不足電圧検出回路
１Ｄにより検出されると、たとえば該回路１Ｄの出力が
Ｈレベルになるように構成される。そして前記各回路１
０ 、ＩＤの出力はＡＮＤゲート１−３にそれぞれ入力
され、不足電圧、不足電流モードによる故障が同時に発
生した場合にのみ前記第２のＯＲゲート１−２の他方が
ＩレベルになるようにＡＮＤゲート１−３の゛出力を前
記第２のＯＲゲート１−２の他方に入力する。従って不
足電圧、不足電流モードによる故障が発生した場合、第
２のＯＲゲート１−２の出力が窮しベμになって整流器
２に警報を発生させるか、整流器２を停止させるように
構成することができる。This H level signal is configured to generate an alarm for the rectifier 21c or stop the rectifier 2. Next, failures due to undervoltage and undercurrent mode occur when the control function of the output voltage of rectifier 2 becomes abnormal.
Unless there is an abnormality in the load connected between the output terminals 3 and 3', failures due to the two undervoltage and undercurrent modes occur simultaneously. That is, when an undercurrent is detected by the undercurrent detection circuit 1C, for example, the output of the circuit 1C is configured to become H level, and when an undervoltage is detected by the undervoltage detection circuit 1D, for example, the output of the circuit 1D is The output is configured to be at H level. and each circuit 1
The outputs of 0 and ID are input to AND gates 1-3, respectively, and are ANDed so that the other of the second OR gates 1-2 becomes I level only when failures due to undervoltage and undercurrent modes occur simultaneously. The output of gate 1-3 is input to the other of the second OR gates 1-2. Therefore, when a failure occurs due to undervoltage or undercurrent mode, the output of the second OR gate 1-2 becomes extremely low and the configuration is configured such that an alarm is generated in the rectifier 2 or the rectifier 2 is stopped. be able to.
上記実施例では、各モードによる故障の検出信号を一括
して整流器２に入力しているが、過電圧モード、過電流
モード、不足電圧、不足電流モードを個別に整流器２に
入力してもよいことはｌうまでもない。In the above embodiment, the failure detection signals for each mode are input to the rectifier 2 all at once, but the overvoltage mode, overcurrent mode, undervoltage, and undercurrent modes may be input to the rectifier 2 individually. It goes without saying.
発明の効果
実施例において詳述した如く、本発明の故障検出回路は
、整流器の電圧−電流特性が許容範囲から逸脱したこと
を検出しているので、阻止用ダイオードを用いずに整流
器を並列接続してなる直流電源装置においても、整流器
の故障を確実に検出することかできる。Effects of the Invention As detailed in the embodiment, the failure detection circuit of the present invention detects that the voltage-current characteristics of the rectifier deviate from the allowable range, so it is possible to connect the rectifiers in parallel without using a blocking diode. Even in a DC power supply device formed by the present invention, it is possible to reliably detect a failure in a rectifier.
第１図は本発明の故障検出回路における故障モードを示
す図、第２図は本発明の故障検出回路の回路図である。FIG. 1 is a diagram showing failure modes in the failure detection circuit of the present invention, and FIG. 2 is a circuit diagram of the failure detection circuit of the present invention.
Claims (1)
対し、出力電圧の過電圧を検出する過電圧検出回路が動
作する範囲と、出力電流の過電流を検出する過電流検出
回路が動作する範囲と、出力電圧の不足電圧を検出する
不足電圧検出回路と出力電流の不足電流を検出する不足
電流検出回路とが動作する範囲とを整流器の故障モード
とし、前記電圧−電流特性が前記故障モードにあること
を検出した時に出力を発生させる論理回路を設け、この
論理回路の出力により整流器に警報を発生させるか、整
流器を停止させる機能を備えたことを特徴とする故障検
出回路。Regarding the voltage-current characteristics of a rectifier with an output current drooping function, the range in which the overvoltage detection circuit that detects overvoltage of the output voltage operates, and the range in which the overcurrent detection circuit that detects overcurrent of the output current operates. , a range in which an undervoltage detection circuit that detects an undervoltage of the output voltage and an undercurrent detection circuit that detects an undercurrent of the output current operate is defined as a failure mode of the rectifier, and the voltage-current characteristic is in the failure mode. A failure detection circuit is provided with a logic circuit that generates an output when a failure is detected, and has a function of generating an alarm in a rectifier or stopping the rectifier based on the output of the logic circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63052932A JPH0720341B2 (en) | 1988-03-07 | 1988-03-07 | Fault detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63052932A JPH0720341B2 (en) | 1988-03-07 | 1988-03-07 | Fault detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH01227623A true JPH01227623A (en) | 1989-09-11 |
| JPH0720341B2 JPH0720341B2 (en) | 1995-03-06 |
Family
ID=12928620
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63052932A Expired - Lifetime JPH0720341B2 (en) | 1988-03-07 | 1988-03-07 | Fault detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0720341B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008054434A (en) * | 2006-08-25 | 2008-03-06 | Nec Computertechno Ltd | Power supply control unit, power supply system and method for controlling power supply |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6114838U (en) * | 1984-06-29 | 1986-01-28 | 富士電機株式会社 | Power converter failure detection device |
| JPS6323518A (en) * | 1986-07-14 | 1988-01-30 | 日本電気株式会社 | Electric source protecting system |
-
1988
- 1988-03-07 JP JP63052932A patent/JPH0720341B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6114838U (en) * | 1984-06-29 | 1986-01-28 | 富士電機株式会社 | Power converter failure detection device |
| JPS6323518A (en) * | 1986-07-14 | 1988-01-30 | 日本電気株式会社 | Electric source protecting system |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008054434A (en) * | 2006-08-25 | 2008-03-06 | Nec Computertechno Ltd | Power supply control unit, power supply system and method for controlling power supply |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0720341B2 (en) | 1995-03-06 |
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