JPH0231466A - Manufacture of non-volatile memory device - Google Patents

Abstract

PURPOSE:To prevent a device of this design from deteriorating in a data retaining characteristic by a method wherein a floating gate is patterned in a self-aligned manner with a control gate, and the semiconductor layer is oxidized to form a semiconductor oxide film on the side wall of the floating gate. CONSTITUTION:A floating gate, formed of a semiconductor material, and a control gate, composed of a layer which contains a high melting point metal, are subjected to a patterning process at the same time. In this process, as an example, a poly-silicon layer 3 can be used as the above semiconductor material. Next, these floating gate and control gate are covered with a semiconductor layer. The semiconductor layer is, for instance, a poly-silicon layer, and it is preferable that a pure poly-silicon layer 9 which contains no impurity is used. Then, the semiconductor layer is thermally oxidized to form a semiconductor oxide film 10 on the side wall of the floating gate. In this process, the semiconductor layer is oxidized through a thermal oxidation. As the semiconductor layer is provided surrounding the control gate, the layer containing a high melting point layer is prevented from being oxidized.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a non-volatile memory device having a structure in which a floating gate and a control gate are stacked. The present invention relates to a method of manufacturing a nonvolatile memory device in which a region is formed.

[Summary of the invention]

The present invention is a method for manufacturing a non-volatile memory device having a structure in which a floating gate and a control gate are stacked, in which the floating gate is patterned with a control gate and a self-line made of a layer containing a high-melting point metal, and these gates are formed on a semiconductor layer. By covering the floating gate with a semiconductor oxide film, the semiconductor layer is oxidized to reduce data retention characteristics.

3. Detailed Description of the Invention [Prior Art] As an electrode material for a control gate of a nonvolatile memory device, a wiring layer having a polycide structure in which a polysilicon layer and, for example, a tungsten silicide layer are laminated, is used instead of a conventional polysilicon layer. is being considered.

FIG. 2 is a sectional view of a main part of an element of a nonvolatile memory device in which a control gate has a polycide structure. A floating gate 23 made of polysilicon is formed on a silicon substrate 21 with an oxide film 22 interposed therebetween. A polysilicon Jilit 25 is formed on the floating gate 23 with an oxide film 24 interposed therebetween. This polysilicon layer 25
A tungsten silicide layer 26 is laminated thereon. These polysilicon layers 25 and tungsten silicide [2
6 constitutes a control gate.

When patterning each gate, from tungsten silicide N26 to floating gate 2 using one mask.
Cut up to 3. Furthermore, source/drain regions are formed for each gate and self-alignment line. By making the control gate a polycide structure in this way,
It is possible to respond to miniaturization by lowering the resistance of the electrode.

[Problems to be Solved by the Invention] However, when the control gate has a polycide structure, a problem arises regarding the quality of the oxide film surrounding the floating gate 23.

In the case where the control gate is formed of a polysilicon layer as in the prior art, a thermal oxide film can be provided on the side wall of the floating gate by thermally oxidizing it directly after patterning. However, when the control gate has a polycide structure, heat causes the tungsten silicide layer 2 to
6 diffuses, and the breakdown voltage between the control gate polysilicon N25 and the floating gate 23 deteriorates. In addition, when so-called pyro-oxidation is performed, W F is used to form tungsten silicide N26.
Since hydrofluoric acid is used, hydrofluoric acid is generated.

To solve this problem that the oxide film is removed with hydrofluoric acid, forming the oxide film by the CVD method is
Since the Wa quality of VD5 IOT H is not sufficient, the essential problem cannot be solved.When an oxide film of sufficient quality cannot be formed on the sidewalls of the floating gate, it leads to deterioration of data retention characteristics. .

Therefore, in view of the above-mentioned technical problems, the present invention provides a method for manufacturing a non-volatile memory device in which a layer containing a high-melting point metal such as a polycide structure is used as a control gate, and the present invention provides a method for manufacturing a non-volatile memory device in which a layer containing a high-melting point metal such as a polycide structure is used as a control gate. The purpose is to provide a manufacturing method that can

[Means to solve the problem]

A method for manufacturing a non-volatile memory device of the present invention to achieve the above object is based on a method for manufacturing a non-volatile memory device having a structure in which a control gate is stacked on a floating gate with an insulating film interposed therebetween. In the present invention, first, a floating gate formed of a semiconductor material and a control gate formed of a layer containing a high melting point metal are patterned simultaneously. For example, a polysilicon layer can be used as the semiconductor material. The layer containing a high melting point metal is a high melting point metal silicide layer, and a polycide layer consisting of a polysilicon layer and a high melting point metal silicide layer.

It is a single high melting point metal layer, etc., and the high melting point metals include tungsten, molybdenum, and tantalum.

The floating gate and control gate are covered with a semiconductor layer of zero order, such as titanium. This semiconductor layer is, for example, a polysilicon layer, and a pure polysilicon layer containing no impurities is preferably thermally oxidized to form a semiconductor oxide film on at least the sidewalls of the floating gate.

[Effect]

By patterning the floating gate and the control gate at the same time, each gate is aligned with one mask and formed. By covering each gate with a semiconductor layer, the top surface and sidewalls of the control gate are covered with the semiconductor layer. The sidewalls of the floating gate are also covered with the semiconductor layer.

Here, the semiconductor layer is oxidized by thermal oxidation. Since a semiconductor layer is provided around the control gate, oxidation of the layer containing the high melting point metal is prevented. Furthermore, a high quality oxide film is formed on the sidewalls of the floating gate by thermal oxidation.

〔Example〕

Preferred embodiments of the present invention will be described with reference to the drawings.

In this example, the control gate is an electrode with a polycide structure in which a tungsten silicide layer and a polysilicon layer are laminated, and the control gate is a floating gate, a source electrode, and a polycide structure.
This is a manufacturing method in which the drain region is formed by a control gate and a self-alignment line. Hereinafter, this embodiment will be explained according to its steps with reference to FIGS. 1a to 1g.

First, a gate oxide film 2 is formed on a P-type silicon substrate 1. Further, it is assumed that a field oxide film is formed on the surface of the P-type silicon substrate 1 as necessary. Furthermore, part of the gate oxide film 2 can be made into a tunnel oxide film. A polysilicon layer 3 is formed on this gate oxide film 2.

This polysilicon N3 functions as a floating gate. Then, a glabellar oxide film 4 is formed on the polysilicon layer 3. This interlayer oxide film 4 functions as a second gate oxide film between the floating gate and the control gate. The N open oxide film 4 may have an ONO structure via a nitride film, and as shown in FIG. 1i15 is selectively exposed and developed. This first pattern determines the channel width W of the transistor of the nonvolatile memory, and determines the pattern in the direction perpendicular to the cross section shown in FIG. 1a.

Next, etching is performed using this first pattern as a mask, and the interlayer oxide film 4. Pattern polysilicon N3. After this patterning, thermal oxidation is performed,
Furthermore, a second polysilicon layer 6 is formed on the entire surface including the patterned glabellar oxide film 4. Then the second
Tungsten silicide N7 is formed on the polysilicon layer N6. These second N-th polysilicon layer 6 and tungsten silicide layer 7 function as a control gate. Next, as shown in FIG. 1, a resist layer 8 is formed. The pattern of this resist layer 8 is a pattern that determines the gate length of the transistor, and is formed by selective exposure and development.

Next, anisotropic etching is performed using the resist layer 8 as a mask. This etching removes the polysilicon layer 3 and interlayer oxide film 4 that will become the floating gate, and the second layer of polysilicon N6 and tungsten silicide that will become the control gate. N7 is patterned at the same time. In other words, they are patterned using the same mask, and are formed with matching dimensions at least in the gate length direction, as shown in FIG. 1C. After patterning, resist layer 8 is removed.

After forming the control gate and the floating gate using the self-line, as shown in FIG. 1d, a thin pure polysilicon layer 9, which is a semiconductor layer, is formed on the entire surface. That is, this thin pure polysilicon layer 9 is provided on the sidewalls of polysilicon N3, and is further formed on the top surface and sidewalls of tungsten silicide layer 7 and the sidewalls of second layer polysilicon layer 6. The thickness of this thin pure polysilicon layer 9 changes color by, for example, about 200 layers.

Next, the thin pure polysilicon IW9 is thermally oxidized. Through this thermal oxidation, the thin pure polysilicon layer 9 becomes a silicon oxide film 10 of good quality. During this thermal oxidation,
For the above control gate, thin pure polysilicon Ji! 19 functions as a film for preventing oxidation, and as a result, diffusion of tungsten and the like are also prevented, thereby preventing deterioration of breakdown voltage between polysilicon N3 and N6. Furthermore, a high-quality silicon oxide film 10 is formed on the sidewalls of the polysilicon N3, which is the floating gate, and its data retention characteristics are not likely to deteriorate.

After such thermal oxidation, an N- type impurity diffusion region 1 is formed in a self-alignment line using the control gate etc. as a mask.
Ion implantation is performed to form 3.13.

Next, as shown in FIG. 1r, thick silicon oxide ff! 11 is formed by CVD method. This thick silicon oxide film 11 is formed for the sidewall of each gate. At this time, since a high quality silicon oxide film IO has already been provided on the side wall of the polysilicon layer 3, II
! Silicon oxide film 1 made by CVD method with insufficient Jff
1 is provided, its data retention characteristics will not deteriorate.

The silicon oxide film 11 is etched back to form sidewall portions 12.12 on the sidewalls of each gate. The sidewall portion 12.12 is located above the N- type impurity diffusion region 13.13. And, in those sidewall parts 12 and 12 and each gate and self-line,
Impurities are introduced at a high concentration to form N° type source/drain MMUI4.14 to complete the device.

In the method for manufacturing a nonvolatile memory device of this embodiment, the thin pure polysilicon layer 9 prevents the control gate made of the polysilicon layer 6 and the tungsten silicide layer 7 from being oxidized, thereby preventing adverse effects such as breakdown voltage deterioration. can. In other words, it is possible to increase the degree of freedom in setting oxidation conditions. A high-quality silicon oxide film 10 formed by thermal oxidation is provided around the floating gate, particularly on its sidewalls.

Therefore, deterioration of data retention characteristics is also prevented.

In the above embodiment, the control gate has a polycide structure, but other structures containing high-melting point metals may also be used.Also, although the semiconductor layer is a thin pure polysilicon layer 9, other high-quality oxidized silicon layers may be used. The nonvolatile memory device of the present invention may be made of a material that forms a film, and although a so-called LDD structure nonvolatile memory element is formed, the present invention is not limited thereto. can be changed.

〔Effect of the invention〕

In the method for manufacturing a nonvolatile memory device of the present invention, the semiconductor layer formed after patterning the floating gate and the control gate prevents oxidation of the control gate and prevents adverse effects such as breakdown voltage deterioration. Further, the semiconductor layer is thermally oxidized to become an oxide film for retaining data around the floating gate. Therefore, deterioration of the data retention characteristics of the nonvolatile memory device is also prevented.

3...Polysilicon layer 4...Interlayer oxide film 6...Second polysilicon layer 7...Tungsten silicide layer 9...Thin pure polysilicon layer 10...Silicon oxide film Patent applicant: Sony Corporation Representative Patent Attorney Akira Koba (and 2 others)

[Brief explanation of the drawing]

1a to 1g are process cross-sectional views for explaining an example of the method for manufacturing a nonvolatile memory device according to the present invention according to the steps, and FIG. FIG. 2 is a cross-sectional view of a main part of a digital memory device.

Claims (1)

[Claims] A method for manufacturing a non-volatile memory device having a structure in which a control gate is stacked on a floating gate via an insulating film, comprising: a floating gate formed of a semiconductor material and a layer containing a high melting point metal; a step of simultaneously patterning the floating gate and the control gate; a step of covering the floating gate and the control gate with a semiconductor layer; and a step of thermally oxidizing the semiconductor layer to form a semiconductor oxide film on at least the sidewalls of the floating gate. A method for manufacturing a non-volatile memory device.