JPH02311902A - Digital controller - Google Patents

Abstract

PURPOSE:To avoid the alias disturbance by inputting the output of a detector which detects the state of a control object to an HPF where the signal delay is approximately fixed at least at the passing band. CONSTITUTION:An HPF 13 has the bessel characteristic where the signal delay is approximately fixed at the passing band. Simultaneously, a digital compensator 15 calculates the control operation output based on the control algorithm where the compensator 15 compensates the delay time of the HPF 13 with the use of the output of an A/D converter 14 set precedingly by one sample. The calculated output is inputted to the control object. Thus it is possible to avoid the alias disturbance that causes a problem at the A/D conversion.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a digital control device for controlling the position, velocity, acceleration, force frequency, voltage, current, temperature, etc. of equipment.

In conventional digital control devices, the operating state of the controlled object is detected by a detector, and the output signal is converted into a digital quantity by an analog-to-digital converter. If a frequency component higher than 1/2 of the conversion sampling frequency is included, 1/2 of the sampling frequency is included.
Frequency components higher than 2 are folded back between 0 and 1/2 of the sampling frequency, and the output of the analog-to-digital converter is distorted. This phenomenon is generally called alias interference.

Therefore, in order to avoid this alias interference, analog
It is necessary to install a high-frequency removal filter in front of the digital converter to remove unnecessary high-frequency components, but since the high-frequency removal filter involves quite a bit of phase lag, it may make the control system unstable or impair the response characteristics. It will cause it to deteriorate. For this reason, conventional methods for configuring digital control devices include, for example, G, F
, Franklin/J', D. Powell, translated by Hiromasa Haneda, "Digital Control of Dynamisoku Systems", published by Morikita Publishing Co., Ltd., two methods are mainly used as shown in paragraphs 261-262. There is.

The first configuration method is to set the cutoff frequency of the high-frequency rejection filter and the sampling frequency of the analog-to-digital conversion to a value far greater than the bandwidth of the control system so that the phase delay of the high-frequency rejection filter has less influence on the control system. This is a way to make it more expensive.

The second configuration method is a method of configuring the control system by allowing a phase delay of the high-frequency rejection filter in the bandwidth of the control system and taking into account the transfer characteristics of the high-frequency rejection filter.

Problems to be Solved by the Invention However, in the first configuration method described above, the sampling frequency for analog-to-digital conversion must be set sufficiently high for the bandwidth of the control system.
A high-speed digital converter and a digital compensator that digitally calculates an analog-to-digital converted signal and outputs an operation signal for controlling a controlled object are required.

In addition, in the second configuration method, the control system must be designed by including the transfer characteristics of the high-frequency rejection filter in the transfer characteristics of the entire control system, so the control system design procedure becomes complicated. The control algorithm for maintaining the stability of the control system becomes extremely complicated due to the phase lag.

Means for Solving the Problems In order to solve the above problems, the digital control device of the present invention attenuates unnecessary high frequency components contained in the output of the detector that detects the operating state of the controlled object, at least in the passband. A high-frequency rejection filter whose signal delay is approximately constant, and an analog-to-digital converter convert the output of the high-frequency rejection filter into a digital quantity, which is then digitally operated to compensate for the delay time and control the controlled object. It is equipped with a digital compensator that outputs an operation signal for control.

The present invention solves problems during analog-to-digital conversion by inputting the output of a detector that detects the state of a controlled object to a high-pass removal filter in which the signal delay is approximately constant at least in the passband. Unnecessary high frequency components can be sufficiently attenuated, and the aforementioned alias interference can be avoided. Further, since the signal delay of the high-pass removal filter is approximately constant at least in the passband, the transfer characteristic of the high-pass removal filter can be treated simply as a delay element of a fixed time. Therefore, the design of the control system is simplified,
By using a control algorithm that compensates for a certain delay time in a digital compensator, the stability of the control system can be maintained with a simple configuration. Also, since the phase delay of the high-pass rejection filter is compensated as a fixed time delay, it is not necessary to make the cutoff frequency of the high-pass rejection filter and the sampling frequency of analog-to-digital conversion so high relative to the control system bandwidth. Therefore, the analog-to-digital converter and digital compensator are not required to be very fast.

EXAMPLE An example of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a digital control device according to an embodiment of the present invention. In FIG. 1, 11 is a controlled object, and its operation is expressed by the state equation of equation (1).

However, in equation 1), x+(t) is a state variable vector with n1 rows representing n1 state quantities of the controlled object 11 at time t, and u+(t) is the controlled object 1 at time t.
1, Fl is a coefficient matrix of n rows and n1 columns, and G1 is a coefficient matrix of n rows and m1 columns. In addition, nl,
Each ml is an integer of 1 or more. 12 is a detector that detects the state of the controlled object 11, and its output is (2)
It is assumed that it is expressed by the formula.

Yo+(t)=x+(t)−−(
2) Here, )'o+ (t) is a detection output vector of n1 rows representing n1 outputs of the detector 12 at time t. Reference numeral 13 denotes a high-pass removal filter with Bessel characteristics for removing unnecessary high frequency components contained in the output of the detector 12, and its characteristics are shown in FIG. 1
4 is an analog-to-digital converter that converts the output of the high-pass removal filter 13 from analog to digital; 15 is an analog-to-digital converter that performs digital calculation on the output of the analog-to-digital converter to reduce the signal delay in the high-pass removal filter 13; This is a digital compensator that outputs a control operation signal for compensating and controlling the controlled object 11.

The operation of the digital control device configured as described above will be explained below with reference to FIGS. 1, 2, and 3.

In FIG. 1, the state x+(t) of the controlled object 11 at time t is detected by the detector 12, and the detection output Yo+
(t). Next, high frequency removal filter 13
As a result, unnecessary high-frequency components contained in the detection output yDI (t) of the detector 12 are attenuated, thereby making it possible to avoid alias interference, which is a problem during analog-to-digital conversion. Further, as shown in FIG. 2, since the signal delay of the high-pass removal filter 13 having Bessel characteristics is approximately constant in the passband, its transfer characteristic can be regarded as a constant time delay element. Here, if the cutoff frequency of the high-pass removal filter 13 is fcl, the signal delay time Tl+ in the passband of the high-pass removal filter 13 is (3)
It is expressed by the formula.

Now, the y-th output (1) of the high-pass removal filter 13 is converted into a digital quantity yAo+ by the analog-to-digital converter 14.
(k). However, yAo+(k) is the output of the analog-to-digital converter 14 at the time of the th sample, and if the sampling period of analog-to-digital conversion is TSI, then between time t and the sample number (4
) is assumed to hold true.

t = k T-+ ・・・・・・
(4) Here, the sampling period TSI is T* + #T t + if the delay time such as the conversion time of the analog-to-digital converter 14 and the calculation time of the digital compensator 15 can be ignored in the control system.・
(5) If it cannot be ignored, the sum of the delay times of the control system excluding the signal delay time in the high-pass removal filter 13, such as the conversion time of the analog-to-digital converter 14, the calculation time of the digital compensator 15, etc. Let Tdl be Ts+#T
r++Tcu (6). When the sampling period It is determined as in equation (5) or equation (6), the output point of the th control operation output, that is, time t=k, as shown in FIG.
The detection output Vo+ (kT-+) of the detector 12 that detects the state of the controlled object 11 at T is attenuated by a high-pass removal filter 13 to remove unnecessary high frequency components, and converted into a digital quantity by an analog-to-digital converter 14. The digital compensator 15 performs digital calculations and outputs a control operation output. During this time, the delay time T11 in the high-frequency removal filter 13, the conversion time in the analog-to-digital converter 14, and the digital compensator 15 If the computation time cannot be ignored, a further delay time Tdl exists. Therefore, when the conversion time of the analog-to-digital converter 14, the calculation time of the digital compensator 15, etc. can be ignored, the time t' at which the control operation output is output is t' = t + T++#k from equation (5). Ts++ Tm+=
(k + 1) Tml...
(7) If it cannot be ignored, from equation (6), t' = t + T t + + T dl #k
T * + + T s +” (k+1)Tel
...(8). In either case, the time is (k+1)T-+.

In other words, the (k + 1)th control operation output is output with a delay of one sample based on the detected output yDI (kT=+) of the state of the controlled object 11 at the point where the 1st control operation output is output. It is thought that it will be done.

Therefore, the output of the analog-to-digital converter 14 at the th sample converted by the analog-to-digital converter 14 at the sampling period Tel is '/Ao+(
k) is digitally calculated by the digital compensator 15 using the control algorithm shown in equation (9), and the (k +
1) The control output ur(k+1) is assumed to be ur(k+1).

+17(k+1)-f+A+yAo+(k) fIB
1uma(k) (9) Here, fl is a gain matrix with m1 rows and n1 columns, and A1
and B1 is the state transition matrix of the 01 row and 01 column of the discrete time state equation (10) when the state equation (1) expressing the behavior of the controlled object 11 is discretized with the sampling period Tel, and the state transition matrix of n, row m1 These are the control transition matrices of the columns, and are expressed by equations (11) and (12), respectively. However, the hold characteristics of the analog-to-digital converter shall be zero-order hold characteristics.

X Ding (k + 1) = A + x Ma (k) + Biu
τ(k) ---...-(10) AI=eF51"
−・・−・−(11) B + = f n' e ”'
G + d r --(12) In the above equation, xi (k) is a discrete time state variable vector of n1 rows representing the state quantity of the controlled object 11 at the point where the th control operation output is output. It is. Here YADI (
Since k) is the output of the analog-to-digital converter 14 at the th sample, it can be considered that YAo+(k)=xτ(k), and equation (9) becomes equation (13).

u7(k+1)=-f+A+X7(k) f+B+u
7(k)...(13) When formulas (10) and (13) are combined into one, the control system becomes (
14) It is expressed as follows.

Now, equation (14) can be transformed into equation (15).

Therefore, from equation (15), the necessary and sufficient conditions for convergence of z7(co) for any initial state X7(0) are:
There are rows, that is, the absolute values of the eigenvalues of this matrix are all less than 1. Here, when equation (14) is coordinate transformed using the diagonal transformation matrix shown in equation (16), a matrix is obtained. However, in Equation 16) and Equation (17), Inl is n1 row 01
The unit matrix of columns, rml, is the unit matrix of m1 rows and m1 columns, and 0 is a zero matrix.

The gain matrix f1 is determined so that the eigenvalues of A, -B, f and m + m are O, so that the absolute values of the eigenvalues of A+B+f+ are all less than 1, and digital compensation is performed according to the control algorithm shown in equation (9). By inputting the control operation output calculated by the device 15 to the controlled object 11,
The controlled object 11 can be stably controlled. In this case, if f, A, and f + B + in equation (9) are calculated off-line in advance and used, the control operation output can be calculated in the digital compensator 15 by a very simple digital calculation. .

As described above, according to this embodiment, the high frequency removal filter 13
In this case, a high-frequency rejection filter having a Bessel characteristic in which the signal delay is approximately constant in the passband is used, and in the digital compensator 15, the delay time of the high-frequency elimination filter 13 as shown in equation (9) is set to one sample. According to the control algorithm compensated by using the output of the previous analog-to-digital converter 14, the digital compensator 15 calculates the control operation output, and inputs this to the controlled object 11 to perform analog-to-digital conversion. It is possible to avoid alias interference, which is a problem when , hence the analog-to-digital converter 14 and the digital compensator 15
The control system does not require a very high speed, and the controlled object 11 can be stably controlled to the target state with a simple control system configuration as shown in FIG.

In this embodiment, the control operation output is calculated by the digital compensator 15 using the output of the analog-to-digital converter 14 one sample before.
3, the conversion time of the analog-to-digital converter 14, and the calculation time of the digital compensator 15, the delay time of the control system is large, so the equation (5) or (6)
The sampling period T1 determined by the formula. If the equation (5) or (6) becomes long, change the equation (5) or (6) to (18
), the sampling period Ts+ is set short by converting it as shown in equation (19), and the digital compensator The control operation output may be calculated by digital calculation in step 15. However, L is an integer of 2 or more.

T s+ #T t+/ L --
(18) Ts+ζ(T f+ + T, 1)/L
・・・・・・(19) U (k+1)=
−f+AFyAo+(k)−Σ f+A? −'B+uτ
(k-L+i) -" (20) Next, another embodiment of the present invention will be described. FIG. 4 is a block diagram showing the configuration of a digital control device according to another embodiment of the present invention. 41 is a controlled object, and its behavior is expressed by the state equation (21).

However, in equation 21), x2(t) is a state variable vector with n2 rows representing 02 state quantities of the controlled object 41 at time t, and L12(t) is m2 state variables input to the controlled object 41 at time t. m2 representing the control operation output of
The row control operation output vector, F2 is a coefficient matrix of 32 rows and n2 columns, and G2 is a coefficient matrix of 02 rows and m2 columns. In addition, n
2. Each m2 is an integer of 1 or more. 42 is a detector that detects the state of the controlled object 41, and its output is (
22) It shall be expressed by the following equation.

Y G2(t) = c x 2(t)
・・・・・・(22) Here, VD2 (t) is the time [
C is a 12-row detection output vector representing the 12 outputs of the detector 42 in , and C is a 12-row, n2-column output matrix. However, I12 is an integer of 1 or more. 43 is a Bessel characteristic filter for removing unnecessary high frequency components contained in the output of the detector 42, the characteristics of which are shown in FIG. 44 is an analog-to-digital converter that converts the output of the high-pass removal filter 43 from analog to digital; 45 is an analog-to-digital converter that performs digital calculations on the output of the analog-to-digital converter, and calculates the state of the controlled object 41 at the next point for one sample; This is a digital compensator for controlling the controlled object 41 by compensating for the signal delay in the high-pass removal filter 43 by estimating .

Regarding the digital control device configured as above,
The operation will be explained below using FIG. 2, FIG. 4, and FIG. 5.

In FIG. 4, as shown in equation (22), the controlled object 4
A linear combination of state quantities of 1 is detected by the detector 42 and output as a detection output Yoz(t). Subsequently, the detection output y of the detector 42 is filtered by the high frequency removal filter 43.
Unnecessary high frequency components contained in oz(t) are attenuated, thereby avoiding alias interference, which is a problem during analog-to-digital conversion. Furthermore, as shown in FIG. 2, since the signal delay of the high-pass removal filter 43 having Bessel characteristics is approximately constant in the passband, its transfer characteristic can be regarded as a constant time delay element. Here, the cutoff frequency of the high frequency removal filter 43 is fe2
Then, the signal delay time TI2 in the passband of the high-pass removal filter 43 is expressed by equation (23).

Now, the output Y+2(t) of the high-pass removal filter 43 is converted into a digital quantity y by the analog-to-digital converter 44.
z(k'). However, YAo2(k') is the analog tube digital converter 4 at the °th sample.
4 and the sampling period of analog-to-digital conversion is T l 2, it is assumed that equation (24) holds between time t and sample number °.

t = k' T S2 -...
(24) Here, the sampling period T I 2 is T S2 # T 12 if the delay time such as the conversion time of the analog-to-digital converter 44 and the calculation time of the digital compensator 45 can be ignored in the control system.・
(25) If it cannot be ignored, the sum of the delay times of the control system excluding the signal delay time in the high-pass removal filter 43, such as the conversion time of the analog-to-digital converter 44 and the calculation time of the digital compensator 45. Let Ta2 be TS2#
T+2+Ta2 (26) is set. The sampling period Ts2 is (25
) or (26), the point that the °th control operation output is output as shown in FIG.
That is, at time t=, the detection output Yo2(
k'T, 2) has unnecessary high frequency components attenuated by a high-frequency removal filter 43, is converted into a digital quantity by an analog-to-digital converter 44, is digitally calculated by a digital compensator 45, and is output as a control operation output. However, during this time, the delay time TI2 in the high frequency removal filter 43,
If the conversion time of the analog-to-digital converter 44 and the calculation time of the digital compensator 45 cannot be ignored, a delay time T, 12 is additionally present. Therefore, when the conversion time of the analog-to-digital converter 44, the calculation time of the digital compensator 45, etc. can be ignored, the time t'' at which the control operation output is output is calculated as follows from equation (25): t'' = t + T f 2 #k'Ts2+ Tsz=(k'+1)Tsz−-(
27) If it cannot be ignored, from equation (26), t ”= t +T+2+Tdz #k' Tsz+ Ts2=(k'+1)Tsz-"
428), and in both cases the time (k'+1)T-z
becomes.

That is, the detection output YD2(k'T
, 2), it is considered that the (k'+1)th control operation output is output with a delay of one sample.

Therefore, the output Y A of the analog-to-digital converter 44 at the 'th sample converted by the analog-to-digital converter 44 with the sampling period T s 2.
The digital compensator 45 converts D2(k') into (29
) to (30), the (k'+1)th control output u;
(k'+1).

Length (k'+1) = (A24C) wa (k゛) ten YA
o2(k')+B2u;(k') --(29)u;(
K'+1)=-f2x;(K'+1) ・
= −(30) Here, A2. B2 is the state transition matrix of the n2 rows and 02 columns of the discrete time state equation (31) when the hold characteristic of the analog-to-digital converter 44 is the zero-order hold characteristic and is discretized at the sampling period TI2, and A control transition matrix with n2 rows and m2 columns,
They are expressed by equations (32) and (33), respectively. Also, K is the estimated gain matrix with n2 rows and 12 columns, and f2 is m2 rows and n2
Column gain matrix, x: (k) is a state estimation value matrix of n2 rows representing the estimated state quantity of the controlled object 41 at the point where the ゛th control operation output is output, and (31 ), x; (k') is a discrete time state variable vector of n2 rows representing the state quantity of the controlled object 41 at the point where the °th control operation output is output.

x: (k'+1)=A2x;(k')+Bzu;(k'
) -------・(aDA2=8292
-(32)B2= f 082e 2G2dr
--(33) Now, equation (29) is the (kth
Estimated value x of the state quantity xH(k''+1) of the controlled object 41 at the point where the '+1)-th control operation output is output: (k'
+1) using the output yAD2(k') of the analog-to-digital converter 44 at the 'th sample. Here, in the passband of the high-pass removal filter 43, V Aoz(k') = c x ;(k')
``...'' (34) Assuming that the estimation error x by the state estimation algorithm in equation (29); (k'+l)x;(k' + 1) is (
From equation 29) and equation (31), x::(k'+1)-x;
(k'+1)=(A2-KC) loan(ko) +KYAoz(k')+B2u;(k')-A2X;(
k')-Bzu;(k')=(Az4:C) (X;(
k') - X; (k)) ・" - (35). (
Equation 35) can be transformed into equation (36), so the matrix (
A2-KC) is a stable matrix, that is, the matrix (
By determining the estimated gain matrix K such that the absolute values of the eigenvalues of A2 KC) are all less than 1, for any initial state x; (0), the estimation error x; ((1)) - xH
(oo) can be converged to 0.

x; (k'+1) - x; (k'+1) = (A2KC) (xz(0)-x; (0))
−・” (36) Furthermore, the equation (30) is the estimated value x of the state quantity of the controlled object 41 at the point where the (k'+1)th control operation output estimated by the equation (29) is output. :(k'
+1) to obtain the (k'+1)th control operation output u:
This is a control operation output calculation algorithm that calculates (k'+1). (30) is delayed by one sample and becomes (31)
and x'z (k) = x; (k
), then x;(k+1)=A2x;(k')+8
2(-f2XH(k'))=(Az-Bzfz)x;(
k') 1' +11 ”(Az-Bzfz) X2(0) ...
...(37), so the matrix (A2-Bzfz) is made to be a stable matrix, that is, the matrix (A2 Bzfz
) by determining the gain matrix f2 such that the absolute values of the eigenvalues are all less than 1, any initial state x; (0)
, X2(00) can be converged to O.

That is, the estimated gain matrix and the gain matrix f2 are determined as described above, and the control operation output calculated by the digital compensator 45 is input to the controlled object 41 according to the control algorithm shown in equations (29) and (30). As a result, the controlled object 41 can be stably controlled.

As described above, according to this embodiment, the high frequency removal filter 43
In the digital compensator 45, a high-frequency elimination filter 43 having a Bessel characteristic in which the signal delay is approximately constant in the passband is used, and a high-frequency elimination filter 43 as shown in equations (29) and (30) is used. According to the control algorithm that compensates for the delay time by using the output of the analog-to-digital converter 44 one sample before, the digital compensator 45 calculates the control operation output, and inputs this to the controlled object 41 to convert the analog - Alias interference, which is a problem during digital conversion, can be avoided, and the cutoff frequency of the high-pass removal filter 43 and the sampling frequency of the analog-to-digital converter 44 can be made much higher than the bandwidth of the control system. Therefore, the analog-to-digital converter 44 and the digital compensator 45 are not required to be very high-speed, and the controlled object 41 can be stabilized with a simple control system configuration as shown in FIG. It can be controlled to the target state.

Note that in the above embodiment and other embodiments, a high-frequency elimination filter having Bessel characteristics was used as the high-frequency elimination filter, but a high-frequency elimination filter with other characteristics in which the signal delay is approximately constant at least in the passband may be used. May be used. In addition, as a control algorithm used in the digital compensator, in the above embodiment and other embodiments, the one shown in equation (9), equation (29), or equation (30) was used, but the delay of the high-frequency removal filter Other control algorithms that compensate for time may be used.

Effects of the Invention As described above, according to the present invention, by inputting the output of a detector that detects the state of a controlled object to a high-pass removal filter in which the signal delay is approximately constant at least in the passband, analog It is possible to sufficiently attenuate unnecessary high frequency components that cause problems during digital conversion, and alias interference can be avoided. Further, since the signal delay of the high-pass removal filter is approximately constant at least in the passband, the transfer characteristic of the high-pass removal filter can be treated as a delay element of a fixed time. Therefore, the stability of the control system can be maintained with a simple configuration by compensating for the delay in the high-pass removal filter with a digital compensator having a control algorithm that compensates for a certain delay time.

Also, since the phase delay of the high-pass rejection filter is compensated as a fixed time delay, it is not necessary to make the cutoff frequency of the high-pass rejection filter and the sampling frequency of analog-to-digital conversion so high relative to the control system bandwidth. Therefore, the analog-to-digital converter and digital compensator are not required to be very fast.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a digital control device in an embodiment of the present invention, FIG. 2 is a delay characteristic diagram of a high-pass rejection filter having Bessel characteristics, and FIG. 3 is a block diagram showing the configuration of a digital control device in an embodiment of the present invention. FIG. 4 is a block diagram showing the configuration of a digital control device in another embodiment of the present invention, and FIG. 5 is a timing diagram of the digital control device in another embodiment of the present invention. 11... Controlled object, 12... Detector, 13... High frequency removal filter, 14...
-Analog-digital converter, 15...Digital compensator, 41...Controlled object, 42...
...Detector, 43...High frequency removal filter,
44...Analog-to-digital converter, 45.
...Digital compensator. Name of agent: Patent attorney Shigetaka Awano and 1 other person fc---
Breath 1N! :F*Full 9Ln p-s area bribery five fluta double diaphragm I! 2 Ifl wave in Figure P- Figure 3 (I) ir stab 4Tg

Claims (1)

[Claims] a detector that detects the operating state of a controlled object; a high-frequency removal filter that attenuates unnecessary high-frequency components included in the output of the detector and has a signal delay that is approximately constant at least in a passband; and the high-frequency filter. an analog-to-digital converter that converts the output of the removal filter from analog to digital; and compensating for the delay time by digitally calculating the output of the analog-to-digital converter, and outputting an operation signal for controlling the controlled object. A digital control device comprising a digital compensator.