JPH02310992A - Forming method for through hole of circuit board - Google Patents

Forming method for through hole of circuit board

Info

Publication number
JPH02310992A
JPH02310992A JP13393489A JP13393489A JPH02310992A JP H02310992 A JPH02310992 A JP H02310992A JP 13393489 A JP13393489 A JP 13393489A JP 13393489 A JP13393489 A JP 13393489A JP H02310992 A JPH02310992 A JP H02310992A
Authority
JP
Japan
Prior art keywords
hole
scattered
circuit board
space
vacuum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13393489A
Other languages
Japanese (ja)
Other versions
JP2604853B2 (en
Inventor
Takahiro Miyano
宮野 孝広
Riyuuji Ootani
隆児 大谷
Isao Fuwa
勲 不破
Shusuke Matsumura
松村 周介
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP1133934A priority Critical patent/JP2604853B2/en
Publication of JPH02310992A publication Critical patent/JPH02310992A/en
Application granted granted Critical
Publication of JP2604853B2 publication Critical patent/JP2604853B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Abstract

PURPOSE:To so form a conductor film in a sufficient amount on the inner peripheral wall of a through hole as to reduce its conductive resistance by forcibly introducing substance to be scattered from a part to be scattered from a vacuum unit to a space of a downstream side via the hole from a space of an upstream side by the flow of gas, adhering and depositing it on the inner peripheral surface of the hole. CONSTITUTION:An Ar plasma 30 is generated in a low vacuum chamber 27 with Ar gas to be introduced into the chamber 27 through a suction port 22 by suction by the operation of a vacuum pump 23, and Cu atoms (conductive material) are scattered from the surface of a target 25 by sputtering with the plasma. The scattered atoms 31,... are adhered and deposited to the flat surface of lower side of a circuit board 20 not only to become a conductor film 35 but to be introduced into through hole 29 according to the flow of Ar atoms 32,..., and adhered and deposited also on the inner peripheral surface of the hole 29. Since the deposition is forcibly conducted by the flow, a thicker conductor film 33 than a conventional one is formed to become a through hole 34.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は、回路板のスルーホール形成方法に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a method for forming through holes in a circuit board.

〔従来の技術〕[Conventional technology]

回路基板の表面に真空蒸着法やスパッタリング法等によ
り膜を形成して回路板を得る方法を用いると、メッキ法
等による場合に比べて、セラミック基板に導体膜等(絶
縁体、抵抗体、および誘導体等による成膜も可能)を比
較的容易に形成することができるし、不純物の少ない高
品質の導体膜を形成することもできる。前記真空蒸着法
等によれば、前記メッキ法等による場合に比べて、回路
基板の表面粗さが細かくても導体膜に充分な接合度が得
られるので、導体膜の厚みが充分に薄くなって同膜部分
の導電抵抗が小さくなり、高周波特性に優れた回路板を
得ることができる、等の利点を有している。
When using a method to obtain a circuit board by forming a film on the surface of the circuit board by vacuum evaporation or sputtering, it is possible to form a conductor film, etc. (insulator, resistor, It is also possible to form a film using a dielectric or the like) with relative ease, and it is also possible to form a high-quality conductor film with few impurities. According to the vacuum evaporation method, etc., compared to the case of the plating method, etc., even if the surface roughness of the circuit board is fine, a sufficient degree of bonding can be obtained for the conductor film, so that the thickness of the conductor film can be made sufficiently thin. This has the advantage that the conductive resistance of the film portion is reduced, and a circuit board with excellent high frequency characteristics can be obtained.

第7図は、スパッタリング法により、スルーホール用の
孔3・・・が明けられたアルミナ等の回路基板1の片面
に導体膜を形成するとともに前記孔3・・・の内周にも
同時に導体膜を形成するようにした方法の一例をあられ
している。同装置は真空容器5を備え、同容器5には、
Arガスの吸気口6と、真空ポンプ7の接続された排気
口8とが開口している。この真空容器5内の空間上位に
は、ホルダー9により前記回路基板1が水平にセットさ
れ、空間下位には、カソード10上側に設けられたター
ゲット(飛散させる部分)2が位置している。前記真空
ポンプ7の作動により、真空容器5内が吸引減圧されて
真空状態になり、これにより、前記吸気口6を通してA
rガスが強制吸引されるようになる。真空容器5内に吸
引されたArガスにより、回路基板1とターゲット2間
にA「プラズマを発生させるとともに、同プラズマによ
り、ターゲット2から銅原子(飛散する物質)が飛散す
るようになる。その結果、銅原子は回路基板1の表面に
付着するとともに、同基板1のスルーホール用孔3・・
・の内周面にも付着するようになる。
Fig. 7 shows that a conductor film is formed on one side of a circuit board 1 made of alumina or the like with holes 3 for through-holes made by sputtering, and at the same time a conductor film is also formed on the inner periphery of the holes 3. An example of a method for forming a film is shown below. The device includes a vacuum container 5, which includes:
An Ar gas intake port 6 and an exhaust port 8 connected to a vacuum pump 7 are open. The circuit board 1 is set horizontally by a holder 9 in the upper part of the space in the vacuum container 5, and the target (splashing part) 2 provided above the cathode 10 is located in the lower part of the space. Due to the operation of the vacuum pump 7, the inside of the vacuum container 5 is suctioned and depressurized to become a vacuum state.
r gas will be forcibly sucked. The Ar gas sucked into the vacuum container 5 generates A plasma between the circuit board 1 and the target 2, and the plasma causes copper atoms (a flying substance) to fly away from the target 2. As a result, copper atoms adhere to the surface of the circuit board 1, and the through-hole holes 3 of the circuit board 1...
・It also comes to adhere to the inner peripheral surface of.

C発明が解決しようとする課題〕 ところで、前記方式は、回路基板lをホルダー9で支持
して行なうが、同基板1は、スルーホール用の孔3・・
・が裏面側において閉止するように支持されていたので
、銅原子は、回路基板1の一側面には比較的容易に到達
するが、スルーホール用の孔3・・・内への流入は非常
に消極的になっていた。これを、要部を拡大してみた第
8図を用いてより具体的に説明すると、同図において、
回路基板lの厚みをT、スルーホール用の孔3の内径を
d、回路基板1の表面に付着した導体膜12の厚みをt
。、スルーホール用孔3の内周面に付着する導体膜13
の厚みをtとした場合、 π(d/2)’ t、ζπd (T+to )・・・0
式と近似するものとなり1 、−、 t # toX d/4 (T+ to ) 
・旧・・−・−■式となることが判る。■式を一例とし
て、たとえば、T=0.635  t、 =o、o 1
を代入して、孔3の内径dを変化させた場合にtがいく
らになるかを第1表に示した。
Problem to be solved by the invention C] By the way, in the above method, the circuit board 1 is supported by the holder 9, but the board 1 has holes 3 for through holes.
Since the copper atoms are supported so as to be closed on the back side, the copper atoms can reach one side of the circuit board 1 relatively easily, but the inflow into the through-hole holes 3 is extremely difficult. I was becoming reluctant to do so. To explain this more specifically using FIG. 8, which shows an enlarged view of the main parts, in the same figure,
The thickness of the circuit board l is T, the inner diameter of the hole 3 for the through hole is d, and the thickness of the conductive film 12 attached to the surface of the circuit board 1 is t.
. , a conductive film 13 attached to the inner peripheral surface of the through-hole hole 3
When the thickness of is t, π(d/2)' t, ζπd (T+to)...0
It is approximated by the formula 1, -, t # toX d/4 (T+ to)
・It can be seen that the formula is old...−・−■. ■ Taking the formula as an example, for example, T=0.635 t, =o, o 1
Table 1 shows how much t becomes when the inner diameter d of the hole 3 is changed by substituting .

第1表 同表にみるように、スルーホール用孔3の内径dが小さ
くなればなる程、同孔3内に堆積する導体膜13の厚み
tは薄くなり、d/Tが1以下、すなわち、回路基板1
の厚みTに対してdの方がそれ以下で孔3が細長傾向に
なる場合、回路基板1の平面部分の表面に付着する導体
膜12の厚みtoの2割以下しか得られないことになる
。前記孔3内に堆積して形成される導体膜13は、第9
図にみるように、ターゲット2側において厚く、それよ
り奥側へと次第に薄くなり、これにより、導体膜13の
電気抵抗値が大きくなってしまい、場合によっては、導
通不良を生じることもあったこれらの問題を解消するも
のとして、特開昭62−222062号公報に記載され
たものがある。このものは、スパッタリング方法および
スパッタリングターゲットに関するものであるが、導体
膜を形成する方式がスパッタリングによるものに限られ
ているとともに、棒状のターゲットそのものを円筒体の
中に挿入してスパッタリングを行なうので、均一なスパ
ッタリングを行なうには均一にプラズマを形成する必要
があり、そのためには、Arガスの分布と放電とを均一
になるように維持させるの、に、適度の電極間距離(通
常は51m程度、前記公報では4 am程度)が必要で
あり、このことから、同方式は、回路板のスルーホール
等のように微小孔径の内周面への適用には不向きである
As shown in Table 1, the smaller the inner diameter d of the through-hole hole 3, the thinner the thickness t of the conductor film 13 deposited inside the hole 3 becomes, and d/T is 1 or less, i.e. , circuit board 1
If d is smaller than the thickness T and the hole 3 tends to be elongated, the thickness of the conductor film 12 attached to the surface of the flat part of the circuit board 1 will be less than 20% of the thickness to. . The conductor film 13 deposited and formed in the hole 3 is the ninth
As shown in the figure, it is thick on the target 2 side and gradually becomes thinner toward the back, which increases the electrical resistance value of the conductive film 13 and, in some cases, may cause conduction failure. As a solution to these problems, there is a method described in Japanese Patent Laid-Open No. 62-222062. This method relates to a sputtering method and a sputtering target, but the method for forming a conductive film is limited to sputtering, and the rod-shaped target itself is inserted into a cylindrical body to perform sputtering. In order to perform uniform sputtering, it is necessary to form plasma uniformly, and for this purpose, it is necessary to maintain an appropriate distance between the electrodes (usually about 51 m) in order to maintain a uniform Ar gas distribution and discharge. , about 4 am) in the above-mentioned publication, and for this reason, this method is not suitable for application to the inner circumferential surface of a minute hole such as a through hole of a circuit board.

前記事情に鑑みて、この発明の課題とするところは、ス
ルーホール用孔内周面に、充分な量でかつ導電抵抗が小
さくなるように導体膜が形成されるようにすることにあ
る。
In view of the above circumstances, it is an object of the present invention to form a conductive film on the inner peripheral surface of a through-hole in a sufficient amount and to reduce conductive resistance.

〔課題を解決するための手段〕[Means to solve the problem]

前記課題を解決するため、請求項1記載の発明にかかる
回路板のスルーホール形成方法は、内部に、導電性材料
を気化して飛散させる部分を有する真空容器内に、スル
ーホール用孔の明けられた回路基板を前記飛散させる部
分に対向するように配して、同基板により、前記飛散さ
せる部分側が飛散経路の上流側の空間で他方が下流側の
空間であるように前記真空容器内を仕切り、前記下流側
において真空吸引することで、同下流側の空間が高真空
にまた上流側の空間が低真空になるようにして、同上流
側の空間に導入した気体を前記スルーホール用孔を通し
て下流側の空間に流通させるようにし、前記飛散させる
部分からの飛散物質を、前記気体の流れによって、前記
上流側の空間からスルーホール用孔内を経て前記下流側
の空間へと強制的に導き、その間に同孔の内周面に付着
・堆積させるようにする。
In order to solve the above problem, a method for forming a through hole in a circuit board according to the invention according to claim 1 includes forming a hole for a through hole in a vacuum container having a portion inside which vaporizes and scatters a conductive material. A printed circuit board is arranged to face the part to be scattered, and the circuit board is used to sweep inside the vacuum container so that the part to be scattered is a space on the upstream side of the scattering path, and the other side is a space on the downstream side of the scattering path. By suctioning a vacuum on the downstream side of the partition, the downstream space becomes a high vacuum and the upstream space becomes a low vacuum, and the gas introduced into the upstream space is drawn into the through-hole hole. through the through-hole to the downstream space, and the scattered substances from the part to be scattered are forced by the gas flow from the upstream space through the through-hole to the downstream space. During this time, it is allowed to adhere and deposit on the inner peripheral surface of the hole.

請求項2記載の発明にかかる回路板のスルーホール形成
方法は、導電性材料を気化しイオン化して飛散させる部
分を有する真空容器内に、スルーホール用孔の明けられ
た回路基板を前記飛散させる部分に対向しかつ基板表裏
側に空間が存在するように配置するとともに、前記イオ
ン化して飛散する物質を、前記回路基板の前記飛散させ
る部分の反対側に配した電極と前記回路基板との間に電
界をかけることで、スルーホール用孔内に強制的に導い
て同孔の内周壁面に付着・堆積させるようにする。
The method for forming through-holes in a circuit board according to the invention as set forth in claim 2 includes scattering the circuit board with holes for through-holes in a vacuum container having a portion in which a conductive material is vaporized, ionized, and scattered. between the electrode and the circuit board, which are arranged so that a space exists on the front and back sides of the circuit board, and the substance to be ionized and scattered is placed on the opposite side of the part of the circuit board to be scattered. By applying an electric field to the through-hole, the material is forcibly guided into the through-hole and attached and deposited on the inner circumferential wall of the hole.

〔作   用〕[For production]

飛散物質を導入気体とともに低真空室から高真空室に流
すようにしてその途中に配されたスルーホール用孔内に
飛散物質を導くようにすると、真空度の差で導かれる飛
散物質がスルーホール用孔の内周面に多くしかも全体に
わたるように付着するようになる。
If the scattered substances are made to flow together with the introduced gas from the low vacuum chamber to the high vacuum chamber and guided into the through-hole holes placed in the middle, the scattered substances guided by the difference in the degree of vacuum will flow through the through-holes. It comes to adhere to the inner circumferential surface of the hole in large quantities and over the entire area.

イオン化して飛散する物質を、前記回路基板の前記飛散
させる部分の反対側に配した電極と前記回路基板との間
に電界をかけることでスルーホール用孔の内周面に導く
ようにすると、電界効果によりイオン粒子がスルーホー
ル用孔内に導かれて同孔の内周面に多くしかも全体にわ
たるように付着するようになる。
The ionized and scattered substance is guided to the inner circumferential surface of the through hole by applying an electric field between the circuit board and an electrode disposed on the opposite side of the part of the circuit board to be scattered, Ion particles are guided into the through-hole by the electric field effect and adhere to the inner peripheral surface of the hole in large numbers and over the entire surface.

〔実 施 例〕〔Example〕

以下に、この発明を、その実施例をあられす図面を参照
しつつ詳しく説明する。
Hereinafter, embodiments of the present invention will be explained in detail with reference to the accompanying drawings.

第1図は、この発明にかかる回路板のスルーホール形成
方法の一実施例を装置としてあられしている。同装置は
、スパッタリング法によりアルミナ回路基板20の表面
に導体膜を形成するもので、真空容器21を備え、同容
器21には一側にArガスの吸気口22が、また、他側
には排気口19が開口争ている。同排気口19にはタラ
イオポンプ等の真空ポンプ23が接続されている。前記
真空容器21内の下部にはカソード(陰極)24が設け
られ、同カソード24の上側に銅材料(導電性材料)か
らなるターゲット(飛散させる部分)25が設置されて
いる。同真空容器21の内部空間は、下部が飛散経路の
上流側空間で上部が同飛散経路の下流側空間になるよう
に仕切り壁26と回路基板20で上下に仕切られている
。回路基板20は、前記ターゲット25の上方に平行に
対向するように仕切り壁(ホルダー)26に支持される
ようになっている。前記下流側の空間は高真空室28に
、また、上流側空間は低真空室27になるようにされ、
これらの室27.28は前記真空ポンプ23の作動によ
り作られるようになっている。なお、前記回路基板20
に明けられたスルーホール用の孔29・・・は上下にそ
の軸心が向けられる。
FIG. 1 shows an embodiment of the method for forming through holes in a circuit board according to the present invention as an apparatus. The device forms a conductive film on the surface of an alumina circuit board 20 by sputtering, and is equipped with a vacuum container 21, which has an Ar gas inlet 22 on one side and an Ar gas inlet 22 on the other side. The exhaust port 19 is fighting for its opening. A vacuum pump 23 such as a Talio pump is connected to the exhaust port 19. A cathode 24 is provided in the lower part of the vacuum container 21, and a target (splashing part) 25 made of a copper material (conductive material) is provided above the cathode 24. The internal space of the vacuum container 21 is vertically divided by a partition wall 26 and a circuit board 20 such that the lower part is a space on the upstream side of the scattering path and the upper part is a space on the downstream side of the scattering path. The circuit board 20 is supported by a partition wall (holder) 26 so as to be parallel to and above the target 25 . The downstream space becomes a high vacuum chamber 28, and the upstream space becomes a low vacuum chamber 27,
These chambers 27, 28 are created by the operation of the vacuum pump 23. Note that the circuit board 20
The axes of the through-hole holes 29 are directed upward and downward.

前記真空ポンプ23の作動により、高真空室28を、た
とえば、10− ’ 〜10− ’ Torrに、また
低真空室27を10− ” 〜10− ” Torrに
なるようにする。これにより、スルーホール用の各孔2
9内には、ガス等が低真空室27から高真空室28へと
流れるようになる。そして、吸引作用で吸気口22を通
して低真空室27内に導入されるArガスにより、低真
空室27内でArプラズマ30を発生させるとともに、
同プラズマによるスパッタリングによりターゲット25
の表面からCU環原子導電性材料)を飛散させるように
する。
By operating the vacuum pump 23, the high vacuum chamber 28 is brought to a pressure of, for example, 10-' to 10-' Torr, and the low vacuum chamber 27 is brought to a pressure of 10-'' to 10-'' Torr. As a result, each hole 2 for through hole
In the chamber 9, gas and the like flow from the low vacuum chamber 27 to the high vacuum chamber 28. Then, Ar plasma 30 is generated in the low vacuum chamber 27 by the Ar gas introduced into the low vacuum chamber 27 through the intake port 22 by the suction action, and
Target 25 is sputtered with the same plasma.
The CU ring atom conductive material) is scattered from the surface of the CU ring atom.

飛散したCu原子31・・・は、回路基板20の下側の
平らな表面に付着・堆積して導体膜35になるだけでな
く、第2図の模式図にみるように、Ar原子32・・・
の流れにしたがってスルーホール用孔29内に導かれ、
同化29の内周面にも付着・堆積するようになる。この
堆積が流れにより強制的に行なわれるので、従来よりも
厚く導体膜33が形成されてスルーホール34になると
ともに、導体膜33は低真空室27において厚すぎず、
軸心方向にわたって略均−な厚さに形成されるようにな
る。なお、前記飛散物質は、Ar原子32・・・の流れ
によって、前記スルーホール用孔29内を経て前記下流
側の空間に導かれるようになる。
The scattered Cu atoms 31... not only adhere and deposit on the lower flat surface of the circuit board 20 to form the conductive film 35, but also as shown in the schematic diagram of FIG. 2, the Ar atoms 32...・・・
is guided into the through-hole hole 29 according to the flow of
It also begins to adhere and deposit on the inner peripheral surface of the assimilation 29. Since this deposition is forcibly carried out by the flow, the conductor film 33 is formed thicker than before and becomes the through hole 34, and the conductor film 33 is not too thick in the low vacuum chamber 27.
The thickness is approximately uniform in the axial direction. The scattered substances are guided into the downstream space through the through-hole 29 by the flow of the Ar atoms 32.

第3図は、プラズマによりイオン化した金属粒子(飛散
する物質)をスルーホール用孔の内周面に有効に導くた
めに電界を利用したものをあられしている。同図にみる
ように、真空容器40には下部−例に吸気口41が、ま
た、他側には真空ポンプ42に接続された排気口43が
開口している。同容器40の中間高さにはホルダー44
が設けられ、同ホルダー44には、回路基板45が水平
にセットされるようになっている。ホルダー44と回路
基板45とは、これらの表裏側に空間が存在するように
もする部材になっている。同基板45にはスルーホール
用の孔46・・・が設けられている。容器40の下部に
は蒸発源たるマグネトロンスパッタ47が設置されてい
るとともに、容器4θ内の回路基板45上方に少し離れ
た位置には、マグネトロンスパッタ47とは反対側にな
るように電極(陰極)48が水平に設けられている。同
陰極48は回路基板45と同様に平板からなり、回路基
板45全体に上方から対向するようになっている。なお
、前記ホルダー44は、吸気口41側においては容器4
0内を上下に仕切るようになっているが、排気口43側
においては電極48例の空間に吸引力が作用し得るよう
になっている。
FIG. 3 shows a device in which an electric field is used to effectively guide metal particles (scattering substances) ionized by plasma to the inner peripheral surface of a through hole. As shown in the figure, the vacuum container 40 has an inlet port 41 at the bottom thereof, and an exhaust port 43 connected to a vacuum pump 42 at the other side. A holder 44 is located at the middle height of the container 40.
A circuit board 45 is set horizontally in the holder 44. The holder 44 and the circuit board 45 are members that allow a space to exist on both sides of the holder 44 and the circuit board 45. The substrate 45 is provided with holes 46 for through holes. A magnetron sputter 47 serving as an evaporation source is installed at the bottom of the container 40, and an electrode (cathode) is installed at a position slightly away above the circuit board 45 in the container 4θ on the opposite side of the magnetron sputter 47. 48 are provided horizontally. The cathode 48 is made of a flat plate like the circuit board 45, and faces the entire circuit board 45 from above. Note that the holder 44 is attached to the container 4 on the intake port 41 side.
0 is divided into upper and lower parts, but on the exhaust port 43 side, suction force can act on the space of the electrodes 48.

まず、真空容器40内を排気により真空(たとえば、x
to−’ 〜Xl0−’Torr程度)にして、吸気口
41を通してArガス(たとえば、×10−!〜X 1
0− ’ Torr)を適量導入する。マグネトロンス
パッタ47に電圧(たとえば、500〜100OV)を
かけることによりプラズマを形成し、同スバフタ47よ
り導電性の金属粒子(CU粒子)を飛散させるようにす
るとともに、プラズマによりイオン化させる。このCu
粒子をスルーホール用孔46内に確率良く付着・堆積さ
せるため、前記電極48に負の電圧(たとえば、数1O
Ov〜数kV)をかけるようにする。これにより、イオ
ン化したCu粒子はスルーホール用孔46・・・を通る
ように誘導される。その状態は第4図にみるようであり
、Cuイオン50はArイオン51とともに電極48の
方向へ力Fで引き寄せられるようになる。この方Fは、
電極48に印加される電界強度Eに比例して、F=eE
となる(eはイオンの電荷量)。結果的に、Cuイオン
50は、第5図にみるように、電極48による電界効果
によりスルーホール用孔46の内周面の方向に軌道修正
されて同内周面に飛着するようになる。
First, the inside of the vacuum container 40 is evacuated to a vacuum (for example, x
to -'~Xl0-' Torr), and Ar gas (for example,
0-' Torr) is introduced in an appropriate amount. Plasma is formed by applying a voltage (for example, 500 to 100 OV) to the magnetron sputter 47, and conductive metal particles (CU particles) are scattered from the baffle 47 and ionized by the plasma. This Cu
In order to attach and deposit particles within the through-hole hole 46 with high probability, a negative voltage (for example, several tens of ohms) is applied to the electrode 48.
(Ov to several kV). Thereby, the ionized Cu particles are guided to pass through the through holes 46. This state is shown in FIG. 4, where the Cu ions 50 and the Ar ions 51 are drawn toward the electrode 48 by a force F. This person F is
In proportion to the electric field strength E applied to the electrode 48, F=eE
(e is the charge amount of the ion). As a result, as shown in FIG. 5, the Cu ions 50 are corrected in trajectory toward the inner circumferential surface of the through-hole hole 46 due to the electric field effect of the electrode 48, and fly onto the inner circumferential surface. .

イオン化したCuイオン50の飛行速度Vは、電極48
への印加電圧を1kVとしたとき、毎秒的55000m
の超高速度となり、イオン化したCU粒子50は電界効
果により軌道修正されながら瞬時にしてスルーホール用
孔46の内周面に向かって飛着するため、同内周面への
Cu粒子50の付着の確率が大幅に向上する。プラズマ
中から飛来するArイオン51についても同様に、電界
効果によりスルーホール用孔46の内周面に向かって飛
着し、一部は導体膜52内にも混入はするが、常に、C
uの導体膜52の面を衝撃するため、強固で均一な膜5
2が形成されるようになる。
The flight speed V of the ionized Cu ions 50 is
When the applied voltage is 1kV, 55000m per second
The ionized CU particles 50 instantly fly toward the inner peripheral surface of the through-hole hole 46 while being corrected in trajectory by the electric field effect, so that the Cu particles 50 are not attached to the inner peripheral surface. The probability of Similarly, Ar ions 51 flying from the plasma fly toward the inner circumferential surface of the through-hole hole 46 due to the electric field effect, and some of them also mix into the conductive film 52, but they are always mixed with C.
Since the surface of the conductive film 52 of u is impacted, a strong and uniform film 5 is formed.
2 will be formed.

なお、第6図にみるように、電極53に針状の突起54
を設けて、先端が孔46内に臨むようにすると、電界効
果がより効果的なものになって孔46内へのイオンの付
着確率が大幅に向上するようになるとともに、Arイオ
ンの衝撃による効果もより向上し得るようになる。前記
蒸発源はマグネトロンカソード以外に、金属粒子をイオ
ン化して飛散させ得るようなものであればよく、たとえ
ば、電子ビーム方式の蒸発源や抵抗加熱方式の蒸発源と
イオン源やプラズマ発生源との組み合わせ等であっても
よい。
In addition, as shown in FIG. 6, the electrode 53 has a needle-like protrusion 54.
By providing a hole so that its tip faces into the hole 46, the electric field effect becomes more effective and the probability of ions adhering to the hole 46 is greatly improved, and the impact caused by the Ar ion bombardment becomes more effective. The effect can also be improved. The evaporation source may be anything other than a magnetron cathode, as long as it can ionize and scatter metal particles. For example, an evaporation source using an electron beam method, a resistance heating method, an ion source, or a plasma generation source may be used. It may be a combination or the like.

〔発明の効果〕〔Effect of the invention〕

この発明にかかる回路板のスルーホール形成方法は、以
上のようにするため、スルーホール用孔内周壁に、充分
な量でかつ導電抵抗が小さくなるよう導体膜が形成され
るようになる。
In the method for forming through holes in a circuit board according to the present invention, as described above, a conductive film is formed on the inner circumferential wall of a through hole in a sufficient amount and with a low conductive resistance.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明にかかる回路板のスルーホール形成方
法の一実施例苓装置としてあられす模式図、第2図はそ
の要部を拡大してイオンの流れをあられす模式断面図、
第3図は他の実施例をあられす模式図、第4図および第
5図はその要部を拡大してイオンの流れをあられす模式
図、第6図は電極に針状の突起を設けた実施例をあられ
す拡大図、第7図は従来のスルーホール形成方法を装置
としてあられす模式図、第8図は同スルーホール用孔内
に導体膜が堆積する量を概算により示すための拡大模式
図、第9図は同孔内の入口側に導体膜が堆積した様子を
あられす拡大図である。 20.45・・・回路基板 21.40・・・真空容器
22.41・・・吸気口 23.42・・・真空ポンプ
25.47・・・飛散させる部分 27・・・低真空室
(下流側空間) 28・・・高真空室(上流側空間)2
9.46・・・スルーホール用孔 31.50・・・飛
散物質 33.52・・・導体膜 34・・・スルーホ
ール 代理人 弁理士  松 本 武 彦 第1図 第2図 第3図 第4図 第5図 第6図
FIG. 1 is a schematic diagram of an apparatus for forming a through hole in a circuit board according to an embodiment of the present invention, and FIG. 2 is a schematic cross-sectional view of an enlarged main part showing the flow of ions.
Figure 3 is a schematic diagram showing another embodiment, Figures 4 and 5 are enlarged schematic diagrams of the main parts showing the flow of ions, and Figure 6 is a schematic diagram showing the flow of ions on the electrode. Fig. 7 is a schematic diagram showing a conventional through-hole forming method as an apparatus, and Fig. 8 is an enlarged view showing an example of a conventional through-hole forming method. The enlarged schematic diagram and FIG. 9 are enlarged diagrams showing the conductor film deposited on the entrance side of the hole. 20.45...Circuit board 21.40...Vacuum container 22.41...Intake port 23.42...Vacuum pump 25.47...Part to be scattered 27...Low vacuum chamber (downstream side space) 28... High vacuum chamber (upstream space) 2
9.46...Through hole hole 31.50...Scattered substances 33.52...Conductor film 34...Through hole agent Patent attorney Takehiko Matsumoto Figure 1 Figure 2 Figure 3 Figure 4 Figure 5 Figure 6

Claims (1)

【特許請求の範囲】 1 内部に、導電性材料を気化して飛散させる部分を有
する真空容器内に、スルーホール用孔の明けられた回路
基板を前記飛散させる部分に対向するように配して、同
基板により、前記飛散させる部分側が飛散経路の上流側
の空間で他方が下流側の空間であるように前記真空容器
内を仕切り、前記下流側において真空吸引することで、
同下流側の空間が高真空にまた上流側の空間が低真空に
なるようにして、同上流側の空間に導入した気体を前記
スルーホール用孔を通して下流側の空間に流通させるよ
うにし、前記飛散させる部分からの飛散物質を、前記気
体の流れによって、前記上流側の空間からスルーホール
用孔内を経て前記下流側の空間へと強制的に導き、その
間に同孔の内周面に付着・堆積させるようにする回路板
のスルーホール形成方法。 2 導電性材料を気化しイオン化して飛散させる部分を
有する真空容器内に、スルーホール用孔の明けられた回
路基板を前記飛散させる部分に対向しかつ基板表裏側に
空間が存在するように配置するとともに、前記イオン化
して飛散する物質を、前記回路基板の前記飛散させる部
分の反対側に配した電極と前記回路基板との間に電界を
かけることで、スルーホール用孔内に強制的に導いて同
孔の内周面に付着・堆積させるようにする回路板のスル
ーホール形成方法。
[Scope of Claims] 1. A circuit board having a through-hole is placed in a vacuum container having a part inside which vaporizes and scatters a conductive material so as to face the part to be scattered. By partitioning the inside of the vacuum container using the same substrate so that the part to be scattered is a space on the upstream side of the scattering path and the other side is a space on the downstream side, and vacuum suction is performed on the downstream side,
The space on the downstream side is made to have a high vacuum and the space on the upstream side is made to be a low vacuum, and the gas introduced into the space on the upstream side is made to flow through the through hole to the space on the downstream side, and The scattered substances from the part to be scattered are forcibly guided from the upstream space through the through-hole hole to the downstream space by the gas flow, and during this time, they adhere to the inner circumferential surface of the hole.・A method for forming through-holes in circuit boards by depositing them. 2. In a vacuum container having a part where the conductive material is vaporized, ionized, and scattered, a circuit board with through-hole holes is arranged so as to face the part where the conductive material is to be scattered and that there is a space on the front and back sides of the board. At the same time, the ionized and scattered substance is forced into the through hole by applying an electric field between the circuit board and an electrode placed on the opposite side of the part of the circuit board to be scattered. A method for forming through-holes in circuit boards in which the material is guided and deposited on the inner circumferential surface of the hole.
JP1133934A 1989-05-25 1989-05-25 Method of forming through hole in circuit board Expired - Fee Related JP2604853B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1133934A JP2604853B2 (en) 1989-05-25 1989-05-25 Method of forming through hole in circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1133934A JP2604853B2 (en) 1989-05-25 1989-05-25 Method of forming through hole in circuit board

Publications (2)

Publication Number Publication Date
JPH02310992A true JPH02310992A (en) 1990-12-26
JP2604853B2 JP2604853B2 (en) 1997-04-30

Family

ID=15116489

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1133934A Expired - Fee Related JP2604853B2 (en) 1989-05-25 1989-05-25 Method of forming through hole in circuit board

Country Status (1)

Country Link
JP (1) JP2604853B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010103341A (en) * 2008-10-24 2010-05-06 Dainippon Printing Co Ltd Method of manufacturing through electrode substrate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58223400A (en) * 1982-05-28 1983-12-24 フエイザル・エイ・フアズリン Palting through hole device and method
JPS59200755A (en) * 1983-04-22 1984-11-14 ホワイト・エンジニアリング・コ−パレイシヤン Ion plating process

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58223400A (en) * 1982-05-28 1983-12-24 フエイザル・エイ・フアズリン Palting through hole device and method
JPS59200755A (en) * 1983-04-22 1984-11-14 ホワイト・エンジニアリング・コ−パレイシヤン Ion plating process

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010103341A (en) * 2008-10-24 2010-05-06 Dainippon Printing Co Ltd Method of manufacturing through electrode substrate

Also Published As

Publication number Publication date
JP2604853B2 (en) 1997-04-30

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