JPH02306171A - Circuit for detecting voltage drop of power supply - Google Patents
Circuit for detecting voltage drop of power supplyInfo
- Publication number
- JPH02306171A JPH02306171A JP12571289A JP12571289A JPH02306171A JP H02306171 A JPH02306171 A JP H02306171A JP 12571289 A JP12571289 A JP 12571289A JP 12571289 A JP12571289 A JP 12571289A JP H02306171 A JPH02306171 A JP H02306171A
- Authority
- JP
- Japan
- Prior art keywords
- power supply
- voltage
- circuit
- phase
- control circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 21
- 230000005856 abnormality Effects 0.000 abstract description 5
- 239000003990 capacitor Substances 0.000 abstract description 5
- 238000000034 method Methods 0.000 abstract 2
- 238000010586 diagram Methods 0.000 description 4
- 230000007423 decrease Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000009499 grossing Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は電源電圧降下検出回路、特に、三相交流を用い
る数値制御装置の電源電圧降下検出回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power supply voltage drop detection circuit, and particularly to a power supply voltage drop detection circuit for a numerical control device using three-phase alternating current.
従来の電源電圧降下検出回路は、三相交流のうち任意の
二相を使用し、単相交流として使用し、整流して直流に
変換し、この直流電圧が降下する状態により、三相交流
電源の電圧降下を測定していた。Conventional power supply voltage drop detection circuits use any two phases of three-phase AC, use it as single-phase AC, rectify it and convert it to DC, and detect the three-phase AC power supply by the state in which this DC voltage drops. was measuring the voltage drop.
従来の電源電圧降下検出回路について図面を参照して詳
細に説明する。A conventional power supply voltage drop detection circuit will be described in detail with reference to the drawings.
第2図は従来の電源電圧降下検出回路の一例を示すブロ
ック図である。FIG. 2 is a block diagram showing an example of a conventional power supply voltage drop detection circuit.
第2図に示す電源電圧降下検出回路は、三相のうち、U
、V相を単相整流器SB2で整流し、整流電圧ES2を
電圧降下検出回路CP2に供給する。 電圧降下検出回
路CP2では、整流電圧ES2をキャパシタC2で平滑
し、レジスタR1゜R2で分圧して比較電圧EC2とし
、比較回路CMPの一方の入力電圧とし、他方の基準電
圧E1と比較する。The power supply voltage drop detection circuit shown in FIG.
, V phase are rectified by a single-phase rectifier SB2, and a rectified voltage ES2 is supplied to a voltage drop detection circuit CP2. In the voltage drop detection circuit CP2, the rectified voltage ES2 is smoothed by a capacitor C2 and divided by a resistor R1°R2 to obtain a comparison voltage EC2, which is used as one input voltage of the comparison circuit CMP and compared with the other reference voltage E1.
比較電圧EC2が基準電圧E1よりも低下した場合に、
比較回路CMPから異常信号PFが出力され、制御回路
CPtJ1を経由して、モータ駆動回路DVへ出力する
とともに、モータM1の状態をメモリMEM1に記憶さ
せる。When the comparison voltage EC2 falls below the reference voltage E1,
An abnormality signal PF is output from the comparison circuit CMP, and is output to the motor drive circuit DV via the control circuit CPtJ1, and the state of the motor M1 is stored in the memory MEM1.
マイクロプロセッサMPUIは、メモリMEM1に対し
てライトプロテクト処理を行なう。The microprocessor MPUI performs write protection processing on the memory MEM1.
第3図(a)、(b)は第2図に示す電源電圧降下検出
回路の動作を説明するためのタイムチャートである。3(a) and 3(b) are time charts for explaining the operation of the power supply voltage drop detection circuit shown in FIG. 2. FIG.
時刻T1において、三相電源電圧に異常があったとする
と、整流電圧EC2は低下を始め、時刻T2で基準電圧
E1になり、異常信号PFが出力される。Assuming that there is an abnormality in the three-phase power supply voltage at time T1, the rectified voltage EC2 begins to decrease, reaches the reference voltage E1 at time T2, and an abnormality signal PF is output.
制御用直流電源PSの出力電圧Vpsは、時刻T3にお
いて、半導体の最少保証電圧■、まで低下する。At time T3, the output voltage Vps of the control DC power supply PS decreases to the minimum guaranteed voltage (■) of the semiconductor.
そこで、時刻T2から時刻T3までの期間にライトプロ
テクト処理が行なわれなければならない。Therefore, write protection processing must be performed during the period from time T2 to time T3.
上述した従来の電源電圧降下検出回路は、電源電圧の降
下が急激であると、ライトプロテクト処理に必要に時間
が確保できない危険性があるという欠点があった。The above-described conventional power supply voltage drop detection circuit has a drawback that if the power supply voltage drops rapidly, there is a risk that the necessary time may not be secured for write protection processing.
本発明の電源電圧降下検出回路は、三相交流電源内の二
相を入力とする制御回路用直流電源と、マイクロプロセ
ッサ並びにメモリを内蔵し前記マイクロプロセッサ並び
に前記メモリの動作用直流電源として前記制御回路用直
流電源を用いて外部入出力装置を制御する制御回路と、
前記三相交流電源が遮断される現象発生時に前記制御回
路用直流電源の出力電圧が前記マイクロプロセッサ並び
に前記メモリの最少動作電圧より低下する以前に前記制
御回路に前記現象発生時までの前記外部入出力装置の状
態を前記メモリに記憶させる記憶回路と、前記メモリに
書き込み保護処理を行なわせる保護処理回路とを含む電
源電圧降下検出回路において、
(A)前記三相交流電源電圧を降圧させ、三相降圧電圧
を出力する降圧手段、
(B)前記三相降圧電圧を整流し、整流電圧を出力する
整流手段、
(C)前記整流電圧と、予め設定された基準電圧とを比
較し、比較信号を前記制御回路に供給する比較手段、
とを含んで構成される。The power supply voltage drop detection circuit of the present invention includes a DC power supply for a control circuit which inputs two phases in a three-phase AC power supply, a microprocessor, and a memory, and serves as a DC power supply for operating the microprocessor and the memory. a control circuit that controls an external input/output device using a circuit DC power supply;
Before the output voltage of the control circuit DC power source drops below the minimum operating voltage of the microprocessor and the memory when the three-phase AC power source is cut off, the external input signal is connected to the control circuit until the phenomenon occurs. In a power supply voltage drop detection circuit including a storage circuit that stores the state of an output device in the memory and a protection processing circuit that performs write protection processing on the memory, (A) step down the three-phase AC power supply voltage; Step-down means for outputting a phase step-down voltage; (B) Rectification means for rectifying the three-phase step-down voltage and outputting a rectified voltage; (C) Comparing the rectified voltage with a preset reference voltage and generating a comparison signal. Comparing means for supplying the control circuit to the control circuit.
次に、本発明の実施例について図面を参照して説明する
。Next, embodiments of the present invention will be described with reference to the drawings.
第1図は本発明の一実施例を示すブロック図である。FIG. 1 is a block diagram showing one embodiment of the present invention.
第1図に示す電源電圧降下検出回路は、U。The power supply voltage drop detection circuit shown in FIG.
V、W相を三相整流器S81で整流し、整流電圧ESI
を電圧降下検出回路CPIに供給する。The V and W phases are rectified by a three-phase rectifier S81, and the rectified voltage ESI
is supplied to the voltage drop detection circuit CPI.
電圧降下検出回路CP1では、整流電圧ES1をキャパ
シタC1で平滑し、レジスタR1,R2で分圧して比較
電圧ECIとし、比較回路CMPの一方の入力電圧とし
、他方の基準電圧E1と比較する。In the voltage drop detection circuit CP1, the rectified voltage ES1 is smoothed by a capacitor C1 and divided by registers R1 and R2 to obtain a comparison voltage ECI, which is used as one input voltage of the comparison circuit CMP and compared with the other reference voltage E1.
キャパシタC1はキャパシタC2に比して、同一のリッ
プル電圧の時、小さくできるがら、第3図に示す時刻T
1から時刻T2までの期間が短縮できるので、時刻T2
から時刻T3までの期間を増大できる。Although the capacitor C1 can be made smaller than the capacitor C2 at the same ripple voltage, the time T shown in FIG.
Since the period from 1 to time T2 can be shortened, time T2
The period from time T3 to time T3 can be increased.
すなわち、時定数の小さい平滑回路で三相電源電圧の変
化を検出するので、その異常を早期に探知しライトプロ
テクト処理を余裕を持って行なうことができる。That is, since changes in the three-phase power supply voltage are detected using a smoothing circuit with a small time constant, abnormalities can be detected early and write protection processing can be performed with sufficient time.
本発明の電源電圧降下検出回路は、ライトプロテクト処
理に充当できる時間を長くできるので、メモリ内容の破
損等の障害発生の確立を低くすることができるという効
果がある。Since the power supply voltage drop detection circuit of the present invention can extend the time available for write protection processing, it has the effect of reducing the probability of failures such as damage to memory contents.
図面の簡単な説明
第1図は本発明の一実施例を示すブロック図、第2図は
従来の電源電圧降下検出回路の一例を示すブロック図、
第3図(a)、(b)は第2図に示す電源電圧降下検出
回路の動作を説明するためのタイムチャートである。BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing an example of a conventional power supply voltage drop detection circuit,
3(a) and 3(b) are time charts for explaining the operation of the power supply voltage drop detection circuit shown in FIG. 2. FIG.
SBI・・・・・・三相整流器、CPI・・・・・・電
圧降下検出回路、CPUI・・・・・・制御回路、PS
・・・・・・制御用直流電源。SBI... Three-phase rectifier, CPI... Voltage drop detection circuit, CPUI... Control circuit, PS
・・・・・・DC power supply for control.
代理人 弁理士 内 原 音 〕 〉 ≧ ミ 〉 (Agent Patent Attorney Oto Uchihara 〕 〉 ≧ Mi 〉 (
Claims (1)
と、マイクロプロセッサ並びにメモリを内蔵し前記マイ
クロプロセッサ並びに前記メモリの動作用直流電源とし
て前記制御回路用直流電源を用いて外部入出力装置を制
御する制御回路と、前記三相交流電源が遮断される現象
発生時に前記制御回路用直流電源の出力電圧が前記マイ
クロプロセッサ並びに前記メモリの最少動作電圧より低
下する以前に前記制御回路に前記現象発生時までの前記
外部入出力装置の状態を前記メモリに記憶させる記憶回
路と、前記メモリに書き込み保護処理を行なわせる保護
処理回路とを含む電源電圧降下検出回路において、 (A)前記三相交流電源電圧を降圧させ、三相降圧電圧
を出力する降圧手段、 (B)前記三相降圧電圧を整流し、整流電圧を出力する
整流手段、 (C)前記整流電圧と、予め設定された基準電圧とを比
較し、比較信号を前記制御回路に供給する比較手段、 とを含むことを特徴とする電源電圧降下検出回路。[Scope of Claims] A DC power supply for a control circuit that receives two phases of a three-phase AC power supply as input, and a DC power supply for the control circuit that has a built-in microprocessor and memory and serves as a DC power supply for operating the microprocessor and the memory. a control circuit that controls an external input/output device using a control circuit; and a control circuit that controls an external input/output device using a control circuit; A power supply voltage drop detection circuit including a storage circuit that causes the control circuit to store in the memory the state of the external input/output device up to the time when the phenomenon occurs, and a protection processing circuit that causes the memory to perform write protection processing, (A) step-down means for stepping down the three-phase AC power supply voltage and outputting a three-phase step-down voltage; (B) rectifying means for rectifying the three-phase step-down voltage and outputting a rectified voltage; (C) the rectified voltage; A power supply voltage drop detection circuit comprising: comparing means for comparing the voltage with a preset reference voltage and supplying a comparison signal to the control circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12571289A JPH02306171A (en) | 1989-05-19 | 1989-05-19 | Circuit for detecting voltage drop of power supply |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12571289A JPH02306171A (en) | 1989-05-19 | 1989-05-19 | Circuit for detecting voltage drop of power supply |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02306171A true JPH02306171A (en) | 1990-12-19 |
Family
ID=14916879
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12571289A Pending JPH02306171A (en) | 1989-05-19 | 1989-05-19 | Circuit for detecting voltage drop of power supply |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02306171A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10095675B2 (en) | 2008-05-22 | 2018-10-09 | International Business Machines Corporation | Inputting data to a web page |
-
1989
- 1989-05-19 JP JP12571289A patent/JPH02306171A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10095675B2 (en) | 2008-05-22 | 2018-10-09 | International Business Machines Corporation | Inputting data to a web page |
US11222169B2 (en) | 2008-05-22 | 2022-01-11 | International Business Machines Corporation | Inputting data to a web page |
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