JPH02305299A - Time division switching circuit - Google Patents

Abstract

PURPOSE:To eliminate the need of external connection of a modulator or the like and to eliminate an influence of noise by sending transmission information and generating a corresponding modulated signal by an information storage memory and a modulation memory in accordance with information given from a holding memory having a speed/modulation system designating table. CONSTITUTION:Transmission information outputted from a main control circuit 4 is stored in an information storage memory 21 through an external interface part 7. At this time, the address of transmission information and speed/modulation system designating information are written in a holding memory 3. The designating information is applied from the holding memory 3 to an information storage memory 21, a modulation memory 22, and a selecting part 23 at the output timing. The selecting part 23 receives the information to switch the connection destination of an output highway 6 from the output of a speech memory 2 to the modulation memory 22. The information storage memory 21 sends transmission information to the modulation memory 22. The modulation memory 22 generates an address in accordance with designating information and the transmission count number from a clock frame signal generating part 5, and time division information modulated as desired is sent to the output highway 6 based on the address.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is used in a digital electronic exchange, a main device of a digital key telephone, etc., and is used for time division exchange for exchanging time division information such as voice and data between terminals. Regarding circuits.

BACKGROUND OF THE INVENTION FIG. 2 is a block diagram showing the configuration of a conventional time division switching circuit.

The time division switching circuit 10 is connected to a main control circuit 4 that controls overall call processing for a digital electronic exchange, etc., and is further connected to an input highway 1 and an output highway 6. The time division exchange circuit 10 is connected to the input highway 1 and the output highway 6 and includes a communication memory 2 that stores time division information, a holding memory 3 that stores information from the pressure control circuit 4, and a communication memory 2 that is connected to the input highway 1 and the output highway 6 and stores information from the pressure control circuit 4. An external circuit that transmits information from the clock frame signal generator 5 and the main control circuit 4 to the holding memory 3, or transmits information from the time division exchange circuit 10 to the main control circuit 4. It is composed of an interface section 7. The main control circuit 4 uses the connection information of the exchange and the information stored in the holding memory 3 to determine which time slot number (time position W) of which highway number (physical position) of the output highway 6. Outputs information that instructs whether to output to.

Next, the operation of the above conventional example will be explained.

As shown in FIG. 3, the time-sharing information transmitted via input highway 1 is AO, BOlCO, etc. for input highway number 1, and A1, B1, C1 for input highway number 2. It is assumed that each time spot exists from 1 to above as shown in the following. This time sharing information is
As shown in FIG. 4, the higher order is stored in the input time slot number, and the lower order is stored in the communication memory 2 having an address corresponding to the input highway number. Note that writing of the time division information into the call memory 2 is performed in synchronization with the input timing generated by the clock/frame signal generation section 5.

Here, the above address corresponds to the output time slot number and the lower address corresponds to the output highway number for the holding memory 3, as shown in FIG. Assume that the output highway number is written in the lower part. Then, when the output time slot number (upper) and the output highway number (lower) are outputted to the holding memory 3 as a read address at the output timing of the time division information from the clock frame signal generation unit 5, the output time slot number (upper) and the output highway number (lower) are outputted to the holding memory 3. The stored data is output as a read address of the call memory 2.

By inputting this address, the time division information stored in the communication memory 2 is transferred to the input highway 1 as shown in FIG.
Different order than above, BOlBl, AI..., AO,...
CI, EO, . . . are output onto the output highway 6 in this order.

Therefore, in the second cell, the main control circuit 4 transfers the accumulated data (manual time slot number, input highway number) in the holding memory 3 based on the call control information from the terminal. Each time it is rewritten, time-sharing information can be freely exchanged.

Figure 6 shows its own information (management information such as billing totals, failure information, etc.) from a digital exchange through an analog line.
FIG. 2 is a block diagram showing a configuration for transmitting the data to the outside.

The main control circuit 4 includes a modulator (M
An A/D converter (CODEC) 12 is connected between the modulator 11 and the input highway 1 to convert the modulated output from an analog signal to a digital signal. Further, an analog line interface (I/F') circuit 13 is connected to the output section of the input highway 1 and the other party.

The information to be sent to the outside is sent to the modulator 1 by the main control circuit 4.
Sent to 1. The modulator 11 outputs a signal in the form of a modulated analog signal and applies it to the A/D converter 12. The A/D converter 12 converts the input modulated analog signal into a digital signal and applies the digital signal to the time division switching circuit 10. The time division switching circuit 10 receiving the output signal of the A/D converter 12 sends information to the analog line interface circuit I3.

Problems to be Solved by the Invention However, in the configuration of the conventional example described above, when an attempt is made to send out its own information from a digital exchange to the outside through an analog line, as shown in FIG. In addition to 10, a modulator 11 and an A/D converter 12 are required, which complicates the configuration and increases costs.

Furthermore, when transmitting different information to multiple parties at the same time, it is necessary to provide multiple modulators 11 and A/D converters 12, and the specifications (transmission speed, modulation method, etc.) of the modulators of the parties are different. It is necessary to match the specifications, which further increases costs. Furthermore, since it is first converted into an analog signal, it is susceptible to noise contamination.

The present invention solves the conventional problems as described above.
The object of the present invention is to provide a time division switching circuit that can send digital information to the outside through an analog line without connecting a modulator or the like to the outside and without being affected by noise.

Means for Solving the Problems In order to solve the above problems, the present invention provides a communication memory that stores time-sharing information from an input highway and sends accumulated data to an output highway according to a designated read address, and a main control circuit. a holding memory that stores time division information from the main control circuit and has a speed/modulation method specification table, an information storage memory that stores transmission information specified by the main control circuit, and a modulation according to the speed/modulation method. a modulation memory that converts the information into time-division information and stores the information, and a selection unit that connects either the communication memory or the modulation memory to the output highway according to the speed/modulation method specified by the holding memory. It is something.

action The present invention has the following effects due to the above configuration.

Sending information from the main control circuit is stored in an information storage memory, and speed/modulation method designation information is stored at the address indicated by the output time slot number and output highway number.

According to the speed/modulation method designation information given by the holding memory, the information storage memory and the modulation memory send out the sending information and generate a corresponding modulation signal, which is output from the selection section to the output highway. Therefore, a modulated signal can be generated without connecting an external modulator or the like.

EXAMPLES Hereinafter, examples of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a time division switching circuit in one embodiment of the present invention.

In this embodiment, the same parts as those in the conventional example shown in FIG. 2 are designated by the same reference numerals, and the explanation thereof will be omitted, and the different configuration will be explained. The present embodiment is characterized in that an information storage memory 21, a modulation memory 22, and a selection section 23 are provided in addition to the above conventional example. Note that the holding memory 3 also has a speed/modulation method specification table.

The information storage memory 21 stores transmission information designated by the main control circuit 4. Further, the modulation memory 22 converts signals according to various speed/modulation methods (frequency modulation, phase modulation, etc.) into time-division information in advance and stores the converted information. Further, the selection unit 23 has a function of switching the output data from the communication memory 2 and the modulation memory 22 and making it possible to send either of the outputs to the output highway 6.

Next, the operation of the above embodiment will be explained. In addition, the second
The description of the parts shown in the figures will be omitted since they will be redundant.

The sending information output from the main control circuit 4 is transmitted to the information storage memory 21 via the external interface section 7,
Sending information is stored in this information storage memory 21. Also, at this time, an address indicating the output time slot number and output highway number of the transmission information and speed/modulation method designation information are written into the holding memory 3. Furthermore, the speed/modulation method specification information is applied from the holding memory 3 to each of the information storage memory 21, the modulation memory 22, and the selection section 23 at the output timing. Upon receiving this, the selection unit 23 switches the connection destination with the output highway 6 from the output of the communication memory 2 to the modulation memory 22.

The information storage memory 21 sends the sending information to the modulation memory 22 as part of the address. Modulation memory 22, speed/modulation method information and clock frame signal generation section 5
An address is formed by the transmission count number from .

Based on this address, the modulation memory 22 outputs time-division information subjected to desired modulation, and is sent to the output highway 6 via the selection section 23.

As described above, according to the above embodiment, the generation and transmission functions of the modulated signal can be included in the time division switching circuit, so there is no need to provide an external modulator or A/D converter.

Effects of the Invention As described above, according to the present invention, there is a communication memory that stores time-sharing information from an input highway and sends accumulated data to an output highway according to a designated read address, and a time-sharing information from a main control circuit. a holding memory that stores information etc. and has a speed/modulation method specification table;
An information storage memory that stores transmission information specified by the main control circuit; a modulation memory that converts modulation according to the speed/modulation method into time-division information and stores the same; and a speed/modulation method given by the holding memory. Since it is equipped with a selection section that connects one of the above-mentioned call memory or the above-mentioned modulation memory to the output highway according to the specification of the time division switching circuit, it is possible to generate a modulation signal within the time division switching circuit, and to connect a modulator externally. There is no need for this, and even if the specifications are different, only a single modulation means needs to be provided, which simplifies the configuration and enables cost reduction. Furthermore, since no means for converting to analog is required, it is not affected by noise or the like.

[Brief explanation of drawings]

Fig. 1 is a block diagram showing a time division switching circuit according to an embodiment of the present invention, Fig. 2 is a block diagram showing the configuration of a conventional time division switching circuit, and Fig. 3 is a block diagram showing the configuration of a conventional time division switching circuit. Figure 4 is an explanatory diagram showing the relationship between addresses and data in the call memory, Figure 5 is an explanatory diagram showing the relationship between addresses and data in the holding memory, and Figure 6 is an explanatory diagram showing the relationship between addresses and data in the holding memory. FIG. 2 is a block diagram showing a configuration for sending out its own information to the outside. DESCRIPTION OF SYMBOLS 1... Input highway, 2... Call memory, 3... Holding memory, 4... Pressure control circuit, 5... Clock/frame signal generation section , 6...
... Output highway, 7... External interface section, 2■... Information storage memory, 22...
...□Modulation memory, 23...Selection section.

Claims (1)

[Claims] A communication memory that stores time-sharing information from the input highway and sends accumulated data to the output highway according to a specified read address, and a communication memory that stores time-sharing information from the main control circuit and stores a speed/modulation method specification table. an information storage memory that stores transmission information designated by the main control circuit; a modulation memory that converts modulation according to the speed/modulation method into time-sharing information and stores the same; A time division switching circuit comprising: a selection unit that connects either the communication memory or the modulation memory to the output highway according to a given speed/modulation method designation.