JPH02299259A - Semiconductor device - Google Patents

Abstract

PURPOSE:To easily constitute an optoelectric IC(O-E IC) of three dimensional structure by a method wherein a semiconductor device and an optical component both formed on a semiconductor layer are made to operate together enabling their functions to correlate organically with each other. CONSTITUTION:A recess 22 is provided onto the surface of a board 101 which includes a semiconductor layer which constitutes a three dimensional device, wiring regions 7A and 21A are provided even to the base of the recess 22, a signal can be transmitted between the primary side and the rear side of the board 101 which includes the semiconductor layer through the intermediary of signal transmitting means 6 and 16 located on the base of the recess 22, and prescribed parts of an upper and a lower board, 101 and 102, are electrically connected. An micro-optical component 502 provided, at least, onto the board 102 and a semiconductor device 501 provided at a position on the other board 101 corresponding to the position where the optical component 502 is provided are so constituted that they operate as being optically coupled. By this setup, various types of components can be three-dimensionally constituted in lamination, so that optoelectric system can be easily constituted into an IC.

Description

[Detailed Description of the Invention] [Field of Application of the Invention] The present invention relates to a three-dimensional device in which a plurality of plate-shaped substrates including at least one substrate containing a semiconductor layer are laminated and bonded at desired portions. In particular, at least one substrate is provided with a microscopic optical component, and the semiconductor device formed in the semiconductor layer is operated by organically correlating the function of the semiconductor device with the function of the optical component. optical-electrical functions (opto-alactroni)
The present invention relates to an integrated semiconductor device using a three-dimensional device (cs).

[Prior art]

Examples of conventional three-dimensional devices include those described in "Nikkei Microdevices," July 1985 issue, page 175.

In the above conventional example, in a three-dimensional device configuration formed by laminating substrates including semiconductor layers, it is possible to transmit signals from one main surface of the constituent plate-like substrates to the other substrate on the back side. No method was proposed.

In addition, as a method for penetrating the main surface and the back surface of a semiconductor substrate by a PN junction using an Afl dopant, [“
Ai Eeeee Computer” (Jan, Gr.
inberg et al. “IEEE Computer”,
1984 Jan, p69. ) There are some listed in J.

Furthermore, as an optical-electrical integrated circuit (hereinafter abbreviated as O-E IC) having optical-electrical functions as a part, for example,
There is one described in "Nikkei Microdevice" July 1985 issue, page 211.

This 0-E-IC had a structure in which a micro optical component and a semiconductor device were formed on a single substrate, and its functions were operated.

[Problems to be Solved by the Invention] However, in the conventional three-dimensional device as described above, for example, signal transmission from the main surface of the substrate to the back surface is
In the case where the N junction is passed through, there is a problem in that it is difficult to control the distributed capacitance due to the junction and the upper and lower resistance values of the p+ portion. Furthermore, since the microbridge portions are not fused to each other, it has been difficult to sufficiently satisfy requirements regarding the stability of the mechanical structure that connects the two substrates.

Furthermore, there were various problems such as the lack of ideal electrical isolation from other parts.

Furthermore, in conventional 0-E-ICs, micro optical components and semiconductor devices are formed on a single substrate, making it difficult to achieve partial functions as 0-E-ICs. Ta. In addition, in terms of structure, there are compound semiconductor devices that emit light (semiconductor lasers, light emitting diodes, etc.), semiconductor devices such as SLs that receive light, substrates that have passive optical components such as microlenses and filters, and light flux. 1 Light flux control device that polarizes or changes direction
Integrating them into one substrate is extremely difficult due to manufacturing technology.

In addition, since devices that originally control the operation of light flux have significant spatial position dependence compared to electronic devices, it is possible to simply
-E-IC Even if the microcomponents necessary for the IC are integrated on one substrate, an effective functional integration effect cannot be obtained.

Therefore, conventional devices have had many problems, such as the fact that the functionality of the O-E-IC formed on a single substrate has not yet reached a fully satisfactory technical level.

The present invention aims to solve the problems of the prior art as described above.

[Means to solve the problem]

In order to achieve the above object, the present invention is constructed as described in the claims.

That is, in the present invention, at least two plate-shaped substrates are used.
In a three-dimensional device configured by combining and bonding two or more layers, if one substrate constituting the three-dimensional device is a substrate including a semiconductor layer, a recess is formed on one surface of the substrate including the semiconductor layer. , a wiring area is provided up to the bottom surface of the recess, and the wiring area is also connected to the slope of the recess in an insulated state, and is connected to the wiring area on one main surface of the substrate common to the recess. be done. There is a wiring area on the main surface of the substrate opposite to the bottom of the recess, and means for transmitting signals to the thinned portion of the recess. The means for transmitting this signal may be an active device with three or more terminals (insulated gate device, bipolar device, etc.) formed in a semiconductor layer, or may be a two-terminal low resistance member or extremely low resistance wiring member. Furthermore, a nonlinear two-terminal device (various diodes, PNPN elements, etc.) formed of a semiconductor layer or the like may be used.By having the above structure, the main surface and the back side of the substrate including the semiconductor layer are connected to the bottom surface of the recess. Double amount transmission is possible through the signal transmission means in the. If this signal transmission means is used, it becomes easier to transmit signals in the vertical direction of a laminated substrate of a three-dimensional device formed by bonding and bonding a plurality of substrates, compared to conventional techniques. These results in simultaneous parallel signal processing and a significant increase in the amount of information processing in this three-dimensional integrated circuit device.

Furthermore, in one aspect of the present invention, some of the laminated substrates constituting the three-dimensional device may not include a semiconductor layer. Even in such cases, it is often necessary to transmit electrical signals in a direction perpendicular to the substrate. This substrate may be a glass substrate or a quartz substrate. Alternatively, a ceramic substrate such as PLZT having an electro-optic effect may be used. Furthermore, a metal plate such as an aluminum plate may be used to ensure grounding, shielding, and cooling of the heat generating part.

A concave shape is formed on the substrate as described above, and the wiring area reaches the bottom surface of the four parts, and the wiring area is connected to the slope of the concave part via an insulating film as necessary, so that one of the four parts of the board is connected. It is connected to the wiring section on the main surface. There is also a thin film pattern for wiring on the main surface of the substrate opposite to the bottom of the recess. A predetermined signal of the wiring on the side of the recess is transmitted to the wiring area on the other back side by a signal transmission means of a part of the concave portion of the recess. It is difficult to use a crystalline semiconductor as the member constituting the signal transmission means, and for example, poly-Si or the like whose periphery is isolated by an insulating film can be used for ease of manufacture. Further, other low resistance members or wiring members having extremely low resistance characteristics may be used.Furthermore, in the case of AC signals, capacitive coupling using an insulating film may be used. However, in such a case, mutual independence of potential settings between wirings and signal transmission means is required. These preferably have a structure in which various insulating films are closely attached to the above-mentioned substrate.

Metallic substrates require the most attention in terms of manufacturing difficulties. For example, in the case of an aluminum metal plate,
By employing an insulating film forming method such as anodization, the isolation structure, wiring structure, signal transmission structure, etc. required for the above structure can be manufactured.

Furthermore, the problems with O-E ICs with a planar configuration as described in the prior art can be solved in the present invention, since optical devices and semiconductor devices can be placed and set on appropriate substrates. , production difficulties can be avoided.

Furthermore, since the various components described above can be constructed in a three-dimensional layered structure, there is an advantage that the 0-E electronic system can be easily miniaturized and integrated into an IC.

As described above, the present invention has advantages as a three-dimensional device and as an ○-E IC device, so it does not address the problems of conventional three-dimensional devices and integrated circuits using three-dimensional devices as described above. At the same time, it becomes possible to bring about new applications and ultra-heavy structure in three-dimensional 0-E devices and integrated circuits using three-dimensional 0-E devices.

[Embodiment] FIG. 1 is a cross-sectional view schematically showing an embodiment of the present invention, showing a part of a substrate fusion type three-dimensional device having an O-E function.

In this embodiment, substrates 101 and 1 containing 5iICs are used.
02 are fused while ensuring wiring connection between the upper and lower substrates.

First, the semiconductor substrate 101 (for example, a Si substrate) has an SOI configuration. That is, the semiconductor substrate 101 has a thick Si portion 1, and the SOI surface has a field insulating film 2.
There is. Etched holes 22, 55 and 56 are formed in the thick Si portion 1 of the semiconductor substrate 1o1 from the back surface of the substrate to the first layer of the SOI structure. This etch hole 22.55.
56 is a deep hole, and such deep holes are formed in technical fields such as semiconductor pressure sensors. The etched holes 22,55,56 constitute the recesses, and the periphery of the etched holes 22,55,56 is protected by the insulating film 3.

Further, an electronic circuit is formed on the right side of the semiconductor substrate 101 from near the center. That is, the SOI thin film Si
MOS transistors are arranged on the left and right sides of the crystal layer 4, respectively. In FIG. 1, the right MOS transistor (n+ source 8, n+ drain 9.5i02 film 10, S
The wiring for gate 11 (consisting of in ÷ gate 11, etc.) is
It is connected to the back surface of the etch hole 22 via the wiring members 12A, 12B and the low resistance wiring member 6. That is, the low resistance wiring member 6 such as poly-Si is electrically isolated by another insulating film 5, and is connected to the wiring 7A provided on the back surface of the etch hole 22 through the upper Si layer of the SOI. . This connects the wiring on the main surface side and the back side of the board.

Also, the left MO3+- transistor is r1+ source 1
5, drain part 16, gate 18, source electrode 19,
It is formed of a drain electrode 20 and the like. The drain portion 16 described above is penetrated to the back surface side of the substrate (bottom surface of the recess). This is made possible by embedding a deep n+ diffusion layer or n+ poly-Si layer into the thin p-type Si layer 13. Further, in the etched hole 22 on the back side of the substrate, there are wiring lines 2LA and 21B that reach the front surface of the thick Si plate on the back side.

Patterning the electrode on the slope of such a deep etched hole 22 is difficult using the normal method because there are too many heights, but it is possible to pattern the photoresist using a well-parallel laser beam or other light source and a mask. It is possible to do so. In addition, direct etching methods and direct deposition methods using laser light or other beam technologies that have been announced in recent years can also be used.

Next, on the left side of the semiconductor substrate 10L, a component 501, which is an electronic means that utilizes optical action, which is another feature of the present invention, is formed.

In this embodiment, a case is illustrated in which a light flux detection device is provided in this portion. That is, there is a doped M edge film 23 on top of the SOI insulating film 14 . This is PS
It could be something like G. A thin Si crystal layer of SOI can be formed thereon by various techniques. The lowest layer of the thin Si layer portion is the 11+ layer 24, which is formed by diffusing phosphorus from PSG or the like. Even thinner layer 25, p
+ layer 26 is formed. Insulating layer 27 in some cases
may be provided in a part, and the p formed by them
The +n diode is provided with electrodes 28A and 28B,
The light flux is detected by a reverse bias junction.

Next, another semiconductor substrate 102 (for example, a Si substrate) is provided below the semiconductor substrate 101. An IC including a CMOS inverter is arranged on the right side of the lower substrate 102.

That is, there is a P-well 17 and a contact 29 to this well is provided. Also, contact 30. to the n-substrate. p+ source section 31, drain 32 of the P channel MOS transistor. N-channel MOS transistor drain 33, ■+source 34, Si gate 35.36
．． Thin gate insulating film 37.38. Interlayer insulating film 39, V
The oolE electrode 40, the Vsslt electrode 41, the CMO3 output electrode 42, the CMOS gate input electrode 43A, etc. are formed by a normal method.

On the left side of the lower semiconductor substrate 102, a micro optical component 502, which is another feature of the present invention, is arranged. In this portion, the thick Si portion is etched until it reaches the lower layer 2' to form a recess for the purpose of transmitting the light beam.

If this part is to be made into a FZP (Fresnel zone plate) that has a light focusing effect, first a transparent film 48 such as another insulating film is formed on the insulating film, and then a transparent film 48 such as another insulating film is formed on top of the insulating film by electron beam exposure or the like. A Fresnel ring is formed of a photoresist 49A or a transparent material rrfi 49E (SiOz film, Ta2O, film, etc.) whose shape is transferred by the photoresist 49A. Note that it is possible to draw the electron beam in a circular shape by setting software in a computer included in the control system that drives the electron beam. In addition, recently, by controlling the exposure time and number of exposures of the electron beam along the circumference, FZP, which has a sawtooth wave or pseudo-sawtooth wave and a blaze waveform that causes an ideal optical phase shift, has also been developed using electron beam lithography. It is formed using technology.

As mentioned above, using the FZP technology, it is also possible to manufacture an FZP having a wavelength that has a convergence effect almost similar to that of a lens having a focal length f1.

Note that FZP is mentioned as an example of an optical component, and other optical components may be used.

Next, a method will be described in which the two semiconductor substrates 101 and 102 are fused to each other including wiring connections to form a three-dimensional laminated structure.

As mentioned above, there is one method for fusing semiconductor substrates, for example, as described in "International Electron Device Meeting Technical Digest (International Electron Device Meeting Technical Digest).
nal Electron Devices Meet
ingTecl+n1caL l)igast,
1984. p816 M, soasumoto
Others, “Promising new fabrj, ca.
tion process developed for
There is a method described in J. 5 tacked LSI's).

In this example, a case is exemplified in which a fusion method substantially similar to the method described in the above-mentioned literature is used.

In this method, first, two layers of A are placed on the AM electrode.
u/'I''i layer is formed. Next, the above Au/'I'' i layer is formed.
Ti)? After coating with a polyimide layer to the same height as the electrode of I and etching with plasma 02, Au/TiS
't! The poles are exposed and flattened at the same time.

Such an electrode configuration is applied to the upper semiconductor substrate 101 in FIG.
and the main surface of the lower semiconductor substrate 102. Then, the above two substrates are aligned at desired positions and fused together by thermocompression bonding.

This will be explained in detail below.

When fusing the electrode 21B on the back surface of the upper semiconductor substrate 101 and the gate aluminum electrode 43A on the lower semiconductor substrate 102, first, the AQ electrode 21B on the upper semiconductor substrate 101 is fused.
An Au alloy layer 46U whose level matches that of the polyimide layer 44 is formed thereon, and an Au alloy layer 46L whose level matches that of the polyimide layer 45 is similarly formed on the gate electrode 43A of the lower semiconductor substrate 10'2. Form. At other locations, the upper substrate and the lower substrate are connected, for example, to the electrode 7B and the electrode 43.
When welding at part B, Au alloy/147U and 47
What is necessary is just to form L and thermocompression bond. Similar to the above,
It is also possible to use the left side part of FIG.
The alloy M52, the aluminum arrangement @51 of the lower substrate 102, and the Au alloy layer 53 thereon can also be aligned and thermocompressed at the same time as the right side portion. Since the fusion bonding by such thermocompression bonding can be set at a desired location, it is possible to design an arbitrary mechanical bonding strength.

In a three-dimensional laminated structure using a laminated substrate as described above,
Relaxation of stress is made possible by the arrangement of parts where the substrate is thinned by recesses (etch holes 22, 55, 56, etc.) set in multiple substrates and the physical properties of polyimide, a polymer material. Problems caused by distortion on the board can be prevented.

Note that the method of fusing the electrodes arranged on the two substrates described above is just one example, and it is clear that the device configuration of the present invention is not limited to this fusing method.

Next, the operation of the micro optical component shown in FIG. 1 will be explained.

In the region where the optical components are located, the thick semiconductor substrate portion is removed by etching holes 55, 56. The periphery of the etched hole is passivated by an insulating film 3 on the upper substrate 101 and an insulating film 54 on the lower substrate 102.

In the above configuration, the parallel light beam 57 is transmitted to the lower substrate 102.
Consider the case where the light is incident from the bottom.

The light beam 57 is converged by the FZP 49, for example, the light beam 5
8A, becomes a light beam 58B and reaches the optical component portion of the upper substrate 101. The light beam 58A is optically detected by, for example, a PN junction photodetector 501. On the other hand, the luminous flux 58B is S
O2 insulating film 14 (this part forms an optical window)
is transmitted with almost no attenuation and propagates above the upper substrate 101. If another substrate is fused on top of the upper substrate 101 in a similar manner to that described above, the effect of the light beam can also be transmitted to that substrate.

In the embodiment shown in FIG. 1, a certain part of the optical component does not need to include highly integrated elements, but in general, as a general application example having such an O-E function, C, C ，
D or other semiconductor image (or pattern) sensing devices may also be used. Also, in such a case, a pattern using a 3D 0-E functional device is better! ! It can be effectively used for image recognition, image transfer, single image storage electronic cameras, etc.

Furthermore, in the configuration of the present invention, the method of bonding or fusing the upper and lower substrates is not particularly limited, and other bonding or fusing methods may be used.

One element of the basic configuration of the present invention is 7B-7A in FIG.
As shown in the path -6-12B-12A, the connection means between the main surface and the back surface of the substrate via the recess in the low resistance ohmic region 6. Another method is to use the same four parts to create an active device with three or more active terminals (first
In the example shown.

One active terminal (drain in Figure 1) of a MOS transistor with source 15, train 16, and gate 18
It is also possible to connect the main surface and the back surface of the substrate via a switch mechanism.

The versatility of the bonding means between the main surface and the back surface of the substrate based on the configuration of the present invention as described above is achieved by designing a three-dimensional device that is formed by stacking a plurality of substrates and includes a semiconductor substrate as a part of the substrates. It can be used effectively when

Next, FIG. 2 is an embodiment diagram showing a configuration in which two or more electrode wirings are provided in one recess.

In addition, in FIG. 2, the upper substrate 10 in FIG.
A structure similar to No. 1 is shown upside down, with (A) and (B) showing cross-sectional views, and (C) showing a perspective view.

First, FIG. 2A shows a semiconductor substrate 60 in which a recess 22 is formed in a channel shape.

Further, FIG. 2(B) shows a state in which the electrode is drawn out from the recess, and the insulating film 62 on the back surface where the four parts 22 are located, the insulating film 63 on the main surface, and the low resistance ohmic region 64 are separated. Insulating film 61, back electrode contact portion 65A
,! An A-side electrode extension portion 65B, a main surface electrode contact portion 66A, a main surface electrode extension portion 66I3, and the like are provided.

Moreover, FIG. 2(C) shows a case where two structures as described above are provided in one recess.

In this case, two electrodes 65A-65B and 65A'-
65B' is shown, but the number of electrodes can be increased if electrical isolation is achieved within the four parts.

In addition, in FIG. 2, isolation by the insulating film 61 is used as a means to isolate the low resistance ohmic region 64 from the surroundings, but if the surrounding voltage distribution is appropriately selected and designed,
Reverse bias isolation of the n+p junction is also not infeasible.

Furthermore, as shown in the embodiment of FIG. 1, terminals of active devices such as drain outputs of MOS transistors may be mixed. The point is that the contact terminals on the bottom of the recess provided on the back of the substrate only need to meet configuration and bias conditions that allow the voltages applied to each terminal to be independently set.

Next, FIG. 3 is an example diagram in which there are a plurality of recesses in one board, and in the recesses there are a plurality of recess back surface terminals as described above, as seen from the back surface of the board. A top view is shown.

In FIG. 3, 8×2 contact terminals 68 are provided in each of the recesses A, B, C, and D.

With this configuration, 16-bit signals can be transferred between the main surface and the back surface of the substrate.

In the example shown in FIG. 3, there are four quadrants each having a 16-bit terminal. Among these, for example, all of the recesses A may be coupled by low resistance ohmic regions. Furthermore, for example, all of the recesses B may be constituted by one terminal of an active device such as the drain terminal of a MOS transistor.

Also, when considering sending and receiving upper and lower signals with multiple boards, the first
As considered in the illustrated embodiment, there is a signal flow from the upper substrate to the lower substrate and a signal flow from the lower substrate to the upper substrate. Therefore, the concave portion C1D in FIG. 3 may be a concave portion that divides and transmits the flow of these signals.

It is also possible to stack a plurality of substrates as shown in FIG. 3.

When a plurality of substrates are stacked and used in this way, the concave portions of the substrates that are in contact with each other may be set at shifted positions so that they do not overlap.

If the 2x8 pins of the etch channel switch connector are configured as A, B, C, and D with a laminated structure as shown in Figure 3, a 32-bit downward signal (signal from the upper board to the lower board) can be generated. ) and a 32-bit upward signal (signal from the lower substrate to the upper substrate) can be processed in parallel at the same time, making it possible to effectively utilize the characteristics of a three-dimensional stacked device.

The semiconductor device of the present invention is effective when a three-dimensional device is formed by fusing a plurality of substrates as described above.

In addition, in the embodiments described so far, the case where a Si substrate and an SOI substrate were used as the semiconductor substrate was exemplified, but a Si substrate or a 5OS (Si
Even in the case of a substrate (n 5apphire), the structure of the present invention can be formed using the 5iJfi portion.

Further, for the G1ass substrate and the Sapphire substrate, a hole can be formed on the back surface of the substrate by etching, RIE, etc., and a recess can be made up to 51ffJ.

In addition, although the case of S○I (S-5in2-5i) substrate is shown in Fig. 1, in addition, like the 5ionSionSi substrate, monolithic three-layer (n, ll) three-layer The configuration of the present invention can also be applied to devices that are dimensional devices.

In the case of the above structure, if the bottom substrate of a single-layer monolithic multilayer three-dimensional device is thick, the recess can be formed by etching the back surface of the bottom substrate. This corresponds to a semiconductor substrate equipped with a semiconductor substrate. Therefore, the semiconductor substrate in the description of the present invention can be broadly defined as a substrate containing all the semiconductor layers as described above.

Furthermore, as will be described later, a substrate that does not include a semiconductor among a plurality of laminated substrates may be required as a component constituting a three-dimensional device.

As already mentioned, these may be ceramic substrates such as PLZT substrates, or metal plates for shielding and heat dissipation. In addition, in thick film technology, C and R
A laminated structure has also been announced. Even for substrates that do not include these semiconductor layers, wiring connections in the vertical direction of the substrate are required.

For example, when a metallic substrate is used as one element of a multilayer substrate for a three-dimensional device, signals are transmitted vertically from the main surface of the substrate to the back side, or from the back side to the main surface. may be useful. Even in such a case, the method of transmitting signals between the main surface and the back surface of the substrate of the present invention as described above can be applied.

The insulating film to which the above method is applied is 1. For example, in the case of an aluminum metal plate, an alumina insulating film can be formed to a desired thickness by an anodic oxidation method or the like. With this method, an alumina insulating film with a thickness of 1 to 20 μm can be formed.

Further, in order to provide electrical insulation and reduce stray capacitance, a polymer insulating layer may be further added or a metal wiring layer may be further formed thereon.

Even in the above case, the basic structure of the substrate as shown in FIG. 2 can be applied. That is, in FIG. 2, it can be considered that the 81 board has been replaced by the AQ board. In this case, in order to ensure reliability in terms of heat dissipation and electrical isolation, the insulating films 62 and 63 may be approximately 1 to 20 times as thick as the insulating film of the 5i IC.

Further, instead of a single layer of insulating film, two types of insulating films may be stacked.

Further, the method of forming a plurality of wiring members from the back surface of the substrate to the bottom surface of the recess can be set in the same manner as shown in FIG.

Further, a metal wiring layer can also be formed on the main surface of the substrate opposite to the bottom surface of the recess.

Further, the signal transmitting means 64 for transmitting signals from the back surface of the substrate to the metal wiring area on the main surface of the substrate may be a resistor such as a poly-Si layer, or may be a low resistance wiring member n + (or p''
) A poly-Si layer or a high melting point wiring material such as Mo, W, or Ta may be used.

Further, in order to isolate the signal transmission means 64 from the first metal of the substrate, the isolation insulating film 61 needs to be sufficiently thick. This insulating film is AQ20. by anodic oxidation of AQ. Membranes, etc. can be used effectively.

Further, if the above structure is formed on an AQ substrate with a structure similar to the structure shown in FIG. 2, a large number of through holes can be set even in a metal substrate.

Since the above-mentioned through-holes can utilize IC technology, they can be made smaller and more precise than the individual sizes of conventional through-holes, and therefore can be used for highly integrated and miniaturized 3D devices such as 3D VLSI. Since it can be used to transmit signals in the vertical direction of the substrate, it is effective in solving problems (grounding, shielding, heat dissipation) in increasing the capacity of parallel signal processing devices.

In addition, the above technical concept can be effectively used for other devices, but considering the configuration of 3D devices, it can also be applied to the mounting method of 3D devices on multilayer substrates and the method of setting input terminals and output terminals. I can do it.

The main points of the structure when applying the structure of FIG. 2 to a metallic substrate have been described above.

Such a concept can also be applied to ceramic substrates such as PLZT and substrates including C elements and R elements in thick film technology. Compared to metallic substrates, these substrates can easily maintain independence in potential between the bulk material of the substrate body and the wiring members on the front, back, and four parts of the substrate. Therefore, the insulating films 62, 61, 63 in FIG. 2 may be thinner than the metal substrate.

Also, leakage between the bulk material of the main body of the board and the wiring can be reduced.

Furthermore, it is difficult to use an active device as a means 64 for transmitting signals from the bottom surface of the recess on the back surface of the substrate to the surface surface as shown in FIG. If the sacrifice condition is an increase in -, then
In principle, it is possible to set a fine product Ja made of Si or other semiconductors. For example, Si film on insulating film 011
A Si crystal layer can also be formed on a ceramic substrate or a Si film on a metallic substrate by using SOI technology such as laser annealing. It is also possible to construct an insulated gate FET or a bipolar device in this Si crystal layer. Therefore, the signal transmission means described above may utilize a three-terminal semiconductor device.

Furthermore, when substrates other than the Si substrates described above are stacked, it is necessary to consider the adverse effects of stress on each constituent substrate due to differences in thermal expansion coefficients between the substrates.

Since the adverse effects of heat dissipation can be avoided by using a metallic substrate or a substrate with good thermal conductivity, it is also possible to produce positive effects.

As mentioned above, when configuring a stacked three-dimensional device that includes substrates made of different materials, the structure must be comprehensively designed from the viewpoint of reliability due to stress, strain, temperature changes, etc.
It is necessary to optimize the desired three-dimensional device.

In addition, in the above-mentioned comprehensive design, if difficulties in the operation and reliability of the 3D device due to the mixing of different types of substrates cannot be removed, such a configuration is inappropriate and the 3D device cannot be properly designed. It should be avoided from the point of view of practical application.

In addition, in order to ensure durability and reliability such as mechanical bonding strength that can withstand stress, strain, and temperature changes that occur on each substrate that makes up a three-dimensional device, each substrate and the wiring members connected to it must be It is good to have a certain degree of flexibility. For example, the wiring area may be formed using the B11 lead technology, which allows lead wires to be placed floating in space, and the bonding method between the upper and lower substrates according to the present invention may be applied to the upper and lower substrates. If the wiring is connected to each other in the beam lead area installed on the board, the connection of these wirings will have mechanical flexibility, and will be resistant to stress, strain, and temperature changes that occur on each board. The above-mentioned stable structure including flexibility allows for flexible handling.

Next, FIG. 4 is a diagram showing a second embodiment of the present invention.

A cross-sectional view when a passive optical component is used as a micro optical component is shown.

In this embodiment, a 5i SOI substrate will be described as an example. The reason why a Si substrate is used as an example is because it is desirable for the reliability of the three-dimensional device structure that the coefficient of thermal expansion, etc., be the same between the substrates.

First, FIG. 4(a) shows an example in which a microlens array is used as a passive optical component. Several methods for making microlenses have been reported, but as shown in the figure, microfabrication is performed using an ion beam, an electron beam, or the like to form a concave lens (or convex lens) 110. Another method is to transfer a lenticular profile of photoresist. Alternatively, a lens-like refractive index distribution may be created by doping the material with some kind of impurity to increase the refractive index of the material by Δri. Furthermore, there is also a method of depositing a substance with a larger refractive index in the shape of a lens by sputtering through a special mask.

On the left side of the lens array formed as above,
A MOS transistor is arranged on the main surface of the I-substrate. The drain, which is one terminal of the active device, is electrically connected to the wiring area on the back side of the substrate through the wiring on the slope of the recess.

Next, FIG. 4(b) shows an example in which an FZP array 111 is used as a passive optical component.

The FZP embodiment, already described in FIG. 1 above, has the same effect as a lens having a focal length Mfi at a particular designed wavelength.

The feature of FZP is that it has a somewhat planar structure and does not require large irregularities like a lens.

However, as explained in FIG. 1, a rather complicated exposure method using electron beam exposure is required.

Note that, according to recent reports, when two or more FZPs are combined, the wavelength dependence becomes weaker, and it may be possible to have a convergence effect on the luminous flux in the band formed by the combination.

Next, FIG. 4(c) shows a case where an optical filter array 112 is used as a passive optical component.

The structure of such an optical filter is shown in an optical component handbook. That is, high refractive index rih
A narrow band filter can be obtained by alternately repeating a film with a low refractive index and a film with a low refractive index at an optical length of 1/4λ. In this case, considering the compatibility with the SL IC process, a low refractive index n.

Examples of the film having a high refractive index nh include Ta2O, Si, and N4 films.

Next, FIG. 5 is a diagram showing a third embodiment of the present invention, (a
) shows a cross-sectional view of a surface emitting semiconductor laser array formed on a Si substrate, and (b) shows a cross-sectional view of an optical modulator array in a heterojunction or superlattice configuration of a compound semiconductor formed on a Si substrate.

Several methods are known for forming a compound semiconductor single crystal layer such as a GaAs layer on a Si substrate.

As a direct method, a method has also been reported in which the Si (100) plane is shifted by several degrees toward the (l l O) plane and a Ga As layer is grown as a single crystal thereon. Further, it is also possible to form it on an insulating film as in the SOI structure. Also, S
iO,l or Ta,O on the substrate.

A film is formed, and a Ge film is formed on it using SO in the same manner as Si.
(2) It is also possible to form the film as a Ge film. Since there is less lattice constant misfit on the Ge crystallized product, Ga
The AS film grows crystals.

Examples of surface emitting semiconductor lasers will be described below.

FIG. 6 is an enlarged cross-sectional view of a portion of the semiconductor laser 113 in FIG. 5(a). Note that FIG. 6 is an example of a semiconductor laser, and this is not an ideal structure.

In FIG. 6, a recess 70 is formed in a Si substrate 71, and the slope and back surface of the recess 70 are protected by an insulating film 72. Further, a Si film 7 is formed on the main surface of the Si jJ1 plate 71.
3, and furthermore, Ta, O, and a film 74 are installed. Moreover, the Ge S○■ film 75 is.

It is formed on the Ta, Os film 74. Also, GaA
sn”7176, GaAs n layer 77, GaAs doped with n-type impurities (LAs/AQ
A s pair of multilayer reflective layers 78, n-type cladding layers 79. Active layer 80, p-type cladding layer 81, Ga doped with p-type impurity a6. gA Q6. IA8/Gal),
4 A u, , A s pairs of multilayer reflective layers 82 . Then, a cap layer 83 is formed using a compound semiconductor layer crystal growth method. Further, after forming the electrode isolation insulating film 84, the upper A u /Cp electrode 85 is formed.

A lower electrode 86 is formed over the GaAsn middle layer 76 to form a terminal electrode.

If a surface emitting laser is formed in the structure shown in FIG. 6, laser light is emitted upward, but also downward via the lower insulating films 73 and 74. If the lower Si substrate has four parts, surface emitting laser light can also be emitted below the substrate. With this configuration, the surface emitting laser on the Si substrate can emit laser light upward and downward. Therefore, if the above structure is adopted as one substrate part of the three-dimensional 0-E IC of the present invention,
Its actions and effects can be adapted to various uses.

FIG. 5(a) shows an array of surface emitting lasers as described above.

The device shown in FIG. 5(b) is an optical modulator for laser light or the like constructed using compound semiconductor heteromultilayer crystal growth layers similar to those described above.

The surface-emitting semiconductor laser itself also has a modulation effect on the externally incident light flux under certain regions and electric field distribution settings. Furthermore, as a unique device, an internal modulation element for an incident light beam using an electro-optic effect such as a change in refractive index due to a displacement of an electric field in a depletion layer of a heterojunction and its superlattice or a PN junction can also be considered.

The optical modulator 114 shown in FIG. 5(b) may be considered as an array of optical modulators made of compound single conductors as described above.

Next, FIG. 7 is a diagram showing a fourth embodiment of the present invention, which is a cross-sectional view of a three-dimensional optical repeater as an example of a system using simple O-E electronic devices.

In this example, three optical fiber parts 1, F'2, F
3, the case of relaying optical signals is shown as an example.

Considering the characteristics of the present invention, this number may be even larger. For example, even a bundle of loXIO optical fibers can be accommodated if the structure of the present invention is used.

In FIG. 7, a substrate 201 is a microlens formed by introducing a dopant into quartz or glass in the shape of a convex lens. Further, the substrate 202 is a Si substrate into which a surface emitting laser as shown in FIG. 6 is introduced. Also,
The substrate 203 is a 5iIC substrate including a photodetector. Further, the substrate 204 is a microlens array constructed by the same manufacturing method as the substrate 201.

Hereinafter, for convenience of explanation, a brief explanation of the drawings will be given.

First, an optical signal reaches the lower part of the three-dimensional device shown in FIG. 7 through optical fibers Fl, F2, and F3. The light beams from each optical fiber are condensed by microlenses 90A, 90B, 90C, etc. on the substrate 204, and
Photodetectors 91A, 91B, 9 configured in the Si part of 03
1C.

The Si substrate 203 is provided with recesses 92L, 92M, etc. of the present invention, and is used for transmitting signals between the substrates or between the front and back surfaces. In this part, the incident optical signal enters the photodetector and is converted into an electrical signal, and Si,! Signal amplification with Si IC configured in the board 203,
! ! 1st form etc. will be held.

Further, the substrate 202 is a 5iI substrate as shown in FIG.
Compound semiconductor laser 93A on C substrate.

93B and 93C are formed. and board 2
Recesses 92L and 92M of 03 and recess 9417 of substrate 202
, 94M, etc. are sent to the board 202.
It is also given to

This board 203. Since both substrates 202 include 5iiC, information processing of electrical signals can be performed. These information processes may include signal calculation, storage, comparison, signal pulse synchronization and timing Sa, and the like.

In the case of more advanced processing, there are various types of parallel signal processing that demonstrate the superiority of the three-dimensional device of the present invention.

These parallel signal processing systems can also be applied as hardware to non-Neumann type neurocomputers, Noisy system m, and the like.

The necessary information processing as described above is carried out on the board 202 and the board 2.
After processing with the three-dimensional device of 03, it is converted into an optical signal by a surface emitting laser, and the six surface emitting laser 9 can be outputted to an external optical fiber as a signal for optical transmission again.
3A, 93B, 93cti-m requires logic IC to operate
requires a large current compared to This high current drive circuit or power device can also be set in the 5i IC of the substrate 202.

The light beams emitted from the surface emitting lasers 93A, 93B, and 93C pass through microlenses (96A, 97A) provided on the substrate 201.
), (96B, 97B), (96G, 97G) to the upper optical fibers Fl', F2',
The light enters F3' and becomes the transmission mode in the optical fiber.

Next, FIG. 8 is a diagram showing an example in which the configuration and function of the optical repeater shown in FIG. 7 is studied as an O-E/IC circuit or system.

In FIG. 8, the optical signal from optical fiber F1 enters photodetector 120 on substrate 203 through substrate 204, which includes microlens 204-LNI. This photodetector '120 may be a PIN diode or, in some cases, an A1)D (avalanche photodiode) with a separate bias circuit. Further, a resistor 121 and the like are added as elements for distributing the power supply voltage Voo to the photodetector 120. In this figure, a light detection circuit is connected to N-type EDMOs 8122 and 123.

When the photodetector 120 is irradiated with a light flux having bright and dark pulses, the impedance such as the internal resistance of this photodetector decreases, and the gate voltage exceeds VLh and approaches the Voo side, so that the driver transistor of NMO8 122 is turned on. A depletion type NMOS transistor 123 is connected as a load of the NMO8)-transistor 122.

The output of the N-type El) MOS formed by the transistor 122 and the transistor 123 is turned on every time a light flux is incident on the photodetector of the parts 1 to 1.

This optical signal is transmitted via the optical fiber F1 using various modulation methods. Usually, it is a digital signal with binary modulation. These are N RZ (u
nipolar non return to
zero), RZ (upipolar ret.
CMI (coded
mark 1n version).

In addition, in the case of O-E-IC, CMO8 is not necessarily suitable because the human output of light often requires the supply of current. Therefore, in FIG. 8, the light input and output circuits are NMO3, and the electrical signal pulses are easily handled by CMO3 circuits, so they are configured that way.

The signal processing circuit including 0MO3 may include a logic circuit, an analog circuit, and the like. For example, 0MO of the substrate 203
As processing circuits including 5, NAND circuits, NOR circuits, AND circuits, OR circuits (123, 124, 125, 126
, 127, 128, 129, etc.), these are merely display examples, and other circuits may be used. In addition, the substrate 202 also has an example of a processing circuit including 0MO3 (for example, 141, 142, 143, 144°, 145
．． 146, 147, etc.).

The output of base 202 is the transistor 1 of N-type EDMO3.
48, drives an inverter buffer circuit consisting of transistor 149. Next, a light emitting element 151 (laser diode, light emitting diode, etc.) is placed between the transistor 152 and the transistor 15o of the N-type E1) MOS.
is installed, and the light emitting element 151 is driven for optical communication to generate optical pulses. The generated light pulse passes through a microlens 201-LNI set on the substrate 201, enters the optical fiber Fl', and propagates.

The above substrate 202 is a semiconductor laser diode and SiCM.
(7) Si devices such as OS, NMO8, etc. are included, and this configuration method is made possible by coexisting a Si substrate and a compound semiconductor device with the configuration described in FIG. 5 above.

Next, FIG. 9 shows an IC as an example related to FIG.
FIG. 3 is a diagram showing an embodiment in which optical pulse signals are transmitted and received between chips.

In FIG. 9, the substrate 201.202.203.204
can be considered to have the same or similar configuration to that of FIG. 8 above.

In the apparatus shown in FIG. 9, in addition to the above, there are a substrate 601 and a substrate 602 as laminated substrates for the three-dimensional device. The substrate 601 may be a Si substrate.

Optical window H by a recess as shown in other embodiments of the present invention
1 (for example, the same configuration as the portion where the photodetector is not formed on the insulating film 14 in FIG. 1). Note that it is of course possible that devices such as ICs are included on the Si substrate in addition to the optical window H1.

Further, the substrate 602 includes a light emitting element 16 in an IC of a Si substrate.
An example in which 3 is set is shown.

This light emitting element 163 is operated by an N-type EDMOS transistor consisting of transistors 161 and 162, and generates a light pulse. The configuration of this portion may be considered to be the same as a similar portion on the substrate 202.

As described above, in the case of FIG. 9, communication is carried out from the semiconductor substrate 602 to the Si substrate 203 using optical pulse signals.

Although not shown, the substrate 203 or the substrate 2
From the laser diode inside the 5i IC of 02 to the board 6
It is also possible to introduce a light pulse into the photodetector at 02 and detect the light pulse as shown on the board 203, thereby allowing the MO3IC to operate manually.

Also, when transmitting and receiving optical signals between boards.

The passage of the light pulses requires a four-part optical window or a microlens on a separate substrate. The transmission and reception of signals by optical communication between the boards that make up such a three-dimensional device requires good isolation between each circuit, and fan-in,
Phone Out can also introduce O-E IC concepts, providing new functionality and improved performance compared to electrical ICs. For example, if there is a microprocessor in the 3rd layer and 6R' of each of the multiple boards that make up a three-dimensional device, it can also be used to transmit and receive optical signals at multiple locations in parallel between these two processors. It will be possible.

In addition, the three-dimensional product M substrate 〇-E・shown in FIGS. 8 and 9
Although the IC circuits and systems have been illustrated as being composed of NMO5, CMO8, etc., a part of these circuits can also be composed of bipolar circuits, as has been reported in the past.

Note that signal transmission using an optical repeater as shown in FIG. 7.8.9 is used for optical communication, image communication, high-speed communication between computers, and the like.

Furthermore, new device configurations can be adopted in order to achieve the goals of device function, performance improvement, and high integration as an O-E IC. For example, a surface field effect transistor such as the fusion of photodetector 120, resistor 121 and MoS transistor 122 shown on substrate 203 of FIG. 8 or 9.

As a star, VariD P I G F E D (
Variable Distribution of
Potantial In5lated Ga
A tetrode or a transistor of the teField Effect Devices type can be used. Since this element has two gate region electrodes such as 61.02 in the gate region, unique designs are required for the bias circuit and drive timing of the gate region.

In addition, it is possible to create an original basic design for the tetrode of the VariD PIFED mentioned above, such as a Tetro-1 (or an inverter circuit with a MOS transistor as a load), so if these new design concepts are effectively utilized,
This will pave the way for the construction of highly functional, highly integrated 0-E ICs in new formats and the establishment of three-dimensional ICs.

On the other hand, a one- and three-dimensional product #substrate integrated circuit is 1. For example, as shown in the paper by JanQ Rinberg et al. (IIEEE Computer) cited in the prior art section,
It has many advantages in terms of circuits and systems that solve the problems of planar ICs.

In the above-mentioned literature, a substrate with a memory, a substrate with an accumulator (Accua+ulator), a substrate with a replicator surface, a substrate with a counter, a substrate with a comparator (Cowρarator), and an image input. The concept of a three-dimensional laminated board IC is shown, which consists of a board with an input surface, a board with a large number of output terminals, and a board with a circuit system that integrally controls each of these element devices.

Furthermore, many configuration examples and system application examples are also shown in the three-dimensional device described in Nikkei Microdevices, which is similarly cited in the prior art section.

Furthermore, when attempting to construct a large-scale integrated circuit such as a computer using a flat substrate, in the case of the Neumann type, an accumulator section and a memory section are required.
When exchanging data with the memory section, a processing speed jam occurs at the sea fence of information processing. This means that a word (Wor) has each bit that makes up the information.
d) also in connection with the address of the department.

V on N5unta
It is also called ``nbottle neck''. A solution to these problems is being found using a new system that incorporates even more parallel processing into one circuit.

New parallel processing computers such as those mentioned above and Euro computers for non-Neumann information processing.

Fuzzy Computer, A, 1. processing) requires large amounts of memory and large amounts of parallel signal processing.

Laminated substrate three-dimensional devices are expected to bring powerful hardware advantages and software innovations associated with architectural changes to the construction of electronic devices such as those described above. The 3D non-board 0-E IC of the present invention adds a new O-E IC concept to the 3D device design concept in the above-mentioned literature, and further increases the function and performance of the integrated circuit. It can be said that it has been improved. In particular, in image recognition and pattern recognition that involve large-capacity information processing, the 〇-E・IC concept, which is originally associated with optical-electrical conversion, is a very important component, so the three-dimensional It can be said that the 0-E-IC, which does not require a high performance board, brings about a significant performance improvement in these information processes.

In addition, as a special example, since optical signals are resistant to electromagnetic environments such as noise and discharge, it is difficult to communicate signals between electronic circuits installed near a large number of sensors and actuators in such adverse environments. It can be used. Under such an environment, even in the three-dimensional device of the present invention, which is an O-E IC, it is necessary to prepare a three-dimensional device configuration such as ensuring shielding properties with a metallic substrate and forming a strong ground electrode.

Note that the substrates 201, 202, 203, 20 in FIG.
It is necessary to be very careful about the method of bonding 4, including the method of connecting the wiring. That is, since the substrate 201 and the substrate 204 are glass or quartz plates, they have different coefficients of thermal expansion from the Si substrate.

Therefore, whether the solid fusion method shown in FIG. 1 is appropriate depends on the conditions. The difficulty of adhering dissimilar substrates has already been discussed, and in such cases a flexible bonding method is desirable.

For example, in the case of dissimilar substrates, applications such as floating wiring members such as beam leads and coupling using such wiring members may be considered, and the problem of wiring coupling between dissimilar substrates may be solved. In this case, the substrate of the surface emitting laser shown in FIG. 7 can be formed starting from an EaAs substrate.

Next, FIG. 10 is a diagram showing a fifth embodiment of the present invention.

In this embodiment, a substrate 301 having an electro-optic effect made of PLZT and a polarizer substrate 3 made of plastic etc. are placed between the upper substrate 201 and the lower substrate 202 in FIG.
02.

The above-mentioned PLZT plate has electro-optical effects such as birefringence due to the electric field between the transparent electrodes and the electric field due to the horizontal electrodes, and a difference occurs in the polarization state before and after passing through the plate. Therefore, the optical fiber Fl' passes through the polarizer plate 302.
The polarization state of the light beams incident on ', F2', and F3' can be controlled electro-optically and the strength of the light amount can be controlled electro-optically. Further, if such an electro-optical plate is used, an optical shutter can also be realized. Note that (98A) in FIG.

99A), (98B, 99B'), (98B, 99B)
, (98C199C) are transparent electrodes for electro-optical elements.

The embodiment shown in FIG. 10 has a large number of different types of substrates, so the construction and design are more difficult than the embodiments up to FIG. Flexible bonding methods also play an important role in this case.

〔Effect of the invention〕

As explained above, according to the present invention, the configuration is as follows. In other words, in a three-dimensional device in which at least two or more plate-shaped substrates are stacked and bonded together, a part of the substrate forming one layer has a microscopic optical component, and a small part of the substrate forming the other layer has a microscopic optical component. In both cases, there is a semiconductor layer in which a semiconductor device is formed. In addition, at least two
There is a means for interconnecting the wiring areas between the two boards;
Furthermore, the optical function of the micro-optical components on the substrate and the function of the semiconductor device on the substrate forming the another layer can be connected to each other by means of interconnecting the wiring regions between the at least two substrates. It is designed to operate by associating it with others.

Further, the means for interconnecting the wiring areas between the two substrates described above includes forming at least one recess on the back surface of at least one substrate, and penetrating the bottom surface of the recess, that is, the thin portion of the substrate. A connecting means is provided for electrically connecting the main surface and the back surface of the substrate through the provided ohmic member or active element, and a predetermined portion of the upper substrate and the lower substrate is electrically connected via the connecting means. The structure is such that it is connected to the

The configuration of the present invention as described above provides the following effects.

(1) In conventional three-dimensional devices, a means for coupling the main surface and back surface of the substrate by electrical signals has not been sufficiently developed, but according to the present invention, a method for configuring a three-dimensional device Each board can perform simultaneous parallel processing on a plurality of signal lines by the signal transmission means provided in the four parts of the present invention. This greatly facilitates vertical signal transmission to the substrate, and for example, a 32-bit upward signal or a 32-bit downward signal can be achieved by using the signal transmitting means of the present invention.

In the three-dimensional semiconductor device of the present invention.

Simultaneous signal processing as described above is possible, and at the same time,
At least one of the substrates constituting the three-dimensional device has a microscopic optical component.

For this reason, optical-electrical ICs (0-E
- IC) can also be easily configured.

(2) Most of the conventional 0-E-ICs had a planar structure, and few had three-dimensional structures whose features were well demonstrated.However, the three-dimensional groove structure of the present invention At IC,
Since multiple substrates are incorporated as elements of the laminated structure, 5i IC sections, micro optical components, compound semiconductor light emitting devices, etc. can be placed on individual substrates as needed, so 0-E devices and System configuration becomes much easier. For example, when optical information such as an image is expressed as a digital signal, the amount of signal becomes enormous, but in the 〇-E three-dimensional device of the present invention, even after converting a large amount of optical information into an electrical signal, Multiple pieces of directional signal flow,
Since it is capable of large-scale simultaneous signal processing, it can support information processing systems such as those mentioned above at high speed. Therefore, it can be used as hardware for signal processing such as advanced pattern recognition, neurocomputer signal processing, and fuzzy control.

Furthermore, even von Neumann type computers can be effectively used in large-capacity, parallel processing three-dimensional microcomputers, intelligent sensor devices with parallel signal processing functions, and the like.

Select and set various concepts of the present invention as appropriate 1
r, Regardless of the above-mentioned Neumann type or non-Neumann type signal processing, input by pattern or image is also possible, and
The output can also be output as a pattern or an image. This is almost impossible with conventional integrated circuit configurations, and the 0-E three-dimensional device of the present invention is a three-dimensional integrated device that corresponds to a system in the conventional concept. I can say that. Therefore, there is an advantage that the number of parts such as wire harnesses and mounting boards in the conventional system can be significantly reduced.

Furthermore, in the 0-E three-dimensional device of the present invention, a plurality of optical fibers or fiber bundles can be set anywhere on the top and bottom surfaces of a plurality of laminated substrates with a two-dimensional degree of freedom. As a result, even in the field of optical communications, the three-dimensional device of the present invention has the effect of enabling parallel processing of optical signals with a relatively large-area planar arrangement.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing one embodiment of the present invention, in which O-E, IC machine,
FIG. 2 is a partial cross-sectional view of an integrated semiconductor device using a three-dimensional device with a function, and FIG.
B) is a sectional view, (C) is a perspective view, and Figure 3 is a plane seen from the back of the board when there are multiple recesses in one board and there are multiple recessed back terminals in the recesses. 4 is a sectional view of an embodiment using a passive optical component as a micro optical component, FIG. 5 is a diagram of another embodiment of the present invention, and (a) is a surface formed on a Si substrate. A cross-sectional view of a light-emitting semiconductor laser array, (b) is a cross-sectional view of an optical modulator array in a heterojunction or superlattice configuration of a compound semiconductor formed on a Si substrate, and FIG. 6 is a cross-sectional view of the semiconductor laser of FIG. 5(a). 7 is a sectional view of a three-dimensional optical repeater configured as an embodiment of the present invention, and FIG. 8 is an O-E. FIG. 9 is an example diagram of a device that transmits and receives optical pulse signals between IC chips, and FIG. 10 is an example diagram showing an IC circuit and system.
It is a partial sectional view of an embodiment in which a substrate for a light flux control device such as polarization is added to the functions of the device shown in the figure. <Explanation of symbols> 1...Silicon bulk substrate part 2...Field oxide film 3...Insulating film covering four parts of the back surface 4...Si film of SOI configuration 5...For isolation penetrating the recessed part Insulating film 6・
... Signal transmission means 7.7A using a low resistance member in the recess
, 7B...Electrode 8...Source 9...Drain 10... going from the four parts of the back surface through the slope to the wiring and line area on the back surface.
・Thin gate oxide film 11...Silicon gate 12...Gate wiring electrode 13...Si film of SOI 14...One layer of SOI 15...Source 16...To the back surface of the substrate in the recessed part Drain part 17 that penetrates
...p-well region 18...gate electrode 19...
Source electrode 20... Electrode on the main surface of the drain 21... Electrode film 22 reaching the wiring area on the back side through the drain back terminal electrode 21A in the recess and the slope... Etch hole (recess) 23... Doped insulating film 24 such as PSG - n+ SOI Si layer 25...n type Si layer 26...P+ crystal layer 2
7...Insulating layer 28A, I3...Two electrodes 29 of photodetector...P+ region 30 of p-well contact...CMO8 of n-substrate
Board contact 1~n'' region 31...P+ source
32...P+ drain 323...n+ drain
34...r1+source: 35.36...SL gate 37.38...CMO8 gate isolation M film 39...Interlayer insulating film 40...Voo electrode 41...Vss electrode 42...CMO8 Output electrode 113...C
MO5 input gate electrode 44, 45...Polyimide layer 46U, 47U...Au alloy two-layer electrode 46 for upper substrate
E, 47L...Au alloy for lower substrate 2. lfl electrode 4
8...Transparent insulating film 49...FZP phase shift structure 50.51...Aluminum electrode 52.53...Au alloy electrode 5 for upper or lower substrate
4...Protective insulating film 55, 56 on the back surface of the lower substrate, etc.
... Etched hole 57.58 ... Luminous flux 101 ... Upper semiconductor substrate 102 ... Lower semiconductor substrate 501 ... Photodetector section 502 ... FZP portion 60
...Bulk part 61 of the substrate...Isolation insulating film 62 in the penetrating part of the recess
... Insulating film on the back surface 63 ... Insulating film 64 on the main surface
...Low resistance wiring members 65A, B...Wiring electrode member 68 on the back side...Terminal electrode group 70 in the recess seen from the back side...Recessed part 71 for surface emitting semiconductor laser...Semiconductor bulk part 72 ...Insulating film 73, 74 on the back side of the substrate...Insulating film 201 for SO-processed structure for semiconductor laser...Substrate 202 including microlens...Substrate with surface emitting laser (concavity for signal transmission) 203...Substrate with a photodetector (having a recess for signal transmission) 204...Substrate 90A, B, C with a microlens
... Microlenses 9tA, B, C... Photodetectors 92L, 92M... Concavities 93A, B, C... Surface emitting semiconductor lasers 94L, M.
・・Four parts 96.97A, B, C・・Micro lens 301・・
・Substrate 302 with a light flux control (polarization) device...Polarizer plates 98.99A, B, C...Transparent electrodes for light flux control device

Claims (1)

[Claims] A three-dimensional device made up of at least two plate-shaped substrates stacked together and bonded together, in which a minute optical component is formed on a part of the substrate forming one layer, and a substrate forming the other layer. A semiconductor device is formed on at least a part of the substrate, and at least one recess is formed on the back surface of at least one substrate, and an ohmic member or an active material is provided through the bottom surface of the recess, that is, the thin part of the substrate. A connecting means is provided for electrically connecting the main surface and the back surface of the substrate through the element, and predetermined portions of the upper substrate and the lower substrate are electrically connected through the connecting means, and the above-mentioned A micro-optical component provided on at least one substrate and a semiconductor device provided at a corresponding position on another substrate are optically coupled to operate. A three-dimensionally integrated semiconductor device that has some parts.