JPH02288718A - Converging method for adaptive digital filter - Google Patents

Abstract

PURPOSE:To attain initial pull-in and adaptive control at a high speed with high accuracy by updating with a constant step size sufficiently smaller than the unity by means of the direct calculation from an error when the error between an input signal and a pseudo signal is large and by means of the error polarity when smaller. CONSTITUTION:When a residual error epsilonK is large, an echo replica ERMK (f0) stored already is read from an address f0 of a main table memory 101, the residual error epsilonK is added to the replica and the result is used as an echo replica revision ERMK<+1> (f0), which is again stored in the main table memory 101. Then the echo replica in sub table memories 201, 202 are updated depending on the polarity of the residual error epsilonK. When the residual error epsilonK is sufficiently small, the echo replica of the main table memory 101 is updated depending on the increase/decrease in the step size SM. The processing above is repeated till the echo canceller is sufficiently converged.

Description

Detailed Description of the Invention [Summary] A look-up table type main filter section that generates a main component of a pseudo signal, a sub filter section that generates a subcomponent of a pseudo signal, and a pseudo signal from these main components and subcomponents. This invention relates to a convergence method for an adaptive digital filter that includes a synthesis section that synthesizes.

The purpose is to enable fast and accurate convergence.

When the error between the input signal and the pseudo signal is large, the main filter is updated by direct calculation from the error, and when the error is small, it is updated using a step size according to the error.The sub-filter is updated using a step size according to the error. Configure it to do so.

[Industrial Field of Application] The present invention relates to a convergence method for an adaptive digital filter comprising a main filter section comprising a look-up type main table memory and a sub-filter comprising a sub-table memory or a transversal filter.

Such an adaptive digital filter is used, for example, as an echo canceller in two-way simultaneous data communications. In two-way simultaneous data communications, due to impedance mismatch in the hybrid circuit that connects the 2-line subscriber line and the 4-line trunk line, the transmitted signal loops around to the receiving side as an echo through this hybrid circuit, degrading communication quality. . An echo canceller adaptively estimates this wrap-around echo and generates a pseudo echo of opposite polarity to cancel the echo. However, a convergence algorithm (i.e., an initial (entrainment algorithms and adaptive algorithms) are needed.

[Prior Art] FIG. 6 shows the configuration of a main part of a data transmitting/receiving section of a bidirectional simultaneous data communication system when an adaptive digital filter is used as an echo canceller. In the figure, 51
52 is a driver for the transmitted/received signal S (k), 53 is a hybrid circuit for 2-wire/4-wire conversion, and 54 is a pseudo echo e (k) and received data D (k). It is a synthesizer that synthesizes the The echo canceller 51 creates an echo e (k) that goes around from the hybrid circuit 53 to the receiving side and a pseudo echo e (k) of opposite polarity based on the transmitted/received signal 5 (k), and generates it from the hybrid circuit 53 using a synthesizer 54. By combining with the received data D (k), the received data D
Eliminate the echo e(k) component in (k).

Conventional examples of this echo canceller are shown in FIGS. 7 and 8. FIG. 7 shows a look-up table type echo canceller, and FIG. 8 shows a transversal filter type echo canceller.

Lookup table echo canceller.

The transmission signal sequence (S (k)) is introduced into the tap section 55, and this signal sequence pattern is used as an address to be stored in the memory section (
By storing the opposite polarity of the echo value r (k) at that time in the RAM) 56, the pseudo echo series (e (
k) ) and echo e (k
) is input, the echo e (k) is canceled by the pseudo echo e (k) accumulated in the memory unit 56. 'On the other hand, a transversal filter type echo canceller is configured to converge to the impulse response of the echo path using a known transversal filter, and has a tap coefficient for each of N pieces of input data. , a pseudo echo (e(k)) is generated by convolving the tap coefficient and the transmitted symbol to perform an echo canceller.

[Problem to be solved by the invention] The former look-up table type echo canceller is
Although it has the advantage of being able to cancel nonlinear echo components, the longer the echo tap length, the larger the memory capacity and the longer initial acquisition time (training time).
It has the disadvantage of becoming. This is especially true when a multilevel code is used as the transmission code.

On the other hand, the latter transversal filter type echo canceller has the advantage of being able to efficiently cancel echoes with long tap lengths and short pull-in time, but has the disadvantage of not being able to cancel nonlinear echo components.

Therefore, when canceling echoes with a relatively long tap length that include nonlinear components, it is difficult to apply the digital filters of the above two configurations.

Therefore, a digital filter of the form shown in FIG. 5 is proposed as a configuration that can perform cancellation with high accuracy and in a short convergence time even in the above case.

This configuration divides the lookup table memory into a main memory section 3 and a plurality of submemory sections 4-1 to 4-m,
Furthermore, a transversal filter section 5 and an IIR (infinite impulse response) filter section 6 are added.

The main memory section 3 creates a pseudo echo of a large amplitude level portion including the peak value of the echo level, and stores it in the sub memory 4-1.
~4-m creates a pseudo-echo for the subsequent portion where the echo level is relatively low. Further, the i-tap transversal filter section 5 cancels out the echo, and a first-order IIR filter section 6 is provided at the final stage to cancel the monotonically decreasing tailing echo. This makes it possible to accurately cancel echoes with long tails and nonlinear components in a short convergence time.

An object of the present invention is to provide a convergence algorithm that can perform initial pull-in and adaptive control quickly and accurately in the adaptive digital filter proposed above.

[Means and Effects for Solving the Problems 1] Fig. 1 is a diagram illustrating the principle of the present invention.

The adaptive digital filter convergence method according to the present invention is as follows:
A look-up table-type main filter section 71 that generates a main component of a pseudo signal, a sub-filter section 72 that generates a sub-component of a pseudo-signal, and a synthesis section 73 that synthesizes a pseudo-signal from these main components and sub-components. In the adaptive digital filter equipped with.

The main filter 71 performs updating by direct calculation from the error when the error between the input signal and the pseudo signal is large, and updates at a constant step size sufficiently smaller than 1 depending on the error polarity when the error is small. Updates are performed using a constant step size that is sufficiently smaller than l depending on the polarity.

[Embodiment 1] A convergence method of an adaptive digital filter as an embodiment of the present invention will be described below with reference to FIGS. 2 and 3. This adaptive digital filter is applied to an echo canceller and is realized by a DSP (digital signal processor). Figure 2 shows each function realized by the DSP in the form of a functional block diagram. It is.

In FIG. 2, 10 is a main table section, 20 is a sub-table section, and 30 is an IIR filter section.

41 and 42 are adders, and 43 is a 2-wire/4-wire converter.

The main table section 10 and the sub-table section 20 constitute a table-divided table reference echo canceller. The main table section IO is main table memory 1
01. Tap section 102 consisting of 6 taps. Residual error monitoring unit 103. Code detection unit 104. Step size determination unit 105° addition unit 106. It is configured to include a delay section 107.

Further, the sub-table section 20 is composed of two sub-tables with two taps, and the sub-table memory 201
, 202. Tap units 203, 204, code detection unit 205
．． Step size determination unit 206.207. Addition section 208
, 209, 212° delay units 210, 211. Further, the IIR filter section 30 includes a code detection section 301.
Step size determination unit 302. Addition units 303, 307° delay units 304, 309. Multiplication unit 305. register 306
．． 308,310. It is configured to include a damping coefficient section 311 and the like.

The transmission code for the transmitted data is 2BIQ, which is a four-value code.
symbol is used. When a 2BIQ code is used, since it has a DC component, a low-frequency cutoff circuit such as a transformer causes a wrap-around echo with a very long monotonically decreasing tail, so a table is used to equalize this tail. A first-order IIR filter section 30 is placed after the segmented echo canceller.

The operation of the embodiment will be described below with reference to FIG. Third
The figure is a flowchart showing the convergence algorithm of the echo canceller of the embodiment.

First, initial value settings are performed (step S2). That is,
Main table memory 101. Sub table memory 20
1,202. The contents of registers 308, 310, etc. are cleared to "0".

Next, the address of each memory corresponding to the transmission signal is calculated (step S3). Here, ERM (ro) is the echo replica read from address f0 of main table memory 101, and ER31 (go) is the address of sub table memory 201. g. The echo replica EH11(h,) read from is address h of the sub-table memory 202. The echo replica read from ER3 is the echo replica output from the primary IIR filter section 30. This echo replica ER3 is calculated by the following equation.

Uo ” Dr X U r + a +.

E R3:’Cs”XU.

Here, IDT is the attenuation coefficient of the first-order IIR filter section 30 + Cs is the weighting coefficient of the first-order TIR filter section 30. a
o to alG are transmission symbols.

Next, the residual error ε is calculated according to the following equation (step S4).

8m =Xk+ERM” (fo)+ER81’ (g
ol+ER32''(h,)+ER3 Here, X is the input, that is, the wraparound echo.

Next, it is monitored whether the calculated residual error ε, Iε is 1≧y (step S5). This is performed by the ε monitoring unit 103. Here, y is a positive number of 1 or less.

1F, , I≧y, that is, when the residual error ε is large, the echo replica ERM in the main table memory is updated according to the following equation (step S6).

Read the already accumulated echo replica ERM (fo) from the address f of the main table memory 101 and add the residual error ε to it. , the result is stored in the main table memory 101 again as an echo replica update value E RM ''' (f,). These processes are executed by the addition section 106, the delay section 107, etc.

Next, the echo replicas in the sub-table memories 201 and 202 are updated as follows depending on the polarity of the residual error ε (step S7).

At the time of εSukuO.

ERS1'' (go) = ERS1'' (go
) + 31ER32″”[ho)=ERS2”(h,
)+S2ε1≧0.

ER3I"" (go) "E RS 1" (g
o) −S IER32”'(ho)=ER32”(
h, ) −32 where St and S2 are step sizes.

A positive number smaller than l (0<SM, Sl, S2, S3
...<11. That is, the sign detection unit 205 detects the polarity of the residual error ε5, and if it is negative, the minute step size S1 is applied to the echo replica ER31' (go) read from the address g0 of the sub-table memory 201.
is added to obtain the echo replica update value ER3I"' (go
It is stored in the sub-table memory 201 again as 1. On the other hand, if the residual error ε1 is positive, the step size S1
will be subtracted. As a result, the echo replicas in the sub-table memory 201 gradually converge (step updating of the echo replica ERS2 is also performed in the sub-table memory 202 in the same way. Decision section 20
6.207. Addition unit 208.209. Delay section 210,2
It will be executed at 11th grade.

On the other hand, when lε++l<y, that is, the residual error ε has become sufficiently small, the echo replica of the main table memory 101 is updated as follows.

When ε1 × O, ERM″+’(f,)=ERM″(f, l+sMε, ≧
When ERM is 0, ERM"'(fol=ERM'(f,)-5M This is the same as the step update in the case of the sub-table memories 201 and 202, and the echo replica is updated by increasing or decreasing the step size SM. Also, sub table memory 2
01 and 202 as well, the echo replicas are updated in steps by the same process as in step S7 described above.

Next, the weighting coefficient C8 of the primary IIR filter section 30 is updated according to the following equation.

Cs”””Cs” S 3
o )
) is used for sequential step updating using the sine algorithm.

The above processing is repeated until the echo canceller is sufficiently converged (step 5IO).

FIG. 4 shows the results of a computer simulation of the echo suppression characteristics of the echo canceller based on the aforementioned convergence algorithm 4 using the 2BIQ code. In FIG. 4, the vertical axis represents the residual echo, and the horizontal axis represents the iteration (number of repetitions). In the above embodiment, since the input value xk is quantized using 5 bits below the decimal point, the theoretical maximum amount of echo suppression is -30 dB. The simulation results show that the amount of echo suppression is about -26 dB, which shows that almost ideal echo suppression is performed.

Various modifications are possible in implementing the invention. For example, in the above-described embodiment, the sub-table memory and the IIR filter are arranged after the filter section using the main table memory, but the present invention is not limited to this.9 For example, the structure includes the main table memory and the sub-table memory. , consists of main table memory, sub-table memory, and transversal filter.

A configuration consisting of a main table memory and a transversal filter, and a configuration consisting of a main table memory, a transversal filter, and an rlR filter.

Alternatively, the configuration may include a main table memory and an IIR filter.

Further, in the above-described embodiment, the step update was performed using a sign algorithm (hm).

Not limited to this, sochastic iteration algorithm fstochastic itaratio
nalgorithm) or adaptive step sign algorithm (adaptive 5tep sign
This may also be done using a1gorithn+1 or the like.

Furthermore, in the embodiment described above, the updating method for the main table memory is switched by comparing the residual error E with a predetermined value y, but the present invention is not limited to this. The switching may be performed automatically after a certain amount of time has elapsed.

In the above embodiment, the adaptive digital filter of the present invention was applied to an echo canceller.
In addition, the adaptive digital filter of the present invention can be generally applied to devices that generate arbitrary waveforms, such as waveform generators or equalizers.

[Effects of the Invention] According to the present invention, it is possible to converge an adaptive digital filter quickly and accurately.

[Brief explanation of the drawing]

FIG. 1 is a diagram explaining the principle of the present invention. FIG. 2 is a block diagram showing an echo canceller using an adaptive digital filter convergence method as an embodiment of the present invention. FIG. 3 is a flowchart showing the convergence algorithm of the embodiment. FIG. 4 is a diagram showing computer simulation results of echo suppression characteristics of the example. FIG. 5 is a block diagram showing the proposed adaptive digital filter. FIG. 6 is a block diagram showing a data transmitting/receiving section for bidirectional simultaneous data communication. FIG. 7 is a block diagram showing a conventional look-up table type echo canceller; FIG. 8 is a block diagram showing a conventional transversal echo canceller. 1.2-1 to 2-m...Tap section 3...Main memory section 4-1 to 4-m...Sub memory section 5...Transversal filter section 6.30...IIR filter Sections 7.8, 41.42...Synthesizer 10...Main table section 20...Sub table section 103...Residual error monitoring section 104.205.301---Sign detection section 105.20
6,207,302 ・・・Step size determination part h・→ Condolence

Claims (1)

[Claims] A look-up table-type main filter section (71) that generates a main component of a pseudo signal, a sub-filter section (72) that generates a sub-component of a pseudo-signal, and a sub-filter section (72) that generates a sub-component of a pseudo signal, and In an adaptive digital filter equipped with a synthesis section (73) for synthesizing pseudo signals, the main filter (71) uses direct calculation from the error when the error between the input signal and the pseudo signal is large, and when the error is small. A convergence method in which updates are sometimes performed with a step size depending on the error, and the sub-filter section (72) updates with a step size depending on the error.