JPH02284477A - Semiconductor photodetecting device - Google Patents
Semiconductor photodetecting deviceInfo
- Publication number
- JPH02284477A JPH02284477A JP1106245A JP10624589A JPH02284477A JP H02284477 A JPH02284477 A JP H02284477A JP 1106245 A JP1106245 A JP 1106245A JP 10624589 A JP10624589 A JP 10624589A JP H02284477 A JPH02284477 A JP H02284477A
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- buffer
- capacitor
- turns
- adp
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 7
- 239000000872 buffer Substances 0.000 claims abstract description 14
- 230000010355 oscillation Effects 0.000 claims description 6
- 230000000295 complement effect Effects 0.000 claims description 2
- 239000003990 capacitor Substances 0.000 abstract description 6
- 241000209094 Oryza Species 0.000 description 3
- 235000007164 Oryza sativa Nutrition 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 235000009566 rice Nutrition 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 239000008186 active pharmaceutical agent Substances 0.000 description 1
- 238000000098 azimuthal photoelectron diffraction Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 229920003002 synthetic resin Polymers 0.000 description 1
- 239000000057 synthetic resin Substances 0.000 description 1
Landscapes
- Light Receiving Elements (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体受光装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a semiconductor light receiving device.
従来の光通信用の半導体受光素子のアバランシェホトタ
イオー1〜(APD)てはアノ−)・、カッ−I・端子
がたな単に出ているのみてあり、また、実際の使用時に
はシリコンAPDの場合には200〜300■ ゲルマ
ニウムA P Dの場合には20〜50V、InGaA
s APDの場合には50〜80■(使用する時の増
倍率による)て使わさるを得す、高バイアス電圧か必要
であり使いにくい点があった。The conventional avalanche photodiode (APD) of a semiconductor photodetector for optical communication is simply exposed with its terminals protruding from the avalanche photodiode (APD). 200-300V for germanium APD, 20-50V for InGaA
In the case of s APD, a high bias voltage of 50 to 80 cm (depending on the multiplication factor used) is required, making it difficult to use.
上述した従来のアバランシェホトタイオー1〜は高バイ
アス電圧が必要であり使いにくいという欠点かあった。The conventional avalanche photodiodes 1 to 1 described above have the drawback of requiring a high bias voltage and being difficult to use.
本発明の半導体受光装置は、非安定マルチハイフレータ
型の発振回路、前記発振回路の出力端にそれぞれ接続さ
れ互いに相補型に動作する第1のバッファと第2のバッ
ファ、及び前記第1のバッファと第2のバッファの出力
端間の電圧を整流する倍電圧回路を集積した駆動回路チ
ップと、前記駆動回路チップに接続されたアバランシエ
ホトタイオートチップとを含むというものである。The semiconductor light receiving device of the present invention includes an oscillation circuit of an unstable multi-hyflator type, a first buffer and a second buffer that are respectively connected to the output ends of the oscillation circuit and operate complementary to each other, and the first buffer. and a drive circuit chip that integrates a voltage doubler circuit for rectifying the voltage between the output terminals of the first and second buffers, and an avalanche photo-tire auto chip connected to the drive circuit chip.
次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例を示す回路図である。FIG. 1 is a circuit diagram showing an embodiment of the present invention.
インバータ■1とインバータ■2と抵抗RF。Inverter ■1, inverter ■2, and resistor RF.
R1,コンデンサC1からなる帰還回路により非安定マ
ルチバイブレータ型の発振回路1aを構成している。こ
れにより、インバータ■2の出力電圧はほぼ」−■cc
と−1−V Bp、との間てパルス動作をくり返すこと
になる。さらにそのパルス信号(交流信号)をトランジ
スタQ]、、Q2及びC4でそれぞれ構成されたl・−
テムボール型の第1のバッファ1−bl、第2のバッフ
ァ]、 b 2に入力し出力インピータンスの低下を図
る。この場合電圧値としては前段の発振回路の出力と比
較してはとんと変動はない。A feedback circuit including R1 and capacitor C1 constitutes an unstable multivibrator type oscillation circuit 1a. As a result, the output voltage of inverter ■2 is approximately "-■cc
The pulse operation is repeated between and -1-V Bp. Furthermore, the pulse signal (AC signal) is transmitted to the transistors Q], , Q2 and C4, respectively.
first buffer 1-bl, second buffer of Temball type), b2 to reduce the output impedance. In this case, the voltage value does not change significantly compared to the output of the previous stage oscillation circuit.
また第1のバッファ1 b ]と第2のバッファ1、
l:+ 2からの出力を倍電圧回路2の入力とする。In addition, the first buffer 1 b ] and the second buffer 1,
The output from l:+2 is input to the voltage doubler circuit 2.
こうすることにより倍電圧回路2から見た入力信号はほ
ぼ■。CとVEE間でパルス的に変動しておる。例えば
vlが入力される時はQlかオフ、C2かオン、C3が
オン、C4がオフ(Ql〜Q4は全てスイッチンク領域
で動作させる)の状態であり、充電電流がC3→D1→
C2→Q2の順に流れC2を充電することになる。次に
+VCCが入力した時はQlがオン、C2かオフ、C3
かオフ、C4かオンになり充電電流としてはQ]→C2
→D2→C3→Q4の順に流れることになる、この時の
C3の充電電圧は、C2にすてに充電されているため、
Qlのエミック電位にC2の充電電圧を加えたものとな
りほぼ2×1VccV第1の電圧がかかることになる。By doing this, the input signal seen from the voltage doubler circuit 2 is approximately ■. It fluctuates like a pulse between C and VEE. For example, when vl is input, Ql is off, C2 is on, C3 is on, and C4 is off (Ql to Q4 are all operated in the switching region), and the charging current changes from C3 → D1 →
The power flows in the order of C2→Q2 and charges C2. Next time +VCC is input, Ql is on, C2 is off, C3
is off, C4 is on, and the charging current is Q]→C2
The charging voltage of C3 at this time, which will flow in the order of → D2 → C3 → Q4, is because C2 has already been charged.
This is the sum of the emic potential of Ql and the charging voltage of C2, and a first voltage of approximately 2×1 VccV is applied.
以上の回路を付加することにより従来のAPD用のバイ
アスとして用いた電圧をほぼ半分に低減することか可能
になる。By adding the above circuit, it becomes possible to reduce the voltage used as a bias for a conventional APD by approximately half.
なお、第2図に以上の駆動回路をモノリシックIC化し
APDチップと共に1種類のチップキャリアに搭載した
時の一例を示す。駆動回路チップ]4上には遮光用コー
テイング膜]3(合成樹脂に黒色粉末を混合して塗布し
たもの)をはとこしである。1.6,1.7.18は出
力端子メタライズ層で出力端子5,6.7に対応してい
る。Incidentally, FIG. 2 shows an example in which the above-mentioned drive circuit is made into a monolithic IC and mounted on one type of chip carrier together with an APD chip. A light-shielding coating film 3 (synthetic resin mixed with black powder and coated) is placed on the drive circuit chip 4. 1.6, 1.7.18 are output terminal metallized layers corresponding to output terminals 5, 6.7.
以上説明したように本発明はAPDバイアス用の駆動回
路をモノリシックIC化し、APDチップと同しパッケ
ージに組むことにより従来のAPDに必要なバイアス電
圧を見かけ上約半分にし、使用しやすい半導体受光装置
が得られる効果がある。As explained above, the present invention makes the APD bias drive circuit a monolithic IC and assembles it in the same package as the APD chip, thereby reducing the bias voltage required for conventional APDs by approximately half, making the semiconductor photodetector device easy to use. There is an effect that can be obtained.
12・・VCC電極メタライス層、〕3・・遮光コーチ
インク膜、]4・・・駆動回路チップ、]5・・API
チップ、]、6.17.1.8・・出力端子メタライス
層、19− V cc電極メタライス層、C1,、C2
C5・・・コンデンサ、D]、、C2・・タイオー1〜
、RI R2,RF・・抵抗、Ql−、C4・・・N
PN)ランジスタ、C2,C3・・P N P l−ラ
ンジスタ。12... VCC electrode metal rice layer, ]3... Light-shielding coach ink film, ]4... Drive circuit chip, ]5... API
Chip, ], 6.17.1.8... Output terminal metal rice layer, 19-V cc electrode metal rice layer, C1,, C2
C5... Capacitor, D], C2... Taioh 1~
, RI R2, RF...resistance, Ql-, C4...N
PN) transistor, C2, C3...PNP l-transistor.
Claims (1)
の出力端にそれぞれ接続され互いに相補型に動作する第
1のバッファと第2のバッファ、及び前記第1のバッフ
ァと第2のバッファの出力端間の電圧を整流する倍電圧
回路を集積した駆動回路チップと、前記駆動回路チップ
に接続されたアバランシェホトダイオードチップとを含
むことを特徴とする半導体受光装置。an unstable multivibrator type oscillation circuit, a first buffer and a second buffer each connected to the output terminal of the oscillation circuit and operating in a complementary manner to each other, and between the output terminals of the first buffer and the second buffer; 1. A semiconductor light-receiving device comprising: a drive circuit chip that integrates a voltage doubler circuit for rectifying a voltage; and an avalanche photodiode chip connected to the drive circuit chip.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1106245A JPH02284477A (en) | 1989-04-25 | 1989-04-25 | Semiconductor photodetecting device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1106245A JPH02284477A (en) | 1989-04-25 | 1989-04-25 | Semiconductor photodetecting device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02284477A true JPH02284477A (en) | 1990-11-21 |
Family
ID=14428728
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1106245A Pending JPH02284477A (en) | 1989-04-25 | 1989-04-25 | Semiconductor photodetecting device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02284477A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001073978A3 (en) * | 2000-03-29 | 2002-04-04 | Infineon Technologies Ag | Circuit for a light-sensitive diode |
GB2560376A (en) * | 2017-03-10 | 2018-09-12 | Toshiba Kk | On-Chip Integration of MMIC and single Photon Detectors |
-
1989
- 1989-04-25 JP JP1106245A patent/JPH02284477A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2001073978A3 (en) * | 2000-03-29 | 2002-04-04 | Infineon Technologies Ag | Circuit for a light-sensitive diode |
GB2560376A (en) * | 2017-03-10 | 2018-09-12 | Toshiba Kk | On-Chip Integration of MMIC and single Photon Detectors |
GB2560376B (en) * | 2017-03-10 | 2020-02-12 | Toshiba Kk | On-Chip Integration of a Bias Tee and a Single Photon Detector |
US10680130B2 (en) | 2017-03-10 | 2020-06-09 | Kabushiki Kaisha Toshiba | On-chip integration of MMIC and single photon detectors |
US11177409B2 (en) | 2017-03-10 | 2021-11-16 | Kabushiki Kaisha Toshiba | On-chip integration of MMIC and single photon detectors |
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