JPH02281166A - Semiconductor inspection apparatus - Google Patents

Abstract

PURPOSE:To enhance inspection accuracy by providing the wiring pattern respectively connectable to a probe needle at one end thereof and the connection terminal of a tester at the other end thereof to a wiring board. CONSTITUTION:A chip (semiconductor element) 2 is taken out of a tray loaded with a plurality of chips 2 one at a time and the lead row 2a thereof is brought into contact with the probe needles 24c of the test card 24 of an inspection part and electrically connected to a tester 27 to perform inspection. The card 24 is provided to a wiring board 24a composed of an insulting body and the respective probe needles 24c are provided to a large number of needle insertion holes 24b whose inside surfaces are brought to a state possible in electrical continuity by metal plating treatment. A wiring pattern 2f having the contact part 24b connected to he needles 24c through the plated parts of the respective insertion holes 24b at one end thereof and capable of being brought to the contact state with the connection terminals 27a of the tester 27 at the other end thereof is provided to the surface of the board 24a. Therefore, only the pattern 2f is present between the needles 24c and the terminal 27a and the generation of noise is prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a semiconductor testing device, and more particularly to a testing device for packaged semiconductor devices.

(Prior art) Conventionally, in the process of inspecting the electrical characteristics of packaged semiconductors, a wide variety of semiconductor element packages are used, so a dedicated inspection device (IC handler) is required for each type of package. However, in response to the recent trend toward high-mix, low-volume production of semiconductor devices, a so-called universal handler has been developed that can measure semiconductor devices of many shapes with one device by replacing the measuring unit. ing.

A one-tray type universal handler is known as a semiconductor device feeding type.

This one-tray universal handler has a tray with a large number of device accommodating sections, for example, arranged in a grid pattern, and a packaged semiconductor device such as a QFP, SOP, etc.
etc., and take out the semiconductor devices one by one from the tray, and test each semiconductor device on the tray by sequentially contacting an inspection terminal such as a probe needle that can be connected to the test head of a testing device (tester). It is configured as follows.

By the way, as semiconductor devices become more highly integrated, the number of terminals of these packaged semiconductor devices also increases, and the pitch of the terminals becomes narrower. When performing measurements, high inspection accuracy is required, and the signal sent from the probe needle to the tester is
It must be ensured that no noise is generated.

(Problem to be solved by the invention) However, in conventional universal handlers, the probe needle was connected to the test head of the tester via a cable, etc., which caused noise in the electrical signal at the cable connection or within the cable. There was a problem in that the test accuracy was easily deteriorated.

The present invention has been made to solve the above-mentioned problems, and its purpose is to provide a semiconductor inspection device that can improve inspection accuracy.

[Structure of the Invention] (Means for Solving the Problem) The semiconductor inspection device of the present invention takes out semiconductor elements one by one from a tray on which a plurality of semiconductor elements are mounted, and connects an electrode terminal of the semiconductor element with a probe needle. In semiconductor testing equipment that conducts inspection by electrically connecting to a predetermined test equipment, one end can be connected to the probe needle, and the other end can be connected by directly contacting the connection terminal of the testing equipment. The device is characterized in that it includes a wiring board having a pattern.

(Function) In the present invention, the probe needle is connected to one end of the wiring pattern of the wiring board, and the other end of this wiring pattern directly contacts the connection terminal of the test device to be electrically connected.

Therefore, only a wiring pattern is interposed between the probe needle and the connection terminal of the test device, and the generation of noise is prevented, making it possible to improve the inspection accuracy.

Furthermore, the structure of the device is simplified, and manufacturing costs can be reduced.

(Example) Hereinafter, a semiconductor inspection apparatus according to an example of the present invention will be described with reference to the drawings.

As shown in FIG. 3, the apparatus main body 1 includes a tray loader system 4 for loading and unloading a tray 3 containing a large number of semiconductor elements such as flat package ICs (hereinafter referred to as chips) 2 arranged in a grid pattern. And this tray 3
The chips 2 taken out one by one are mounted on the inspection table,
It is comprised of an inspection stage system 5 that transports the chip 2 to an inspection section. In addition, at the prefecture-side boundary of the inspection stage of the tray loader system 4, there is a chip transfer mechanism 6 for holding the chips 2 one by one and transferring the chips between the tray loader system 4 and the inspection stage system 5. is equipped.

The tray 3 used in this example is made of conductive resin, for example, as shown in FIG.

On the surface of a rectangular tray main body 31 with a thickness of [i, 5+nn+, four accommodating parts 32 for accommodating the chips 2 are formed in a grid of 5 rows and 6 columns, and the accommodating recesses 32 are configured to accommodate the chips 2. ing. Further, concave portions in two rows and two columns from the four corners of the tray body 31 form a holding plate 33 for holding the tray 2 by a holding portion of a tray conveyance mechanism, which will be described later. In addition, a tray 2 is provided at one of the four corners of the tray body 31.
A chamfered portion 34 is formed to define the directionality.

Incidentally, the tray loader system 4 includes a sender mechanism 7 which can be raised and lowered in which a large number of trays 3 are stacked on shelves, a tray buffer mechanism 8 for temporarily storing empty trays, and trays 3 containing chips 2 that have been inspected. A large number of stacked shelves of receiver mechanisms 9 that can be raised and lowered are arranged in parallel along the chip transfer mechanism 6, respectively. Hereinafter, the direction in which the sender mechanism 7, tray buffer mechanism 8, and receiver mechanism 9 are arranged side by side will be referred to as the Y direction, and the direction orthogonal thereto will be referred to as the X direction.

The structure of the chip transfer mechanism 6 is such that various mechanisms for transferring chips are developed around a base 10 placed at the boundary between the tray loader system 4 and the inspection stage system 5. A tray transfer mechanism 11 is disposed on the side surface of the tray loader system 4 and is movable in the Y-Z direction along the upper part of the sender mechanism 7, tray buffer mechanism 8, and receiver mechanism 9. Holding section 11 of this tray transfer mechanism 11
The holding plate 33 of the tray 3 shown in FIG. 4 described above is held by suction by a.

Also, perpendicular to the end of the base 10 on the side of the sender mechanism 7, a chip carry-in system is used to hold the chips 2 one by one from the tray 3 stacked on the top shelf of the sender mechanism 7 and transport them to the inspection stage system 5. A mechanism 12 is provided, which is perpendicular to the edge of the blade base 10 on the side of the receiver mechanism 9 and holds the chips 2 that have been inspected in the inspection stage system 5 and stacks them on the top stage of the receiver mechanism 9. A chip unloading mechanism 13 is provided for transporting chips onto the tray 3.

These chip loading mechanism 12 and chip loading mechanism 13 each include an X-Z stage 15 that is combined with, for example, an LM guide and a ball screw, for moving the transport arm 14 protruding in the X direction in the X-Z direction; The holding portion 16 is provided on the side surface of the transfer arm 14 so as to be movable in the X direction, and holds the chip 2, for example, by suction.

A pair of holding parts 17a and 17b are provided at a predetermined interval on the side surface of the base 10 on the side of the inspection stage system 5 for holding the chip 2, for example, by suction. At the same time, the chip 2 transported to the inspection stage system 5 is transferred onto the inspection table 18 of the inspection stage system 5, and at the same time, the chip 2 that has been inspected on the inspection table 18 is transferred to the chip unloading mechanism using the other holding section 17b. A double transfer mechanism 17 for transferring to the transfer section 13 is disposed so as to be movable in the YZ force directions.

In the center of the inspection stage system 5, there is an inspection table 18 on which the chip 2 is placed, and an inspection table 18 on which the chip 2 is mounted.
One inspection table stage moves the chip in the x-y-z-θ direction, and the final alignment (hereinafter referred to as fine A fine alignment mechanism 20 is arranged to provide positioning information (referred to as alignment) to the drive control mechanism of the examination table stage 19.

In addition, on the chip loading mechanism 12 side of the inspection stage system 5,
A rough alignment (hereinafter referred to as pre-alignment) mounting table 21 on which the chip 2 transported by the chip carrying mechanism 12 is placed is arranged, and this pre-alignment mounting table 2
1 is provided with a pre-alignment image recognition mechanism 22 that captures an image of the chip 2 on the mounting table 21 and detects the amount of deviation from regular reference position information.

A delivery table 23 on which chips 2 to be delivered to the chip delivery mechanism 13 are placed is arranged on the chip delivery mechanism 13 side of the inspection stage system 5 .

Further, in the X direction of the fine alignment mechanism 20, there is provided an inspection section 25 in which a test card 24 and the like are arranged. This test card 24 is constructed as follows.

That is, as shown in FIG. 1, each probe needle 24c is inserted through a large number of needle insertion holes 24b provided in a disk-shaped wiring board 24a made of an insulator.

The probe needle 24c is detachably held on the wiring board 24a by a holding member 24d. The inner surface of the needle insertion hole 24b is plated so that the probe needle 24 inserted therethrough can be inserted.
c are in contact and electrical conduction is possible. Wiring board 24a
A wiring pattern 24f is provided on the surface thereof, one end of which is connected to the plating portion of each needle insertion hole 24b, and the other end of which has an abutment portion 24e that can abut against the connection terminal 27a of the tester 27. As shown in FIG. 2, the contact portion 24e is
They are arranged on the peripheral portion 24g of the wiring board 24a. A reinforcing plate 24g is provided on the lower surface of the wiring board 24a.
The test card 24 is integrated into the apparatus main body by removably fixing the peripheral portion of the test card 4g to the test card holding plate 28 fixed to the apparatus main body using set screws 24h.

The operation of the semiconductor inspection apparatus having such a configuration will be described below.

First, the X-Y stage of the chip loading mechanism 12 is driven to transport the transport arm 14 onto a predetermined chip row on the tray 3, and then the chip holding section 16 of the transport arm 14 is moved in the X direction. The chip 2 is moved over the chip to be inspected, the transport arm 14 is lowered, and the chip 2 is held, for example, by suction, in the holding section 16 .

Thereafter, the chip carrying mechanism 12 is driven to transport the sucked and held chip 2 onto the mounting table 21 for Bria alignment on the inspection stage system 5 side, and the Bria alignment!・Placement stand 2
Transferred to 1 above.

Here, by the pre-alignment image recognition mechanism 22,
An image of the mold part of the chip 2 on the pre-alignment mounting table 21 is captured, and the amount of deviation from the regular reference position information is detected.

After calculating the position information for pre-alignment in this way, one chip holding section 17a of the double transfer mechanism 17 holds the chip 2 on the pre-alignment mounting table 21,
While transporting and transferring onto the inspection table 18 of the inspection stage system 5, the other chip holding section 17b of the double transfer mechanism 17
At this point, the tested chips 2 on the inspection table 18 are transferred and transferred onto the delivery table 23, which is a delivery section to the chip delivery mechanism 13.

When the chip is transferred from the pre-alignment mounting table 21 to the inspection table 18, the inspection table 18 is placed on standby in advance at a predetermined transfer position, for example, approximately at the center of the side surface of the inspection stage system 5 of the base 1o. However, if the pre-alignment image recognition mechanism 22 detects a misalignment of the chip 2, the chip 2 is placed on a predetermined reference position on the inspection table 18 based on this misalignment information. Wait in a state where the positional deviation needle movement is corrected so that the needle is placed in the correct position. In this way, the chip 2 is always mounted at a predetermined position on the inspection table 18.

The inspection table 18 on which the chip 2 is mounted temporarily stops below the fine alignment mechanism 20 while moving to the inspection section 25 where the test card 24 and the like are arranged, and the fine alignment operation of the chip 2 is performed here.

Here, the fine alignment mechanism 20 images a part of the lead rows 2b on two orthogonal sides of the chip 2 on the inspection table 18, calculates the center of gravity position of the imaged part from the imaged information, and calculates the position of the center of gravity of the imaged part. The center of gravity position information is compared with the predetermined standard center of gravity position information to calculate the positional deviation, and the inspection table 18 is adjusted so that the chip 2 is in the correct position based on the information on the amount of positional deviation. Move and perform fine alignment.

After finishing the fine alignment of the chip 2 in this way, the inspection table 18 is moved below the test card 24,
The test table 18 is raised and the lead row 2a of the chip 2 is brought into contact with the probe needles 24c provided on the lower surface of the test card 24 to perform the test.

The electrical signals sent from the lead row 2a to the probe needles 24c are sent to the wiring pattern 24f via the plated portion of the needle insertion hole 24b, and further to the connection terminals 2'7. Sent to a.

After the inspection is completed, the inspection table 18 is moved to the transfer position again, and here, one chip holding part 17b of the double transfer mechanism 17 holds the inspected chip 2 on the inspection table 18 and transfers the chip. At the same time, the chip 2 for next inspection on the pre-alignment mounting table 21 is transferred to the mounting table 23'2 by the other chip holding section 17a of the double transfer mechanism 17.
is held and transferred onto the inspection table 18.

Inspection completed - Chip 2 is placed on the chip delivery table 23 -
After the chip 2 is transferred to, the chip 2 is held, for example, by suction, in the chip holding section 16 provided on the transport arm 14 of the chip unloading mechanism 13, and the transport arm 14 is moved onto the tray 3 of the receiver mechanism 9. The chip 2 is mounted at a predetermined position on the tray 3. At this time, the chip 2 determined to be defective by the inspection is dropped into a defective product storage box 26 arranged below the movement trajectory of the transport arm 14 .

By repeating the series of operations described above, the chips 2 accommodated in the tray 3 of the sender mechanism 7 are sequentially inspected and accommodated onto the tray 3 of the receiver mechanism 9.

When all the chips 2 on the tray 3 of the sender mechanism 7 have been inspected and the tray 2 of the receiver mechanism 9 is fully loaded with chips 2, the tray transfer mechanism 11 uses its tray holding part 11a to transfer the chips 2 to the sender mechanism 7. The empty tray 3a is held, for example, by suction, and transferred onto the tray 3 full of chips 2 of the receiver mechanism 9, and loaded thereon. Thereafter, the sender mechanism 7 raises the tray for the next inspection so that it is at the same position as the empty tray 3a, while the receiver mechanism 9 raises the tray for the next inspection so that it is in the same position as the empty tray 3a. The empty tray 3a is lowered so that the tray 3a is in the same position as the tray 3 full of chips 2.

Furthermore, if a defective chip occurs, the tray 3 of the sender mechanism 7 becomes empty before the tray 3 of the receiver mechanism 9 becomes fully loaded, making it impossible to set the tray for the next inspection. , in such a case,
An empty tray 3a is temporarily put on standby on a tray buffer mechanism 8 disposed between a sender mechanism 7 and a receiver mechanism 9.

Then, when the tray 2 of the receiver mechanism 9 is full of chips, the empty tray 3a that has been waiting in the tray buffer mechanism 8 is loaded onto the receiver mechanism 9 in the same manner as the above operation, so that the next inspection of the sender mechanism 7 can be carried out. This prevents the tray from becoming impossible to set due to an empty tray 3a.
Continuous processing becomes possible.

Thus, according to the semiconductor testing device of this embodiment, the probe needle 24c is connected to one end of the wiring pattern 24f of the wiring board 24a, and the contact portion 24e provided at the other end of the wiring pattern 24f is connected to the tester 27. It can be electrically connected by directly contacting the terminal 27'a. Therefore, only the wiring pattern 24f is interposed between the probe needle 24c and the connection terminal 27a of the tester 27, and the generation of noise is prevented, making it possible to improve the inspection accuracy. Furthermore, since no cables are used, the structure of the device is simple and manufacturing costs can be reduced.

[Effects of the Invention] As explained above, according to the semiconductor testing device of the present invention, the noise generated in the signal sent from the probe needle to the tester is extremely small, making it possible to obtain highly accurate testing results.

[Brief explanation of drawings]

FIG. 1 is a diagram showing the configuration of a test card of a semiconductor inspection device according to an embodiment of the present invention, FIG. 2 is a plan view of the test card shown in FIG. 1, and FIG. FIG. 4 is a plan view showing the configuration of such a semiconductor inspection apparatus, and FIG. 4 is a plan view showing the tray shown in FIG. 3.

Claims (1)

[Claims] (1) Semiconductor testing in which semiconductor devices are taken out one by one from a tray on which multiple semiconductor devices are mounted, the electrode terminals of the semiconductor devices are brought into contact with a probe needle, and the test is performed by electrically connecting to a predetermined test device. 1. A semiconductor testing device comprising: a wiring board having a wiring pattern, one end of which can be connected to the probe needle, and the other end of which can be directly contacted and connected to the connection terminal of the test device.