JPH02278720A - Plasma doping apparatus - Google Patents

Plasma doping apparatus

Info

Publication number
JPH02278720A
JPH02278720A JP9872889A JP9872889A JPH02278720A JP H02278720 A JPH02278720 A JP H02278720A JP 9872889 A JP9872889 A JP 9872889A JP 9872889 A JP9872889 A JP 9872889A JP H02278720 A JPH02278720 A JP H02278720A
Authority
JP
Japan
Prior art keywords
plasma
lamp
temperature
depth
impurity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9872889A
Other languages
Japanese (ja)
Inventor
Hiroyuki Okada
裕幸 岡田
Kazuo Fujiwara
一夫 藤原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP9872889A priority Critical patent/JPH02278720A/en
Publication of JPH02278720A publication Critical patent/JPH02278720A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To suitably set a temperature and time and to obtain a desired diffusion depth and total impurity amount by providing means for heating a semiconductor substrate to 800 to 1000 deg.C of temperature range during application of a plasma in an apparatus for introducing an impurity to the substrate. CONSTITUTION:A semiconductor substrate 5 is heated to a desired temperature in a range of 800 to 1000 deg.C during application of a plasma by heating with a lamp 8 or a heater buried in a wafer holder 6, and an impurity diffusing depth specified by a temperature and high temperature applying time is obtained. The lamp 8 is so mounted at the top of the wafer 5 through a quartz window 9 as not to be brought into contact with a plasma to heat it. A reflecting plate 10 is mounted on the back of the lamp 8 to increase its heating efficiency. It may be heated to a high temperature by a heater instead of the lamp 8. Thus, an impurity layer can be formed in desired concentration of 10<16>-10<20>/cm<3> and depth of 0.1-0.2mum with good controllability.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、半導体基板中の不純物を導入するドーピング
装置、特にプラズマを用いることを特徴とするドーピン
グ装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a doping apparatus for introducing impurities into a semiconductor substrate, and particularly to a doping apparatus characterized by using plasma.

(従来の技術) 半導体基板中に不純物を導入する方法として、従来から
、イオン注入法、気相拡散法などが多用されてきた。し
かし、イオン注入法では、半導体基板に誘起されて結晶
欠陥の問題があり、気相拡散法では、高濃度に不純物拡
散を行うと、拡散深さが大きくなって制御しにくくなる
という問題がある。低温で高濃度に不純物拡散を行う方
法としてプラズマを用いた方法が知られている。(第1
9回 固体素子・材料コンファレンス 319頁参照)
(Prior Art) As a method for introducing impurities into a semiconductor substrate, ion implantation, vapor phase diffusion, and the like have been widely used. However, the ion implantation method has the problem of crystal defects induced in the semiconductor substrate, and the vapor phase diffusion method has the problem that when impurity diffusion is performed at a high concentration, the diffusion depth increases and becomes difficult to control. . A method using plasma is known as a method for diffusing impurities at high concentrations at low temperatures. (1st
9th Solid-State Devices and Materials Conference (see page 319)
.

これはドーパントのガスをプラズマ化することにより、
活性度の高い不純物を高濃度に発生させて半導体基板に
導入する方法である。プラズマの発生方法としては、平
行平板型の装置とECRを利用した装置が知られている
This is done by turning the dopant gas into plasma.
This is a method in which highly active impurities are generated at a high concentration and introduced into a semiconductor substrate. As methods for generating plasma, a parallel plate type device and a device using ECR are known.

(発明が解決しようとする課題) プラズマを用いてドーピングする場合、一種の低加速エ
ネルギーのイオン注入と同様の原理で半導体基板中に不
純物を導入する。したがって、プラズマで得られる加速
エネルギーが1.0〜2.0keVLか得られないため
、その飛程は、数十人にしかならない。従って、Asや
Bが、固溶限(約1021個/cd)までドーピングし
ても、その深さが浅いため、ドーピング総量は、ごく微
量になり、不純物を活性化するための熱処理を行った場
合に、所望の拡散深さ0.1〜0.2.で所望の不純物
濃度101′〜1020個/−を得ることが難しい。
(Problems to be Solved by the Invention) When doping is performed using plasma, impurities are introduced into a semiconductor substrate using a principle similar to a type of ion implantation with low acceleration energy. Therefore, since the acceleration energy obtained with plasma is only 1.0 to 2.0 keVL, its range is only a few dozen people. Therefore, even if As or B is doped to the solid solubility limit (approximately 1021 pieces/cd), the total amount of doping will be very small because the depth is shallow, and heat treatment is performed to activate the impurities. If the desired diffusion depth is between 0.1 and 0.2. It is difficult to obtain the desired impurity concentration of 101' to 1020/-.

(課題を解決するだめの手段) プラズマドーピング法では、表面から数十人の深さまで
は、固溶限で規定される不純物濃度になる。従って、総
不純物量を増すためには、プラズマドーピング中に、高
温を印加して、不純物を半導体基板内に拡散させ、深さ
を規定してやればよい。本発明は、この原理により7プ
ラズマ印加中に、半導体基板を、ランプ加熱もしくは、
ウェハーホルダー中に埋め込んだヒーターにより、80
0℃から1000℃の間の所望の温度に加熱し、温度と
高温印加時間によって規定される不純物拡散深さを得る
(An unsuccessful means to solve the problem) In the plasma doping method, the impurity concentration from the surface to a depth of several tens of nanometers is determined by the solid solubility limit. Therefore, in order to increase the total amount of impurities, high temperature may be applied during plasma doping to diffuse the impurities into the semiconductor substrate and define the depth. Based on this principle, the present invention heats the semiconductor substrate with a lamp or heats the semiconductor substrate during plasma application.
The heater embedded in the wafer holder allows
It is heated to a desired temperature between 0° C. and 1000° C. to obtain an impurity diffusion depth defined by the temperature and high temperature application time.

(作 用) 高温加熱しながらプラズマドーピングする場合。(for production) When performing plasma doping while heating at high temperatures.

表面濃度Nsは、はぼ一定と考えてよい。(ボロン:N
s= 6 X 10zc′i/ ci、 As : N
s= 2 X 1021個/d) 拡散深さXと、高温度印加時間tと、不純物濃度の深さ
方向プロファイルは次式で与えられる。
The surface concentration Ns can be considered to be approximately constant. (Boron: N
s= 6 X 10zc′i/ci, As: N
s=2×1021 pieces/d) The diffusion depth X, the high temperature application time t, and the depth profile of the impurity concentration are given by the following equation.

れる。It will be done.

a D =D o exp (h−r;)   E a :
活性化エネルギー従って、温度と、時間を適宜設定する
ことにより、所望の拡散深さと、総不純物量が得られる
a D = D o exp (hr;) E a :
Activation energy Accordingly, by appropriately setting temperature and time, desired diffusion depth and total amount of impurities can be obtained.

(実施例) 第1図に本発明による一実施例の装置の構造を示す。プ
ラズマ生成には、無電極放電であるECRを用いた。マ
イクロ波キャビティ〕−に、導波管2を通じて、2.4
5GHzのマイクロ波を導入して、マグネット3とマイ
クロ波の共鳴により、プラズマを生成する。このプラズ
マ中のイオンを発散磁界を用いて、反応室4に導き、ウ
ェハー5に不純物を導入する。不純物をウェハーに注入
するため、ウェハーホルダー6にRFバイアス7を印加
して、陰極降下電圧を一800vから一1000V程度
発生させ、ウェハーに不純物を導入する。ウェハー上部
には、加熱のために、ランプ8をプラズマに接しないよ
うに、石英窓9を通して設置する。加熱ランプの背部に
は、加熱効率を増すために、反射板10を設置する。第
2図は、加熱ランプの代わりに。
(Embodiment) FIG. 1 shows the structure of an apparatus according to an embodiment of the present invention. ECR, which is an electrodeless discharge, was used for plasma generation. 2.4 into the microwave cavity]- through the waveguide 2.
A 5 GHz microwave is introduced, and plasma is generated by resonance between the magnet 3 and the microwave. Ions in the plasma are guided into the reaction chamber 4 using a divergent magnetic field, and impurities are introduced into the wafer 5. In order to implant impurities into the wafer, an RF bias 7 is applied to the wafer holder 6 to generate a cathode drop voltage of about 1800 V to 11000 V, and the impurities are introduced into the wafer. A lamp 8 is placed above the wafer for heating through a quartz window 9 so as not to come into contact with the plasma. A reflector plate 10 is installed at the back of the heating lamp to increase heating efficiency. Figure 2 shows a replacement for a heat lamp.

ヒーター11で高温に加熱する装置の構造を示す。The structure of a device that heats to a high temperature with a heater 11 is shown.

(発明の効果) 本発明により、深さ0.1〜0.2tffiの間で、濃
度を101′〜1020個/dの間で、所望の濃度と深
さで、制御性良く不純物層を形成できる。
(Effects of the Invention) According to the present invention, an impurity layer is formed with good controllability at a depth of 0.1 to 0.2 tffi and a concentration of 101' to 1020 particles/d at a desired concentration and depth. can.

【図面の簡単な説明】[Brief explanation of drawings]

第]−図、第2図はそれぞれ本発明による実施例のプラ
ズマドーピング装置の構造を示す図である。 1 ・・・マイクロ波キャビティ、 2 ・・・導波管
、 3 ・・・マグネット、 4 ・・・反応室、 5
・・・ウェハー、 6・・・ウェハーホルダー、 7・
・・RFバイアス、 8・・・加熱ランプ、 9 ・・
・石英窓、10・・・反射板、 11 ・・・ ヒータ
ー 第 図 特許出願人 松下電子工業株式会社 第 図 ヒーター
FIG. 2 is a diagram showing the structure of a plasma doping apparatus according to an embodiment of the present invention. 1...Microwave cavity, 2...Waveguide, 3...Magnet, 4...Reaction chamber, 5
...Wafer, 6.Wafer holder, 7.
...RF bias, 8...Heating lamp, 9...
・Quartz window, 10... Reflector, 11... Heater Diagram Patent Applicant Matsushita Electronics Co., Ltd. Diagram Heater

Claims (1)

【特許請求の範囲】[Claims] プラズマを用いて、不純物を半導体基板に導入する装置
で、プラズマ印加中に、半導体基板を800℃ないし1
000℃の温度範囲内で加熱する手段を設けたことを特
徴とするプラズマドーピング装置。
This is a device that introduces impurities into a semiconductor substrate using plasma. During plasma application, the semiconductor substrate is heated to 800°C or 1
A plasma doping apparatus characterized in that it is provided with means for heating within a temperature range of 000°C.
JP9872889A 1989-04-20 1989-04-20 Plasma doping apparatus Pending JPH02278720A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9872889A JPH02278720A (en) 1989-04-20 1989-04-20 Plasma doping apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9872889A JPH02278720A (en) 1989-04-20 1989-04-20 Plasma doping apparatus

Publications (1)

Publication Number Publication Date
JPH02278720A true JPH02278720A (en) 1990-11-15

Family

ID=14227582

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9872889A Pending JPH02278720A (en) 1989-04-20 1989-04-20 Plasma doping apparatus

Country Status (1)

Country Link
JP (1) JPH02278720A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0628213A1 (en) * 1992-02-25 1994-12-14 Ag Associates, Inc. Gas phase doping of semiconductor material in a cold-wall radiantly heated reactor under reduced pressure
US6403410B1 (en) 1999-05-14 2002-06-11 Canon Sales Co., Inc. Plasma doping system and plasma doping method
JP2018056529A (en) * 2016-09-30 2018-04-05 芝浦メカトロニクス株式会社 Substrate processing apparatus
US10088642B2 (en) 2016-11-09 2018-10-02 International Business Machines Corporation Coaxial wire and optical fiber trace via hybrid structures and methods to manufacture
US11018225B2 (en) 2016-06-28 2021-05-25 International Business Machines Corporation III-V extension by high temperature plasma doping

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0628213A1 (en) * 1992-02-25 1994-12-14 Ag Associates, Inc. Gas phase doping of semiconductor material in a cold-wall radiantly heated reactor under reduced pressure
EP0628213A4 (en) * 1992-02-25 1997-02-19 Processing Technology Inc D B Gas phase doping of semiconductor material in a cold-wall radiantly heated reactor under reduced pressure.
US6403410B1 (en) 1999-05-14 2002-06-11 Canon Sales Co., Inc. Plasma doping system and plasma doping method
US11018225B2 (en) 2016-06-28 2021-05-25 International Business Machines Corporation III-V extension by high temperature plasma doping
JP2018056529A (en) * 2016-09-30 2018-04-05 芝浦メカトロニクス株式会社 Substrate processing apparatus
CN107887300A (en) * 2016-09-30 2018-04-06 芝浦机械电子株式会社 Substrate board treatment
KR20180036585A (en) * 2016-09-30 2018-04-09 시바우라 메카트로닉스 가부시끼가이샤 Substrate treatment device
US10460961B2 (en) 2016-09-30 2019-10-29 Shibaura Mechatronics Corporation Substrate processing apparatus
US10088642B2 (en) 2016-11-09 2018-10-02 International Business Machines Corporation Coaxial wire and optical fiber trace via hybrid structures and methods to manufacture
US10613283B2 (en) 2016-11-09 2020-04-07 International Business Machines Corporation Coaxial wire and optical fiber trace via hybrid structures and methods to manufacture
US11016255B2 (en) 2016-11-09 2021-05-25 International Business Machines Corporation Coaxial wire and optical fiber trace via hybrid structures and methods to manufacture
US11092763B2 (en) 2016-11-09 2021-08-17 International Business Machines Corporation Coaxial wire and optical fiber trace via hybrid structures and methods to manufacture

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