JPH0227799U - - Google Patents
Info
- Publication number
- JPH0227799U JPH0227799U JP10558388U JP10558388U JPH0227799U JP H0227799 U JPH0227799 U JP H0227799U JP 10558388 U JP10558388 U JP 10558388U JP 10558388 U JP10558388 U JP 10558388U JP H0227799 U JPH0227799 U JP H0227799U
- Authority
- JP
- Japan
- Prior art keywords
- board
- front panel
- printed circuit
- circuit board
- vme
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000005540 biological transmission Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
Description
第１図はこの考案に係るＶＭＥ規格ボードにお
けるＦＧ処理構造の一実施例を示す図、第２図、
および第３図は、他の実施例を示す図、第４図は
、従来のＶＭＥ規格データ伝送システムにおける
ＶＭＥボードとラツクの構造を示す図、第５図は
、前面パネルの開口部からＦＧ信号を取り出す図
。
１…基板、２…ＦＧ配線、３…基板ホルダー、
４…前面パネル、６…導電シール、７…凹コネク
タ。
FIG. 1 is a diagram showing an example of the FG processing structure in the VME standard board according to this invention, and FIG.
3 shows another embodiment, FIG. 4 shows the structure of the VME board and rack in the conventional VME standard data transmission system, and FIG. 5 shows the FG signal from the opening in the front panel. Figure to take out. 1... Board, 2... FG wiring, 3... Board holder,
4...Front panel, 6...Conductive seal, 7...Concave connector.
Claims (1)
する状態に取り付けられ、且つプリント基板と前
面パネルとが互に電気的に絶縁されているＶＭＥ
規格ボードにおいて、 上記プリント基板の少なくとも１つの前角に、
フレームグランド信号用配線パターンを形成し、
該フレームグランド信号用配線パターン上に導電
性の基板ホルダーの一側面を位置させてプリント
基板に取り付けると共に、基板ホルダーの前面に
前面パネルの背面を取り付けたことを特徴とする
ＶＭＥ規格ボードにおけるＦＧ処理構造。[Claims for Utility Model Registration] A VME in which the leading edge of the printed circuit board and the front panel are installed in a state where they are perpendicular to each other, and the printed circuit board and the front panel are electrically insulated from each other.
In the standard board, on at least one front corner of the printed circuit board,
Form the frame ground signal wiring pattern,
FG processing in a VME standard board characterized in that one side of a conductive board holder is positioned on the wiring pattern for the frame ground signal and attached to the printed board, and the back of the front panel is attached to the front of the board holder. structure.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10558388U JPH0227799U (en) | 1988-08-10 | 1988-08-10 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10558388U JPH0227799U (en) | 1988-08-10 | 1988-08-10 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0227799U true JPH0227799U (en) | 1990-02-22 |
Family
ID=31338328
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10558388U Pending JPH0227799U (en) | 1988-08-10 | 1988-08-10 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0227799U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014064745A1 (en) * | 2012-10-22 | 2014-05-01 | 三菱電機株式会社 | Electronic device and electromagnetic noise control method |
-
1988
- 1988-08-10 JP JP10558388U patent/JPH0227799U/ja active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2014064745A1 (en) * | 2012-10-22 | 2014-05-01 | 三菱電機株式会社 | Electronic device and electromagnetic noise control method |
| JP5881849B2 (en) * | 2012-10-22 | 2016-03-09 | 三菱電機株式会社 | Electronic device and electromagnetic noise countermeasure method |
| EP2911489A4 (en) * | 2012-10-22 | 2016-06-29 | Mitsubishi Electric Corp | Electronic device and electromagnetic noise control method |
| US9655270B2 (en) | 2012-10-22 | 2017-05-16 | Mitsubishi Electric Corporation | Electronic device and electromagnetic noise control method |
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