JPH02277375A - Control circuit for gradation of thermal head - Google Patents

Abstract

PURPOSE:To perform fast print without reducing the number of gradation by controlling a switching device so as to set at an energized state while an output signal exceeds a gradation bit signal after starting the count of a ring counter. CONSTITUTION:Gradation data of three bits is transferred sequentially from first dot data to a shift register 1 synchronizing with a clock signal corresponding to each picture element. The gradation data is transferred to and latched at a latch circuit 2. Meanwhile, the count of constant cycle is inputted to the ring counter 3, and signals of L, M, and H are outputted to a comparator 4. The comparator 4 compares the output (vertical row at left side) of the latch circuit 2 with the output (horizontal row at upper end) of the ring counter 3, and outputs an H level when the output of the latch circuit 2 exceeds that of the ring counter 3. The output of the comparator 4 is impressed on the switching device to drive a heating element.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a gradation control circuit for a thermal head.

[Conventional technology]

FIG. 2 is a configuration diagram of a control circuit of a conventional thermal head capable of Wi-signature printing disclosed in Japanese Patent Laid-Open No. 57-48868.

In the figure, 20a to 20c are heating elements, 23a to 23c are switching elements that drive the heating elements 20a to 20c, 33 is a shift register, and 35 is a latch circuit, and the above constitutes a binary recording circuit 38. . Also,
31 is a reference signal generation circuit, 32 is a data selector, and the above constitutes gradation recording port #134.

In the gradation recording circuit 34, gradation data is sent to the terminal 21.
When the data is input to the data selector 32 via the gradation data, the data selector 32 selects a signal corresponding to the gradation data from among the signals generated by the reference signal generation circuit 31 and outputs it to the shift register 33.

The signal output from the reference signal generation circuit 31 is a signal that is at a high level (hereinafter referred to as H level) only for a specific time, and the time that the signal is maintained at the I level differs depending on the corresponding heating element.

In the binary recording circuit 38, a shift clock signal is applied to the terminal 36 until all the signals input to the shift register 33 become low level (hereinafter referred to as L level).
The data in the shift register 33 is rewritten the same number of times as the number of gradations. When the latch signal is applied to the terminal 37, the latch circuit 35 stores the data of shift 1 to register 33, operates the corresponding switching elements 23a to 23c only when the data is at H level, and operates the corresponding switching elements 23a to 23c.
Electrify a to 20c to generate heat.

In this way, in the above configuration, the operation of selectively driving the heating elements 20a to 20c using the binary image signal is performed as follows.
By repeating each gradation several times for each printing pixel,
It controls the energy transmitted from the heating element to the recording paper to perform gradation printing.

[Problem to be solved by the invention]

However, in the conventional example described above, when printing one pixel, it is necessary to transmit data to the shift register 33 the same number of times as the number of gradations. Therefore, for example, if you try to express 64 gradations with 640 dots and 1 pixel, the printing speed for one line will be (640x64)/(shift clock frequency), and if the shift clock frequency is 4MH2, it will require 10°24m5. It happens. Also, 64
If you try to express 256 tones with 0 dot pixels, it will take 40°96m5. Therefore, it cannot be applied to high-speed printing where the printing time for one line is approximately several ms, and there is a problem in that the number of gradations must be reduced in order to be applied.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object thereof is to provide a gradation control circuit for a thermal head that can realize high-speed printing without reducing the number of gradations.

[Means to solve the problem]

The gradation control circuit for a thermal head of the present invention has a thermal head that has a heating element and performs gradation printing recording on a recording medium by energizing the heating element, in which the thermal head has the same number of gradation bits as the heating element. a shift register that receives a number of gradation bit signals, a latch circuit that holds the gradation bit signal, a ring counter having the same number of bits as the gradation bit number, and a gradation bit signal of the latch circuit and the ring counter. The present invention is characterized by comprising a comparator that compares the output signal of the output signal and outputs a signal based on the result, and a switching element that controls energization of the heating element in accordance with the output of the comparator.

[For production]

In the present invention, the shift register receives the gray scale bit signal of the same number of bits as the gray scale bit number of the heating element, the latch circuit holds the gray scale bit signal from the shift register, and the comparator receives the gray scale bit signal output from the latch circuit. The gradation bit signal and the output signal of the ring counter are compared. Then, for example, control is performed such that the switching element is energized from the time the ring counter starts counting until the output signal exceeds the gradation bit signal. With this kind of control, the length of time that the heating element is energized depends on the gradation bit signal, and the amount of heat generated by the heating element changes depending on this energization time, so it is possible to give the printing a gradation. can.

〔Example〕

The present invention will be explained below based on illustrated embodiments.

FIG. 1 is a block diagram showing an embodiment of a gradation control circuit for a thermal head according to the present invention. In the same figure, ■ is 38
40-bit (6-bit gradation x 640-pixel) shift register, 2 is a 3840-bit latch, 3 is a 6-bit
Ring counter to bit 1, 4 is 6 bit configuration x 640
#fl comparator 5 is 640 sets of switching elements, and with the above configuration, 64 gradations are expressed for 640 pixels.

In the above configuration, gradation data (gradation bit signal) is inputted to the shift register 1 from the data terminal 11, and data in the shift register 1 is sequentially transferred to the latch circuit 2 by a clock signal inputted to the clock terminal 12. Transmit. A signal for storing data in the shift register 1 is input to the latch circuit 2 from the latch terminal 13. Here, for example, after transferring 6 gradation data, during printing, the gradation data of the next line is transferred to the data terminal 11. The data is transmitted to the shift register 1 via the tarlock terminal 12 so that the next line can be printed at the same time as gradation printing is completed. A signal for increasing the count is input to the ring counter 3 from the count terminal 14, and a 6-bit signal is output to the comparator 4. Comparator 4 compares the count value output from ring counter 3 with configuration data in latch circuit 2, and provides signals based on this to switching elements 5a to 5n. When the switching elements 5a to 5n are turned on, the heating elements 5a to 5n are connected to the terminals such as the enable terminal 15.
(n is the number of heating elements) drive power is applied to the heating elements 5a to 5n to generate heat. Note that the ring counter 3 may be configured to receive a reset signal when the power is turned on.

FIGS. 3 to 7 explain the case where the gradation operation of this embodiment is 8 gradations (3-bit data).
3 is a configuration diagram of the gradation control circuit, FIG. 4 is an explanatory diagram of data input to shift register 1, FIG. 5 is an input/output waveform diagram of ring counter 3, and FIG. 6 is an illustration of the output of latch circuit 2. The explanatory diagrams shown in FIGS. 7(a) to 7(C) are waveform diagrams showing the output of the comparator 4.

The details of the operation of the gradation control circuit shown in FIG. 3 will be explained based on the drawings. First, as shown in FIG.
In synchronization with the beam 1 cock signal, 3-bit gradation data is sequentially transferred from the first dot data corresponding to each pixel. This gradation data is then transferred to the latch circuit 2 and held there.

On the other hand, as shown in FIG. 5, a constant cycle count is input to the ring counter 3, and signals having M and N waveforms are output to the comparator 4.

As shown in FIG. 6, the comparator 4 compares the output of the latch circuit 2 (in the leftmost column) with the output of the ring counter 3 (in the uppermost row), and the output of the latch circuit 2 is compared with the output of the ring counter 3 (in the leftmost column). When the output exceeds the output level, an H level (○ in the figure) is output.

The output of this comparator 4 is applied to a switching element that drives a heating element, and as shown in FIGS. For example, gradation level 8 corresponds to gradation level 4.8 cycles, which corresponds to gradation level 1.4 cycles,
It is possible to express 8 gradations.

In this embodiment, the shift register 1 receives a 3-bit gradation bit signal that is the same as the number of gradation bits of the heating element, the latch circuit 2 holds the gradation bit signal from the shift register, and the comparator 4 receives the gradation bit signal from the shift register. The gradation bit signal output from the circuit 2 and the output signal from the ring counter 3 are compared. and,
The switching element is controlled to be energized from the time when the ring counter 3 starts counting until the output signal exceeds the gradation bit signal. With this kind of control, the length of time that the heating element is energized depends on the gradation bit signal, and the amount of heat generated by the heating element changes depending on this energization time, making it possible to have gradations in the printing. can. In this embodiment, the gradation data only needs to be transferred once per pixel, and there is no need to transfer data the same number of times as the number of gradation bits as in the conventional example shown in FIG. High-speed printing is possible even at high speeds.

In addition, if the heating element resistance values of the thermal head are individually coded and written in ROM etc. in advance, the data can be extracted from the ROM and used as part of the 1rM tone data to determine the heating element resistance value of the thermal head. Variations in values can be corrected, and high quality images can also be achieved.

Furthermore, even if the print density of the thermal recording medium is non-linear with respect to the print pulse width, the print pulse width can be freely changed by changing the input signal period of the ring counter, so gradation input is possible. It is possible to print and record faithful gradation to the signal.

The actual data transmission speed in the case of data transmission with a total of 640 dots and 64 gradations (6 bits) is 0.96 m at a frequency of 4 MHz (640 x 6)/4 MHz.
5. Even if the number of gradations is 256 (8 bits), it is 1.28m5
, and the conventional 10.24 m 5.640 dot pixel is 2
When trying to express 56 gradations, high-speed printing can be realized from 40.96 m5.

〔Effect of the invention〕

As explained above, according to the present invention, high-speed gradation printing recording can be realized by comparing the print data of the ring counter and the latch and outputting a signal that enables the switching element to operate. have an effect.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a circuit that can implement an embodiment of the thermal head tone control method according to the present invention, FIG. 2 is a block diagram of a conventional thermal head tone control circuit, and FIG. 3 is a block diagram of the present invention. A configuration diagram when the number of gradations in the embodiment is 3 bits. FIG. 4 is an explanatory diagram of data input to the shift register 1 of FIG. 3. FIG. 5 is an output of the latch circuit li'82 of FIG. 3. FIG. 6 is an input/output waveform diagram of the ring counter 3 in FIG. 3, and FIGS. 7(a) to (c) are waveform diagrams. . DESCRIPTION OF SYMBOLS 1... Shift register, 2... Latch circuit, 3... Ring counter, 4... Comparator, 5... Switching element, 5a to 5n... Heating element. indicates the output of comparator 4.

Claims (1)

[Claims] A thermal head that has a heating element and performs gradation printing recording on a recording medium by energizing the heating element, which generates a gradation bit signal having the same number of gradation bits as the number of gradation bits of the heating element. A shift register that receives the grayscale bit signal, a latch circuit that holds the grayscale bit signal, a ring counter that has the same number of bits as the grayscale bit number, and a grayscale bit signal of the latch circuit and an output signal of the ring counter are compared. A gradation control circuit for a thermal head, comprising: a comparator that outputs a signal based on the result; and a switching element that controls energization of the heating element in accordance with the output of the comparator.