JPH0227721A - Polishing device for semiconductor wafer - Google Patents
Polishing device for semiconductor waferInfo
- Publication number
- JPH0227721A JPH0227721A JP63177472A JP17747288A JPH0227721A JP H0227721 A JPH0227721 A JP H0227721A JP 63177472 A JP63177472 A JP 63177472A JP 17747288 A JP17747288 A JP 17747288A JP H0227721 A JPH0227721 A JP H0227721A
- Authority
- JP
- Japan
- Prior art keywords
- polishing
- flatness
- polishing surface
- semiconductor wafer
- plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005498 polishing Methods 0.000 title claims abstract description 148
- 239000004065 semiconductor Substances 0.000 title claims abstract description 44
- 238000012544 monitoring process Methods 0.000 claims abstract description 16
- 238000007517 polishing process Methods 0.000 claims description 8
- 238000005259 measurement Methods 0.000 abstract description 15
- 238000012545 processing Methods 0.000 abstract description 4
- 235000012431 wafers Nutrition 0.000 description 43
- 230000007547 defect Effects 0.000 description 7
- 238000005516 engineering process Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 230000000052 comparative effect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000004744 fabric Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000012776 electronic material Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000012806 monitoring device Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
- 238000011179 visual inspection Methods 0.000 description 1
Landscapes
- Constituent Portions Of Griding Lathes, Driving, Sensing And Control (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は研磨技術、特に、半導体ウェハの研磨に適用し
て効果のある技術に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a polishing technique, and particularly to a technique that is effective when applied to polishing semiconductor wafers.
半導体ウェハの研磨工程においては、半導体ウェハを研
磨プレートに保持し、そのウェハの被研磨面を研磨定盤
上の研磨クロスと接触させた状態で、研磨定盤を自転さ
せると共に、研磨プレートを研磨定盤に対して自転、公
転させることにより、半導体ウェハの研磨を行っている
。In the semiconductor wafer polishing process, the semiconductor wafer is held on a polishing plate, and the polishing surface of the wafer is brought into contact with the polishing cloth on the polishing plate, and the polishing plate is rotated and the polishing plate is polished. Semiconductor wafers are polished by rotating and revolving around a surface plate.
このウェハの研磨において、ウェハを研磨すべき研磨定
盤の研磨面が平坦でないと、被研磨物であるウェハの被
研磨面の平坦度が確保されなくなる。このことは、ウニ
ハネ良の原因となる上に、ひいてはそのウェハを用いた
フォトレジスト工程における解像不良の原因となったり
することにより、そのウェハを用いて作られる半導体集
積回路装置の製品不良の原因となってしまう。In this wafer polishing, if the polishing surface of the polishing surface plate on which the wafer is to be polished is not flat, the flatness of the polished surface of the wafer, which is the object to be polished, will not be ensured. This may cause defects in the semiconductor integrated circuit devices manufactured using the wafer, as it may cause defects in the wafer and may also cause resolution defects in the photoresist process using the wafer. It becomes the cause.
そこで、従来は、研磨定盤の平坦度を確保するため、研
磨処理の途中で必要に応じであるいは一定のインターバ
ルで研磨定盤を停止させ、3点もしくは多点のストレー
トゲージを手作業で研磨定盤の研磨面に当ててその両者
の隙間の有無に基づいて研磨面の平坦度を測定している
。Therefore, in the past, in order to ensure the flatness of the polishing surface plate, the polishing surface plate was stopped as necessary or at regular intervals during the polishing process, and three-point or multi-point straight gauges were manually polished. The flatness of the polished surface is measured by applying it to the polishing surface of a surface plate and checking the presence or absence of a gap between the two.
なお、半導体ウェハの研磨については、工業調査会、昭
和57年11月15日発行の「電子材料1982年別冊
」P61〜P66に記載されている。Incidentally, polishing of semiconductor wafers is described in "Electronic Materials 1982 Special Volume" published by Kogyo Kenkyukai on November 15, 1982, pages 61 to 66.
しかしながら、本発明者は上記した従来技術には次のよ
うな問題点があることを見い出した。However, the present inventor found that the above-mentioned conventional technology has the following problems.
すなわち、上記従来技術では、手作業で、しかも作業者
の目視により平坦度の測定を行うので、その精度にばら
つきや誤差が生じてしまう。しかも、研磨面の全面につ
いて多点測定を行うことは、能率的にも技術的にも限界
がある。That is, in the above-mentioned conventional technology, the flatness is measured manually and visually by the operator, so that variations and errors occur in the accuracy. Moreover, there are limits to performing multi-point measurements on the entire surface of the polished surface both in terms of efficiency and technology.
また、上記従来技術の場合には、研磨定盤の停止中に平
坦度の測定を行うので、実際の研磨定盤の動的変形量、
さらには研磨面の温度変化による変形量の変動などを正
確に知ることは楊めて困難である。In addition, in the case of the above conventional technology, since the flatness is measured while the polishing surface plate is stopped, the actual amount of dynamic deformation of the polishing surface plate,
Furthermore, it is extremely difficult to accurately know the fluctuations in the amount of deformation due to temperature changes on the polished surface.
したがって、このような不確定要素の多い研磨定盤の平
坦度の測定に基づいて、研磨面の変形などによるウェハ
の平坦度の状態を正確に判断することはなおさら困難で
あり、自ずから限界がある。Therefore, it is even more difficult to accurately judge the state of wafer flatness due to deformation of the polishing surface, etc., based on the measurement of the flatness of the polishing surface plate, which has many uncertainties, and there are inherent limitations. .
その結果、ウェハの平坦度の低下に起因するウニハネ良
、ひいてはそのウェハを用いた半導体集積回路装置の製
品不良を引き起こしてしまうことになる。As a result, the flatness of the wafer is lowered, resulting in defects in the wafer, which in turn leads to product defects in semiconductor integrated circuit devices using the wafer.
本発明の目的は、研磨定盤を停止させたり、手作業に依
存したりする必要なく、研磨加工中の研磨定盤の研磨面
の平坦度を含む面状態を測定することができ、それに基
づいて半導体ウェハの平坦度の向上を図ることのできる
半導体ウェハの研磨技術を提供することにある。An object of the present invention is to be able to measure the surface condition including the flatness of the polishing surface of a polishing surface plate during polishing without having to stop the polishing surface plate or relying on manual work, and based on the measurement. An object of the present invention is to provide a semiconductor wafer polishing technique that can improve the flatness of a semiconductor wafer.
本発明の前記ならびにその他の目的と新規な特徴は、本
明細書の記述および添付図面から明らかになるであろう
。The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.
本願にふいて開示される発明のうち代表的なものの概要
を簡単に説明すれば次の通りである。A brief overview of typical inventions disclosed in this application is as follows.
すなわち、本発明の半導体ウェハの研磨装置は、実際に
研磨加工中の研磨定盤の研磨面の面状態を無接触でモニ
タするモニタ手段を備えたものである。That is, the semiconductor wafer polishing apparatus of the present invention is equipped with a monitoring means for monitoring the surface condition of the polishing surface of the polishing surface plate in a non-contact manner during the actual polishing process.
このモニタ手段としては、うず電流または静電窓lを利
用したセンサを研磨定盤の研磨面の直上に該研磨面と接
触することなく半径方向に配置したものを用いることが
できる。As this monitoring means, a sensor using an eddy current or an electrostatic window 1 can be used, which is arranged in the radial direction directly above the polishing surface of the polishing surface plate without coming into contact with the polishing surface.
また、モニタ手段は、研磨定盤や研磨プレートの研磨条
件を設定する制御装置に接続することができる。Further, the monitoring means can be connected to a control device that sets polishing conditions for the polishing surface plate and polishing plate.
上記した手段によれば、実際に研磨加工中の研磨定盤の
研磨面の平坦度がモニタ手段で測定されるので、手作業
かつ目視によるものに比べて掻めて能率良く、しかも精
度の高い平坦度測定を行うことができる。According to the above-mentioned means, the flatness of the polishing surface of the polishing surface plate during the actual polishing process is measured by the monitor means, so it is more efficient and accurate than manual and visual inspection. Flatness measurements can be made.
その結果、半導体ウェハの研磨条件をモニタ手段の測定
に基づいて容易かつ正確に設定でき、それにより、研磨
される半導体ウェハの平坦度を著しく向上させることが
可能となる。As a result, the polishing conditions for the semiconductor wafer can be easily and accurately set based on the measurements by the monitor means, thereby making it possible to significantly improve the flatness of the semiconductor wafer being polished.
第1図は本発明の一実施例である半導体ウェハの研磨装
置の概略的平面図、第2図はその研磨装置の概略的側面
図である。FIG. 1 is a schematic plan view of a semiconductor wafer polishing apparatus according to an embodiment of the present invention, and FIG. 2 is a schematic side view of the polishing apparatus.
本実施例にふいては、研磨定盤1の研磨面2の上面には
、図示しない研磨クロス(バッド〉が敷設され、研磨定
盤lはその回転駆動手段であるモータ3によって矢印方
向に回転される。In this embodiment, a polishing cloth (not shown) is laid on the upper surface of the polishing surface 2 of the polishing surface plate 1, and the polishing surface plate 1 is rotated in the direction of the arrow by a motor 3, which is its rotational driving means. be done.
この研磨定盤Iにより研磨される半導体ウェハ4は、研
磨プレート5の下面により、図示しない真空吸着手段で
保持される。研磨プレート5は、回転駆動手段としての
モータ6により、研磨定盤lと同じ方向に自転すると共
に、研磨定盤lに対して公転し、半導体ウェハ4を研磨
定盤1の研磨面2に対して接触押圧させて研磨するよう
になっている。The semiconductor wafer 4 polished by the polishing surface plate I is held by the lower surface of the polishing plate 5 by vacuum suction means (not shown). The polishing plate 5 is rotated in the same direction as the polishing surface plate 1 by a motor 6 serving as a rotational drive means, and also revolves around the polishing surface plate 1, so that the semiconductor wafer 4 is moved against the polishing surface 2 of the polishing surface plate 1. It is designed to polish by contacting and pressing it.
本実施例の研磨定盤1の研磨面2の直上には、該研磨定
盤1の半径方向に平坦度測定用のセンサ7 (モニタ手
段)が配置されている。すなわち、このセンサ7は研磨
面2とは無接触ないし非接触で、その面状態の1つを表
す平坦度を略半径方向全体について測定するものである
。Directly above the polishing surface 2 of the polishing surface plate 1 of this embodiment, a sensor 7 (monitoring means) for flatness measurement is arranged in the radial direction of the polishing surface plate 1. That is, this sensor 7 measures the flatness, which represents one of the surface conditions, approximately in the entire radial direction without contacting the polished surface 2 or in a non-contact manner.
このセンサ7は、たとえばうず電流を利用し、研磨面2
の研磨加工中における変形量を測定することによって該
研磨面2の平坦度を略半径方向全体について測定するこ
とができる。This sensor 7 uses, for example, eddy current to
By measuring the amount of deformation during the polishing process, the flatness of the polished surface 2 can be measured in substantially the entire radial direction.
また、センサ7は静電容量を利用して研磨加工中の研磨
面2の変形量を測定するものとして構成することもでき
る。The sensor 7 can also be configured to measure the amount of deformation of the polishing surface 2 during polishing using capacitance.
前記センサ7は平坦度モニタ装置8 (モニタ手段)に
接続され、両者はモニタ手段を構成している。平坦度モ
ニタ装置8は、センサ7で測定された研磨面2の平坦度
を、たとえば研磨面2の等高線8as研磨面2の縦断面
形状8b、および研磨面2の基準平面からのずれ量を表
す測定値8Cの形式でモニタすることができるよう構成
されている。The sensor 7 is connected to a flatness monitor device 8 (monitor means), and both constitute the monitor means. The flatness monitor device 8 indicates the flatness of the polishing surface 2 measured by the sensor 7, for example, a contour line 8as of the polishing surface 2, a vertical cross-sectional shape 8b of the polishing surface 2, and a deviation amount of the polishing surface 2 from a reference plane. It is configured so that it can be monitored in the form of a measured value of 8C.
平坦度モニタ装置8は制御装置9に接続されている。制
御装置9は、センサ7および平坦度モニタ装置8からの
経時的な平坦度測定結果に基づいて所要の演算処理など
を行い、研磨面2の最適な研磨条件を経時的に設定する
ことができる。The flatness monitor device 8 is connected to a control device 9. The control device 9 performs necessary arithmetic processing based on the flatness measurement results over time from the sensor 7 and the flatness monitor device 8, and can set the optimal polishing conditions for the polishing surface 2 over time. .
また、この制御装置9は前記モータ3および6に接続さ
れており、該モータ3および6を前記の最適な研磨条件
に従って制御することができる。Further, this control device 9 is connected to the motors 3 and 6, and can control the motors 3 and 6 according to the optimum polishing conditions described above.
次に、本実施例の作用について説明する。Next, the operation of this embodiment will be explained.
まず、単結晶引上げされたインゴットからスライスさた
後、ランピングおよびエツチングにより面処理されたシ
リコン(Si)などの半導体ウェハ4を研磨プレート5
に真空吸着で保持する。First, a semiconductor wafer 4 such as silicon (Si), which has been sliced from a single-crystal pulled ingot and surface-treated by ramping and etching, is placed on a polishing plate 5.
Hold by vacuum suction.
そして、半導体ウェハ4の被研磨面が研磨定盤1の研磨
面2の方に面するよう研磨プレート5の姿勢を制御し、
研磨プレート5をモータ6で回転駆動しながら下降させ
て、半導体ウェハ4の被研磨面を同じく回転中の研磨定
盤1の研磨面2における研磨クロス(パッド)の上に接
触押圧する。Then, the attitude of the polishing plate 5 is controlled so that the surface to be polished of the semiconductor wafer 4 faces the polishing surface 2 of the polishing surface plate 1,
The polishing plate 5 is lowered while being rotationally driven by the motor 6, and the surface to be polished of the semiconductor wafer 4 is brought into contact with and pressed onto the polishing cloth (pad) on the polishing surface 2 of the polishing surface plate 1 which is also rotating.
そして、研磨定盤1および研磨プレート5を所要の回転
速度で回転(自転)させながら、研磨プレート5を研磨
定盤lに対して公転させることにより、半導体ウェハ4
の被@磨面ば研磨定盤1の研磨面2によって研磨される
。Then, by rotating the polishing plate 1 and the polishing plate 5 at a predetermined rotational speed and revolving the polishing plate 5 with respect to the polishing plate l, the semiconductor wafer 4 is
The surface to be polished is polished by the polishing surface 2 of the polishing surface plate 1.
この研磨工程において、研磨定盤lの研磨面2は何らか
の原因で経時的にその平坦度が変化し、その面位置によ
って変形量が変わることにより、平坦面ではなくなる。In this polishing process, the flatness of the polishing surface 2 of the polishing surface plate 1 changes over time for some reason, and the amount of deformation changes depending on the position of the surface, so that it is no longer a flat surface.
このような研磨面2の平坦度不良は半導体ウェハ4の被
研磨面の平坦度不良を起こし、ひいては半導体集積回路
装置の製品不良を引き起こす原因の1つとなる。Such poor flatness of the polishing surface 2 causes poor flatness of the polished surface of the semiconductor wafer 4, and is one of the causes of product defects in semiconductor integrated circuit devices.
そこで、本実施例では、研磨定盤1の研磨面2の真上に
非接触で半径方向に配置したセンサ7により、うず電流
または静電容量を利用して、研磨加工中における研磨面
2の平坦度を略半径方向全体について経時的に測定する
。Therefore, in this embodiment, the sensor 7, which is arranged in a non-contact radial direction directly above the polishing surface 2 of the polishing surface plate 1, uses eddy current or capacitance to control the polishing surface 2 during polishing. Flatness is measured over time in substantially the entire radial direction.
その平坦度測定結果はセンサ7から平坦度モニタ装rI
t8に送られ、研磨面2の等高線8as縦断面形状3b
、および基準平面からのずれ量を表す測定値8Cの形式
でモニタされる。The flatness measurement result is sent to the flatness monitor rI from the sensor 7.
Contour line 8as vertical cross-sectional shape 3b of polishing surface 2
, and a measured value 8C representing the amount of deviation from the reference plane.
また、平坦度モニタ装置8は平坦度測定結果を制御装置
9に送る。制御装置9は、センサ7および平坦度モニタ
装置8からの経時的な平坦度測定結果に基づいて所要の
演算処理などの処理を実行し、研磨定盤lの研磨面2の
だめの最適な研磨条件を経時的に設定する。Further, the flatness monitor device 8 sends the flatness measurement results to the control device 9. The control device 9 executes processing such as necessary calculation processing based on the flatness measurement results over time from the sensor 7 and the flatness monitor device 8, and determines the optimum polishing conditions for the polishing surface 2 of the polishing surface plate l. set over time.
そして、制御装置9は、設定された最適な研磨条件に従
ってモータ3および6などを制御し、半導体ウェハ4の
研磨を最適な研磨条件で研磨加工を自動的に継続実行す
ることができる。Then, the control device 9 can control the motors 3, 6, etc. according to the set optimal polishing conditions, and automatically continue polishing the semiconductor wafer 4 under the optimal polishing conditions.
それにより、半導体ウェハ4の被研磨面の平坦度を含む
寸法精度は向上し、また研磨定盤1の研磨面2と半導体
ウェハ4の被研磨面とのならいが良くなるので、研磨ス
ピードが速くなり、研磨能率が向上する。As a result, the dimensional accuracy including the flatness of the surface to be polished of the semiconductor wafer 4 is improved, and the polishing surface 2 of the polishing surface plate 1 and the surface to be polished of the semiconductor wafer 4 are better aligned, so that the polishing speed is increased. This improves polishing efficiency.
本発明による半導体ウェハの寸法精度(平坦度を含む)
と研磨能率を、手作業で作業者の目視により停止中の半
導体ウェハの平坦度を測定する場合(比較例)と本発明
者が比較実験した結果を第この第1表から明らかなよう
に、本発明の場合には、比較例に比べて半導体ウェハの
寸法精度(平坦度を含む)も研磨能率も大幅に向上した
。Dimensional accuracy (including flatness) of semiconductor wafers according to the present invention
As is clear from Table 1, the results of the inventor's comparative experiment on the flatness of a stopped semiconductor wafer (comparative example) are as follows: In the case of the present invention, the dimensional accuracy (including flatness) and polishing efficiency of the semiconductor wafer were significantly improved compared to the comparative example.
以上本発明者によってなされた発明を実施例に基づき具
体的に説明したが、本発明は前記実施例に限定されるも
のではなく、その要旨を逸脱しない範囲で種々変更可能
であることはいうまでもない。Although the invention made by the present inventor has been specifically explained above based on Examples, it goes without saying that the present invention is not limited to the Examples and can be modified in various ways without departing from the gist thereof. Nor.
たとえば、センサ7はうず電流また静電容量以外のもの
を利用して研磨定盤1の研磨面2の面状態を無接触で測
定するものであってもよい。For example, the sensor 7 may measure the surface condition of the polishing surface 2 of the polishing surface plate 1 without contact using something other than eddy current or capacitance.
また、平坦度モニタ装置8や制御装置9の構成および機
能、制御対象や制御方式なども実施例以外のものとする
こともできる。Furthermore, the configurations and functions, controlled objects, control methods, etc. of the flatness monitor device 8 and the control device 9 may also be other than those in the embodiments.
以上の説明では主として本発明者によってなされた発明
をその利用分野であるンリコン半導体ウェハの研磨に適
用した場合について説明したが、これに限定されるもの
ではなく、たとえば、ガリウム・ヒ素(G a A s
)などのシリコン以外の半導体材料よりなるウェハな
どにも適用できる。In the above explanation, the invention made by the present inventor was mainly applied to the field of application, which is the polishing of silicon semiconductor wafers, but the invention is not limited to this. s
) can also be applied to wafers made of semiconductor materials other than silicon.
本願において開示される発明のうち代表的なものによっ
て得られる効果を簡単に説明すれば、下記の通りである
。A brief explanation of the effects obtained by typical inventions disclosed in this application is as follows.
〔1)、半導体ウェハを研磨プレートに保持し、回転可
能な研磨定盤上で回転させて研磨する装置であって、研
磨加工中の前記研磨定盤の研磨面の面状態を無接触でモ
ニタするモニタ手段を備えたことにより、研磨定盤を停
止させたり、手作業や作業者の目視の判断に依存したり
することなく、研磨定盤の実際の研磨加工中における平
坦度を測定することができ、半導体ウェハの寸法精度を
著しく向上させることができる。[1) A device that holds a semiconductor wafer on a polishing plate and polishes it by rotating it on a rotatable polishing surface plate, which monitors the surface condition of the polishing surface of the polishing surface plate during polishing without contact. By being equipped with a monitoring means, it is possible to measure the flatness of the polishing surface plate during the actual polishing process without having to stop the polishing surface plate or relying on manual work or visual judgment by the operator. The dimensional accuracy of semiconductor wafers can be significantly improved.
(2)6前記(1)により、その半導体ウェハを用いて
製造される半導体集積回路11iI!の製品不良の発生
を未然に防止できる。(2)6 Semiconductor integrated circuit 11iI manufactured using the semiconductor wafer according to (1) above! It is possible to prevent the occurrence of product defects.
(3)、前記(1)により、研磨定盤の研磨面と半導体
ウェハの被研磨面とのならいが良くなるので、また平坦
度測定のために研磨定盤を停止させる必要がないので、
研磨能率を大幅に向上させることができる。(3) Due to (1) above, the polishing surface of the polishing surface plate and the surface to be polished of the semiconductor wafer are better aligned, and there is no need to stop the polishing surface plate for flatness measurement.
Polishing efficiency can be significantly improved.
(4)、平坦度の測定は研磨定盤の研磨面とは非接触で
行われるので、測定により研磨面の平坦度が損なわれる
ことはない。(4) Since the flatness measurement is performed without contacting the polishing surface of the polishing surface plate, the flatness of the polishing surface is not impaired by the measurement.
(5)、モニタ手段が、研磨定盤および研磨プレートな
どの研磨条件を設定する制御装置に接続されていること
により、モニタ手段による測定結果に基づいて、研磨定
盤や研磨プレートなどを自動的に最適研磨条件で制御し
、最適な研磨を自動的に行うことができる。(5) The monitoring means is connected to a control device that sets polishing conditions for the polishing surface plate, polishing plate, etc., so that the polishing surface plate, polishing plate, etc. can be automatically adjusted based on the measurement results by the monitoring means. It is possible to automatically perform optimal polishing by controlling the optimal polishing conditions.
it図は本発明の一実施例である半導体ウェハの研磨装
置の概略的平面図、
第2図はその研磨装置の概略的側面図である。
1・・・研磨定盤、2・・・研磨面、3・・・モータ、
4・・・半導体ウェハ、5・・・研磨プレート、6・・
・モータ、7・・・センサ(モニタ手段)、8・・・平
坦度モニタ装置(モニタ手段)、8a・・・等高線、8
b・・・縦断面形状、8C・・・測定値、9・・・制御
装置。
代 理 人 弁理士 筒 井 大 和
第
図
第
図FIG. 2 is a schematic plan view of a semiconductor wafer polishing apparatus according to an embodiment of the present invention, and FIG. 2 is a schematic side view of the polishing apparatus. 1... Polishing surface plate, 2... Polishing surface, 3... Motor,
4... Semiconductor wafer, 5... Polishing plate, 6...
- Motor, 7... Sensor (monitoring means), 8... Flatness monitoring device (monitoring means), 8a... Contour line, 8
b... Vertical cross-sectional shape, 8C... Measured value, 9... Control device. Agent Patent Attorney Daiwa Tsutsui Diagram
Claims (1)
研磨定盤上で回転させて研磨する装置であって、研磨加
工中の前記研磨定盤の研磨面の面状態を無接触でモニタ
するモニタ手段を備えたことを特徴とする半導体ウェハ
の研磨装置。 2、前記モニタ手段は、前記研磨定盤の研磨面の直上に
半径方向に配置され、うず電流を利用して該研磨面の平
坦度を測定するセンサを有していることを特徴とする請
求項1記載の半導体ウェハの研磨装置。 3、前記モニタ手段は、半導体ウェハの研磨面の直上に
半径方向に配置され、静電容量を利用して該研磨面の平
坦度を測定するセンサを有していることを特徴とする請
求項1記載の半導体ウェハの研磨装置。 4、前記モニタ手段が、前記研磨定盤および研磨プレー
トの研磨条件を設定する制御装置に接続されていること
を特徴とする請求項1、2、または3のいずれかに記載
の半導体ウェハの研磨装置。[Scope of Claims] 1. An apparatus for polishing a semiconductor wafer by holding it on a polishing plate and rotating it on a rotatable polishing surface plate, which is capable of controlling the surface condition of the polishing surface of the polishing surface plate during the polishing process. A semiconductor wafer polishing apparatus characterized by being equipped with a monitoring means for contactless monitoring. 2. A claim characterized in that the monitoring means includes a sensor that is disposed in the radial direction directly above the polishing surface of the polishing surface plate and measures the flatness of the polishing surface using eddy current. Item 1. The semiconductor wafer polishing apparatus according to item 1. 3. The above-mentioned monitoring means is characterized in that it has a sensor arranged in the radial direction directly above the polished surface of the semiconductor wafer and measures the flatness of the polished surface using electrostatic capacitance. 1. The semiconductor wafer polishing apparatus according to 1. 4. The semiconductor wafer polishing according to claim 1, wherein the monitoring means is connected to a control device that sets polishing conditions for the polishing surface plate and the polishing plate. Device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63177472A JPH0227721A (en) | 1988-07-15 | 1988-07-15 | Polishing device for semiconductor wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP63177472A JPH0227721A (en) | 1988-07-15 | 1988-07-15 | Polishing device for semiconductor wafer |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0227721A true JPH0227721A (en) | 1990-01-30 |
Family
ID=16031515
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP63177472A Pending JPH0227721A (en) | 1988-07-15 | 1988-07-15 | Polishing device for semiconductor wafer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0227721A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0687526A1 (en) * | 1994-04-18 | 1995-12-20 | Shin-Etsu Handotai Company Limited | Polishing method and apparatus for automatic reduction of wafer taper in single-wafer polishing |
JPH0985620A (en) * | 1995-09-28 | 1997-03-31 | Toshiba Mach Co Ltd | Polishing device |
JP2008030172A (en) * | 2006-07-31 | 2008-02-14 | Nagase Integrex Co Ltd | Grinding machine and grinding method |
-
1988
- 1988-07-15 JP JP63177472A patent/JPH0227721A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0687526A1 (en) * | 1994-04-18 | 1995-12-20 | Shin-Etsu Handotai Company Limited | Polishing method and apparatus for automatic reduction of wafer taper in single-wafer polishing |
US5620357A (en) * | 1994-04-18 | 1997-04-15 | Shin-Etsu Handotai Co., Ltd. | Polishing method and apparatus for automatic reduction of wafer taper in single-wafer polishing |
JPH0985620A (en) * | 1995-09-28 | 1997-03-31 | Toshiba Mach Co Ltd | Polishing device |
JP2008030172A (en) * | 2006-07-31 | 2008-02-14 | Nagase Integrex Co Ltd | Grinding machine and grinding method |
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