JPH02276072A - Digital signal transmission equipment - Google Patents

Abstract

PURPOSE:To dequately detect a synchronizing signal and a recognition signal at the time of high-speed searching for a digital VTR and searching for an index by reducing the baud rate of synchronizing signal/recognition signal part of a digital transmission signal obtained on the output side of a precoder by 1/2 of an information signal part. CONSTITUTION:The baud rate of a synchronizing signal/recognition signal part 2S of a ditigal transmission signal yi obtained on the output side of a precoder 3 is reduced by 1/2 of an information signal part 2D. Consequently at the time of high-speed searching and index searching, even when a spacing loss is generated, the reduction of the reproducing level of the synchronizing signal/recognition signal part 2S can be suppressed. Thus even at the time of the high speed-searching for the digital VTR and index searching, synchronizing signal and the recognition signal can be satisfactorily detected, and the high-speed searching and the index searching can be satisfactorily executed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital signal transmission device suitable for use in, for example, a digital video tape recorder (hereinafter referred to as digital VTR).

[Summary of the invention]

The present invention relates to a digital signal transmission device suitable for use in, for example, a digital VTR, which digitally converts a transmission signal consisting of an information signal section, a synchronization signal, and a recognition signal section, and supplies the digitally converted digital transmission signal to a precoder. In a digital signal transmission device that performs channel coding and performs partial response detection on this channel-coded digital transmission signal, the baud rate of the synchronization signal and recognition signal portion of the digital transmission signal obtained at the output side of the precoder is By setting the information signal section 172, for example, a digital VT
The synchronization signal and recognition signal can be detected satisfactorily even during a high-speed search of R, an index search, etc.

[Conventional technology]

Generally, in digital VTR, digital ('1" or "
If the data string (0") is recorded as is, the following problem will occur.

■ The highest frequency of the recorded signal may become too high and the recorded signal may not be readable.

■ The recorded signal may have a large amount of DC components and low frequency components, and in this case, if recording and playback is performed via a low retransistor, the reproduced signal will be distorted, and the reproduced data may differ significantly from the recorded data. There is.

■ When recording digital data, a data string including a clock component is often recorded using the so-called self-clock method, but if there is a long series of 1's or 0's, the error in clock extraction on the playback side will increase. There are cases.

In order to solve these problems, digital VTRs channel code digital recording signals (recording encoding) to convert them into digital recording signals with predetermined frequency characteristics, and then use this digital recording signal for low retransmission and recording. A signal is recorded on a magnetic tape via a head and read out from the magnetic tape via a playback head and a low retransistor, and the signal is supplied to a decoder having characteristics corresponding to inverse conversion of the channel coding, and the digital recorded signal is reproduced. I try to do that. Partial response (PR), which actively utilizes code amount interference in digital recording, is used as a channel coding method.
The method is known.

Conventionally, a digital VTR as shown in FIG. 3 based on this PR (1, O, -1) has been proposed (Japanese Patent Application Laid-Open No. 1983-1999).
See Publication No. 58121 and Japanese Unexamined Patent Publication No. 59-54011. ).

In this Figure 3, (IR) indicates the recording system of this digital VTR, (IP) indicates the reproduction system of this digital VTR, and (2) indicates the information signal section such as video signal, audio signal, synchronization signal, etc. This shows a digital recording signal input terminal to which a digital recording signal obtained by digitally converting the recording signal consisting of a recognition signal section is supplied, and a signal as shown in FIG. 4A and B is supplied to this digital recording signal input terminal (2). The digital recording signal (2a) of NRZ is input to I-N RZ-1 (In
The signal is supplied to a precoder (3) that performs channel coding on a terleaved NRZ-1) digital recording signal. This I-NRZ-I method precoder (3)
is PR(1,0,-
1) PR(1, O,
-1) This is an encoder, and this I-NRZ-I type precoder (3) has a mod 2 adder consisting of an exclusive OR circuit (3a) and two 1-bit delays each as shown in It is composed of a delay circuit (3b) and a series circuit (3C) having a delay time.

This digital recording signal input terminal (2) is connected to Fig. 4 A and B.
When a digital recording signal (2a) as shown in FIG. 4 is supplied, an I-NRZ-I digital recording signal (3d) as shown in FIG. 4C is obtained at the output side of the precoder (3). A digital recording signal (3d) obtained at the output side of this precoder (3) is recorded on a magnetic tape (7) via a recording amplifier circuit (4), a rotary transformer (5), and a recording head (6). Also, this magnetic tape (7
) to the output terminal (12) via the rotor IJ) lance (9), regenerative amplifier circuit (10), and partial response type PR (1,1) decoder (11). ).

Here, the PR (1, 1) decoder (11) converts the human data "00100..." into roolloo...
”.

In this case, the low retransistor (5), the recording head (6)
, a magnetic tape (7), a reproducing head (8), and a low retransmission line (9) constitute a PR (1, -1) transmission line of the partial response system. This PR(1,-1) transmission line (13) and PR(1,1)
A PR (1, 0, -1) transmission path is configured from the decoder (11), and this output terminal (12) is connected to the precoder (3).
I-NRZ-I digital recording signal (3d) channel-coded digital recording signal input terminal (
The digital recording signal (2a) supplied in step 2) is obtained.

The frequency characteristics of the signal obtained by recording and reproducing the digital recording signal (3d) of this I-NRZ-I method have few high frequency components, no direct current component, and crosstalk caused by the longer recording wavelength. There are also benefits with little impact from low retransmission.

[Problem to be solved by the invention]

In such a digital VTR, when the magnetic tape (7) is fast-forwarded at a higher speed than during normal playback in a playback mode such as high-speed search or index search, a drop in the level of the playback signal occurs due to spacing loss. For example 30M
When data recorded in BPS is searched at a high speed of 300 times, the reproduction level decreases by about 3 dB compared to normal reproduction.

For this reason, during high-speed search and index search, the error rate increases and the synchronization signal and recognition signal cannot be detected.
There was an inconvenience that good high-speed search and index search were not possible.

In view of this point, the present invention has an object to enable a synchronization signal and a recognition signal to be detected well even during a high-speed search and index search of a digital VTR as described above, thereby enabling a good high-speed search and index search. purpose.

[Means to solve the problem]

The digital signal transmission device of the present invention digitally converts a transmission signal consisting of an information signal section (2D), a synchronization signal and a recognition signal section (2S) as shown in FIGS. 1 and 2, and transmits the digitally converted signal. The signal (2a) is supplied to a precoder (3) for channel coding, and the channel coded digital transmission signal (y
In a digital signal transmission device designed to detect a partial response of l), the synchronization signal of the digital transmission signal (yi) obtained at the output side of this precoder (3) and the baud rate of the recognition signal section (2S) are used as an information signal. 172 of part (2D).

[Effect]

According to the present invention, the baud rate of the synchronization signal and recognition signal section (2S) is set to 172, so even if a spacing loss occurs during high-speed search or index search, the reproduction level of the synchronization signal and recognition signal section (2S) It is possible to suppress the decrease in search results and perform good high-speed searches and index searches.

〔Example〕

An embodiment of the digital signal transmission apparatus of the present invention will be described below with reference to FIGS. 1 and 2.

In FIGS. 1 and 2, parts corresponding to those in FIGS. 3 and 4 are designated by the same reference numerals, and detailed explanation thereof will be omitted.

The example in FIG. 1 shows an example in which the present invention is applied to a digital VTR.
A digital recording signal (2a) obtained by digitally converting a recording signal consisting of an information signal section (2D) such as a video signal, an audio signal, etc., and a synchronization signal and recognition signal section (2S) as shown in FIG. 2A, which is supplied to the the first of the switch circuit (14)
Supplied to the input terminal of In this case, the synchronization signal and recognition signal section (2S) has an 8-byte, 64-bit configuration in this example. In FIGS. 2B to 2G, for convenience of explanation, the vicinity of the synchronization signal and recognition signal section (2S) is shown enlarged in accordance with the enlargement of the clock in FIG. 2B.

Further, the output signal xi of this switch circuit (14) is supplied to one input terminal of the exclusive OR circuit (3a) constituting the precoder (3).
) is supplied to the recording amplifier circuit (4), and this output signal yl is supplied to this exclusive circuit via two series delay circuits (3b) and (3C) each having a delay time of 1 bit. It is supplied to the other input terminal of the OR circuit (3a), and in this example, the output signal of this delay circuit (3C) is supplied to the second input terminal of the switch circuit (14). Further, (15) indicates a synchronization signal and recognition signal generation circuit, and the synchronization signal and recognition signal from this synchronization signal and recognition signal generation circuit (15) are supplied to the third input terminal of this switch circuit (14). do. In this example, the baud rate of the synchronization signal and recognition signal from the synchronization signal and recognition signal generation circuit (15) is recorded as a digital recording signal (2a).
The baud rate is set to 1/2 of the baud rate. (16), (17)
The dot 18) indicates the switching signal input terminal of this switch circuit (14), and the secondary switching signal input terminal (16),
(17) and (18) are shown in Figure 2 E, F and G.
The switching signals (16a), (17a) and (1
8a) is provided. That is, when the switching signal (16a) supplied to the switching signal input terminal (16) is at high level "1", the digital recording signal input terminal (16)
2) is output as the output signal X1, and when this switching signal (16a) is at low level '0', this digital recording signal (2a) is not output.In this example, The period from 2 bits before this synchronization signal and recognition signal section (2S) to the period other than between this synchronization signal and recognition signal section (2S) is this digital recording signal (2S).
a) and this is referred to as the information signal section (2D). In addition, the switching signal (17a) supplied to the switching signal input terminal (17)
) is a high level “1” during the 2 bits before the synchronization signal and recognition signal section (2S), and the rest is a low level “o”
Therefore, this switch circuit (14) passes through this synchronization signal and the output signal of the delay circuits (3d) and (3c) for 2 bits between 2 bits before the recognition signal section (2S), and outputs the output signal from the switch circuit (14). ), and the switching signal (1
8a) is at a high level "1" between this synchronization signal and the recognition signal section (2S), and the other is at a hello level "0", so between this synchronization signal and recognition signal section (2S), the synchronization signal and recognition signal generation circuit The synchronization signal and recognition signal from (15) are converted to the output signal xi of this switch circuit (14).
It is said that Therefore, the input signal x of this precoder (3)
The initial relationship between i and the output signal y1 is x-2=y xOoXll X2=Xs--X82=X63. Therefore, the output signal y1 of the precoder (3) near the synchronization signal and recognition signal section (2S) is y-2='l
-<■X-2=y-4■y-4=Qy-1=y-3■X
-1=y-3■y-3=Oyo=y-2■xo=x.

Y+=Y-+■XI=X1=Xo=y.

'J2 ='lo■x2 y3=y1 ■X3=yo■X2'''y2y2.I=X
o ■X2 ■x4 ■・・・・■X2m'/ 211
+l ” y21R Y62= Xs exz ■x4 ■・・・・■x
6□y63=Vs2, and the digital recording signal yi obtained at the output side of this precoder (3) is a synchronization signal and a recognition signal section (2S
) is the 172 signal of the information signal section (2D). Also, this precoder (3) is I
- This is a PR(1,O,-1) encoder that corresponds to the inverse transformation of the PR(LO,-1) transmission line based on the partial response in the NRZ-I system precoder.

Therefore, when a digital recording signal as shown in FIGS. 4A and 4B is obtained as the output signal X1 (FIG. 2C) of this switch circuit (14), the output side of this precoder (3) is A digital recording signal of the I-NRZ-I system as shown in FIG. 2D) is obtained. This precoder (3)
The digital recording signal yl obtained at the output side of is recorded on a magnetic tape (7) via a recording amplifier circuit (4), a rotor IJ lance (5), and a recording head (6). In addition, the digital reproduction signal reproduced from this magnetic tape (7) by the reproduction head (8) is transferred to the rotor IJ) lance (
9) The signal is supplied to the output terminal (12) via the regenerative amplifier circuit (10) and the partial response PR (1,1) decoder (11). In this case, as in Fig. 3, the transmission line (13) consisting of the rotary transformer (5), recording head (6), magnetic tape (7), playback head (8) and low retransmission (9) is of the partial response type. Configure a PR(1,-1) transmission path, and this PR(
1, -1) transmission line (13) and PR (1, 1> decoder (11)), a PR (1, 0, -1) transmission line is configured, and this output terminal (12) has a precoder (3). By I
Signal X as shown in FIG. 2C is obtained by channel coding the digital recording signal y1 of -NRZ-■! is obtained.

The frequency characteristics obtained by recording and reproducing the digital recording signal y1 of this I-NRZ-I method have few high frequency components and no DC components, and also have crosstalk and low noise caused by the longer recording wavelength. There are also benefits with little impact from transformers.

Further, according to this example, the synchronization signal of this digital recording signal yl and the baud rate of the recognition signal section (2S) are changed to the information signal section (2S).
Since the baud rate is set to 172, which is the same as the baud rate of 2D), even if a spacing loss occurs during high-speed search or index search, it is possible to suppress a decrease in the playback level of the synchronization signal and recognition signal section (2S). Since it can be detected well, it is possible to perform a good high-speed search and index search. Also, according to the above example, the baud rate of the synchronization signal and recognition signal section (2S) is reduced to 1/
2, a switch circuit (
14), it has the advantage that it can be carried out satisfactorily with a simple configuration.

In the above-mentioned embodiment, an example in which the present invention is applied to a digital VTR has been described, but it goes without saying that the present invention can be applied to other digital signal transmission devices. Further, the present invention is not limited to the above-described embodiments, and it goes without saying that various other configurations can be adopted without departing from the gist of the present invention.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the digital signal transmission device of the present invention, FIGS. 2 and 4 are diagrams for explaining the present invention, and FIG. 3 is a block diagram showing an example of a digital VTR. be. (2) is a digital recording signal input terminal, (3) is a precoder, (11) is a PR (1, 1) decoder, (12)
) is the output terminal, (13) is the PR (L -1) transmission line,
(14) is a switch circuit, and (15) is a synchronization signal and recognition signal generation circuit. [Effects of the Invention] According to the present invention, synchronization signals and recognition signals can be detected well even during high-speed searches and index searches of digital VTRs, and there is an advantage that excellent high-speed searches and index searches can be performed.

Claims (1)

[Claims] A transmission signal comprising an information signal section, a synchronization signal, and a recognition signal section is digitally converted, the digitally converted digital transmission signal is supplied to a precoder for channel coding, and the channel-coded digital transmission is performed. In a digital signal transmission device in which a signal is subjected to partial response detection, the baud rate of the synchronization signal and recognition signal section of the digital transmission signal obtained at the output side of the precoder is set to 1/2 of the information signal section. A digital signal transmission device characterized by: