JPH02273955A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH02273955A JPH02273955A JP1096111A JP9611189A JPH02273955A JP H02273955 A JPH02273955 A JP H02273955A JP 1096111 A JP1096111 A JP 1096111A JP 9611189 A JP9611189 A JP 9611189A JP H02273955 A JPH02273955 A JP H02273955A
- Authority
- JP
- Japan
- Prior art keywords
- adhesive tape
- semiconductor
- semiconductor wafer
- tape
- wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 104
- 238000004519 manufacturing process Methods 0.000 title description 16
- 239000002390 adhesive tape Substances 0.000 claims abstract description 50
- 238000005520 cutting process Methods 0.000 claims abstract description 19
- 239000000853 adhesive Substances 0.000 claims abstract description 17
- 230000001070 adhesive effect Effects 0.000 claims abstract description 17
- 238000010438 heat treatment Methods 0.000 claims abstract description 16
- 239000000463 material Substances 0.000 claims abstract description 16
- 229920001169 thermoplastic Polymers 0.000 claims abstract description 14
- 239000004416 thermosoftening plastic Substances 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 abstract description 13
- 235000012431 wafers Nutrition 0.000 description 61
- 239000012634 fragment Substances 0.000 description 13
- 239000007788 liquid Substances 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000007787 solid Substances 0.000 description 2
- VVQNEPGJFQJSBK-UHFFFAOYSA-N Methyl methacrylate Chemical compound COC(=O)C(C)=C VVQNEPGJFQJSBK-UHFFFAOYSA-N 0.000 description 1
- 239000004698 Polyethylene Substances 0.000 description 1
- 239000003522 acrylic cement Substances 0.000 description 1
- 230000003749 cleanliness Effects 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000020169 heat generation Effects 0.000 description 1
- -1 polyethylene Polymers 0.000 description 1
- 229920000573 polyethylene Polymers 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000035939 shock Effects 0.000 description 1
- 239000011343 solid material Substances 0.000 description 1
- 229910001220 stainless steel Inorganic materials 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68318—Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
- H01L2221/68322—Auxiliary support including means facilitating the selective separation of some of a plurality of devices from the auxiliary support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Dicing (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
【発明の詳細な説明】
〔概 要〕
半導体装置の製造方法に関し、
半導体ウェーハの微小破砕片により半導体チップ表面の
配線パターンの短絡を防止可能な半導体装置の製造方法
の提供を目的とし、
加熱により粘着性のでる熱可塑性粘着材を可撓性のテー
プの片面に塗布して形成し・た粘着テープを加熱し、半
導体ウェーハを前記熱可塑性粘着材を介して粘着テープ
に貼着する工程と、前記半導体ウェーハ表面から切り込
んで、該半導体ウェーハに形成された半導体チップがそ
れぞれ分離可能な状態に該半導体ウェーハを切断すると
ともに、前記粘着テープも該粘着テープの厚さ方向に一
部未切断部を残して切り込みする工程と、前記粘着テー
プを加熱して、前記半導体チップを該粘着テープから剥
離する工程とを含んでいることを特徴とする半導体装置
の製造方法で構成する。[Detailed Description of the Invention] [Summary] An object of the present invention is to provide a method for manufacturing a semiconductor device that can prevent short-circuiting of wiring patterns on the surface of a semiconductor chip due to minute fragments of a semiconductor wafer. heating an adhesive tape formed by applying a sticky thermoplastic adhesive to one side of a flexible tape, and adhering a semiconductor wafer to the adhesive tape via the thermoplastic adhesive; Cutting is made from the surface of the semiconductor wafer to cut the semiconductor wafer into a state in which the semiconductor chips formed on the semiconductor wafer can be separated from each other, and the adhesive tape also has a part uncut in the thickness direction of the adhesive tape. A method for manufacturing a semiconductor device is characterized in that the method includes the steps of: making a cut while leaving the adhesive tape intact; and heating the adhesive tape to peel the semiconductor chip from the adhesive tape.
本発明は、半導体ウェーハの微小破砕片により半導体チ
ップ表面の配線パターンの短絡を防止可能な半導体装置
の製造方法に関する。The present invention relates to a method for manufacturing a semiconductor device that can prevent short circuits in wiring patterns on the surface of a semiconductor chip due to minute fragments of a semiconductor wafer.
近年、半導体チップに形成した電子回路の高集積化に伴
い、半導体チップ表面の配線パターン幅や配線パターン
間距離がサブミクロン程度の非常に微細なものになって
きている。In recent years, as electronic circuits formed on semiconductor chips have become highly integrated, the width of wiring patterns and the distance between wiring patterns on the surface of semiconductor chips have become extremely fine, on the order of submicrons.
従って、半導体ウェーハ等を扱うクリーンルーム内のク
リーン度の改善は熱論、半導体ウェーハ自身からの微小
破砕片の発生を抑え、半導体チップ表面の配線パターン
が微小破砕片等で短絡することの防止が益々重要な課題
となってきている。Therefore, it is important to improve the cleanliness in clean rooms that handle semiconductor wafers, etc., and to suppress the generation of microscopic fragments from the semiconductor wafers themselves, and to prevent wiring patterns on the surface of semiconductor chips from short-circuiting due to microscopic fragments. This is becoming a major issue.
半導体ウェーハを粘着テープに貼着し、半導体ウェーハ
を切断し、そして半導体チップを粘着テープから剥離す
る従来の方法を説明する。A conventional method of attaching a semiconductor wafer to an adhesive tape, cutting the semiconductor wafer, and peeling the semiconductor chips from the adhesive tape is described.
第２図は、従来の製造方法を説明するための工程順側断
面図である。FIG. 2 is a step-by-step side sectional view for explaining a conventional manufacturing method.
尚、同じ部品・材料に対しては全図を通して同じ記号を
付与しである。Note that the same symbols are given to the same parts and materials throughout the drawings.
図において、■は粘着テープで、可撓性を有するテープ
ｌａ（例えば、厚さ７０μｍのポリエチレン製のテープ
）の片面に粘着材１ｂ （例えば、アクリル系の粘着材
）を２０μｍ程度の厚さで塗布して形成したものである
。In the figure, ■ is an adhesive tape, and adhesive material 1b (e.g., acrylic adhesive material) is applied to one side of flexible tape la (e.g., polyethylene tape with a thickness of 70 μm) to a thickness of about 20 μm. It is formed by coating.
２はウェーハフレーム（以下、フレームと呼称する）で
、厚さ１ｍｍ程度の金属板（例えば、ステンレス鋼板）
の中心部に半導体ウェーハ３より大きな開口部２ａを設
けて形成したものである。2 is a wafer frame (hereinafter referred to as frame), which is a metal plate (for example, a stainless steel plate) with a thickness of about 1 mm.
An opening 2a larger than the semiconductor wafer 3 is provided in the center of the semiconductor wafer 3.
５は突上治具で、少なくとも３本以上の針状ピンの先端
を揃えて構成したものである。Reference numeral 5 denotes a lifting jig, which is constructed by aligning the tips of at least three needle pins.
６はウェーハ保持台で、フレーム２の裏面２ｂの外側面
を支持するものである。A wafer holding table 6 supports the outer surface of the back surface 2b of the frame 2.
７はチップ用真空チャックで、金属棒の中心部に設けた
減圧部７ａが図示してない真空装置に接続し該減圧部７
ａの減圧により半導体チップ４を該減圧部７ａの先端に
真空吸着可能に形成されている。7 is a vacuum chuck for chips, and a pressure reducing part 7a provided at the center of the metal rod is connected to a vacuum device (not shown).
The semiconductor chip 4 is formed so as to be able to be vacuum-adsorbed at the tip of the pressure reducing section 7a by reducing the pressure at a.
次に、従来の製造方法、すなわち半導体ウェーハ３の粘
着テープ１への貼着から該粘着テープ１から半導体ウェ
ーハ３に形成した半導体チップ４を剥離して、例えば該
半導体チップ４をチップトレイに収納するまでを説明す
る。Next, the semiconductor chips 4 formed on the semiconductor wafer 3 are peeled off from the adhesive tape 1 by the conventional manufacturing method, that is, the semiconductor wafer 3 is attached to the adhesive tape 1, and the semiconductor chips 4 are stored in a chip tray, for example. I will explain how to do it.
先ず、フレーム２の開口部２ａを張膜した粘着テープ１
に、ウェーハエ程の完了した半導体ウェーハ３の裏面を
貼着する（同図（ａ）参照）。First, the adhesive tape 1 is applied to the opening 2a of the frame 2.
The back surface of the semiconductor wafer 3, which has undergone the wafer processing, is attached to the wafer (see FIG. 3(a)).
そして、半導体ウェーハ３の切断は、始めに半導体ウェ
ーハ３を貼着した粘着テープ１のテープ１ａが半導体ウ
ェーハ切断用のグイシングツ−の真空吸着板８表面と対
面するようにして、フレーム２を前記真空吸着板８上に
載置した後、粘着テープ面を真空吸着して確りと半導体
ウェーハを該真空吸着板に固定する。To cut the semiconductor wafer 3, first, the frame 2 is moved under the vacuum so that the tape 1a of the adhesive tape 1 to which the semiconductor wafer 3 is attached faces the surface of the vacuum suction plate 8 of the Guising Tool for cutting semiconductor wafers. After being placed on the suction plate 8, the surface of the adhesive tape is vacuum suctioned to securely fix the semiconductor wafer to the vacuum suction plate.
次いで、高速で回転しているダイシングソーの回転カッ
ター９により半導体ウェーハの半導体チップ４間部分を
十文字状に切断する。Next, the portion between the semiconductor chips 4 of the semiconductor wafer is cut into a cross shape by a rotary cutter 9 of a dicing saw rotating at high speed.
尚、この切断においては、半導体ウェーハは完全に切断
されるが、粘着テープ１は厚さ方向に未切断部分が残さ
れている（同図（ｂ）参照）。Note that in this cutting, the semiconductor wafer is completely cut, but an uncut portion of the adhesive tape 1 remains in the thickness direction (see FIG. 3(b)).
次に、上記切断によりそれぞれが分離状態になって粘着
テープ１に貼着されている半導体チップ４を剥離する方
法を説明する。Next, a method of peeling off the semiconductor chips 4 which are separated from each other by the above-mentioned cutting and stuck to the adhesive tape 1 will be described.
先ず、半導体チップ４表面を上方に向けて、フレーム２
をウェーハフレーム保持台６に固定した後、突上治具５
を垂直に上昇させる。First, place the frame 2 with the surface of the semiconductor chip 4 facing upward.
After fixing the wafer frame to the wafer frame holding table 6, the lifting jig 5
rise vertically.
すると、突上治具５の先端部は、粘着テープｌを突き破
って半導体チップ４裏面に当接し、該半導体チップを粘
着テープから剥離させる。Then, the tip of the lifting jig 5 breaks through the adhesive tape l and comes into contact with the back surface of the semiconductor chip 4, thereby peeling the semiconductor chip from the adhesive tape.
次いで、この剥離と同時にチップ用真空チャック７を垂
直に下降させ、半導体チップ４を真空チャックの先端に
真空吸着する（同図（ｃ）参照）。Next, at the same time as this peeling, the chip vacuum chuck 7 is vertically lowered, and the semiconductor chip 4 is vacuum-adsorbed to the tip of the vacuum chuck (see FIG. 4(c)).
そして、半導体チップ４を真空吸着したチップ用真空チ
ャック７をチップトレイ （図示せず）の置かれた位置
に移動し、該半導体チップ４を該チップトレイ上に静か
に載置して収納する。Then, the chip vacuum chuck 7 holding the semiconductor chip 4 by vacuum suction is moved to a position where a chip tray (not shown) is placed, and the semiconductor chip 4 is gently placed on the chip tray and stored.
高速で回転してる回転カッターにより半導体ウェーハ表
面から切り込んで、該半導体ウェーハを切断する方法に
おいては、半導体ウェーハの切断が進むに連れての回転
カッターの直下部分の半導体ウェーハの厚さが薄くなる
。In a method of cutting a semiconductor wafer by cutting from the surface of the semiconductor wafer with a rotary cutter rotating at high speed, as the cutting of the semiconductor wafer progresses, the thickness of the semiconductor wafer directly under the rotary cutter becomes thinner.
然も、この半導体ウェーハは高粘度ではあるが常温にお
いては液体である従来の粘着テープｌのの粘着材１ｂに
貼着されている。However, this semiconductor wafer is adhered to the adhesive material 1b of the conventional adhesive tape 1, which has a high viscosity but is liquid at room temperature.
従って、回転カッター直下部の厚さが薄くなった半導体
ウェーハも、単に液体状態の粘着材に支持されているに
過ぎない。Therefore, the semiconductor wafer, which is thinner directly below the rotary cutter, is simply supported by the adhesive material in a liquid state.
このため、前記部分は回転カッターからの押圧力、振動
、更には衝撃等に耐え切れずに、半導体ウェーハの切断
溝３ａにおいて、微小破砕片３ｃを伴なって破砕部３ｄ
を形成する破壊が発生する（（ｄ）図；同図（ｂ）のＢ
部拡大図参照）。For this reason, the above-mentioned portion cannot withstand the pressing force, vibration, and even shock from the rotary cutter, and the broken portion 3d is accompanied by minute pieces 3c in the cutting groove 3a of the semiconductor wafer.
A fracture occurs that forms (Figure (d); B in Figure (b)
(See enlarged view).
この為、半導体チップを粘着テープから剥離する際、半
導体チップを突上治具で突き上げると、突き上げの衝撃
で微小破砕片３ｃが切断溝３ａより飛び上がり周囲の半
導体チップ表面に落下して付着する（同図（ｅ）；同図
（ｃ）のＣ部拡大図参照）。For this reason, when the semiconductor chip is peeled from the adhesive tape, when the semiconductor chip is pushed up with a lifting jig, the impact of the pushing up causes the minute fragments 3c to fly up from the cutting grooves 3a and fall and adhere to the surface of the surrounding semiconductor chips ( Figure (e); see enlarged view of section C in figure (c)).
従って、微小破砕片３ｃが表面に付着した半導体チップ
は、配線パターンが短絡して回路機能が不良になること
が発生していた。Therefore, in a semiconductor chip having the microscopic fragments 3c attached to its surface, the wiring pattern is short-circuited and the circuit function becomes defective.
本発明は上記したような問題に鑑みてなされたもので、
半導体ウェーハの微小破砕片により半導体チップ表面の
配線パターンが短絡することを防止することのできる半
導体装置の製造方法の提供を目的とするものである。The present invention was made in view of the above-mentioned problems.
It is an object of the present invention to provide a method for manufacturing a semiconductor device that can prevent wiring patterns on the surface of a semiconductor chip from being short-circuited due to minute fragments of a semiconductor wafer.
前記課題は、加熱により粘着性のでる熱可塑性粘着材１
１ｂを可撓性のテープ１ａの片面に塗布して形成した粘
着テープ１１を加熱し、半導体ウェーハ３を前記熱可塑
性粘着材弁して粘着テープに貼着する工程と、前記半導
体ウェーハ３表面から切り込んで、該半導体ウェーハに
形成された半導体チップ４がそれぞれ分離可能な状態に
該半導体ウェーハを切断するとともに、前記粘着テープ
１１も該粘着テープ１１の厚さ方向に一部未切断部を残
して切り込みする工程と、前記粘着テープ１１を加熱し
て、前記半導体チップ４を該粘着テープから剥離する工
程とを含んでいることを特徴とする半導体装置の製造方
法により解決される。The above problem is a thermoplastic adhesive material that becomes sticky when heated.
1b on one side of the flexible tape 1a is heated, and the semiconductor wafer 3 is attached to the adhesive tape using the thermoplastic adhesive, and from the surface of the semiconductor wafer 3. The semiconductor wafer is cut into a state in which the semiconductor chips 4 formed on the semiconductor wafer can be separated, and the adhesive tape 11 is also left with some uncut portions left in the thickness direction of the adhesive tape 11. The problem is solved by a method for manufacturing a semiconductor device, which includes the steps of making a cut, and heating the adhesive tape 11 to peel the semiconductor chip 4 from the adhesive tape.
粘着テープ１１の熱可塑性粘着材１１ｂは、常温におい
て硬い固体で、加熱されると軟化して粘性のでる性質の
材料である。The thermoplastic adhesive material 11b of the adhesive tape 11 is a hard solid material at room temperature, but softens and becomes viscous when heated.
斯くして、半導体ウェーハ３の切断時、該半導体ウェー
ハは硬い熱可塑性粘着材に保持されているために、切断
が進んでも半導体ウェーへの機械的強度は殆ど弱く成ら
ない。In this way, when the semiconductor wafer 3 is cut, since the semiconductor wafer is held by the hard thermoplastic adhesive, the mechanical strength of the semiconductor wafer hardly weakens even as the cutting progresses.
この結果、切断溝３ａ部の半導体ウェーハ３が破壊され
ないために微小破砕片３ｃの発生もない。As a result, the semiconductor wafer 3 in the cutting groove 3a portion is not destroyed, and no minute fragments 3c are generated.
従って、半導体チップ４表面に微小破砕片３ｃが付着す
ることはないので、該微小破砕片３ｃによって半導体チ
ップ表面の配線パターン間が短絡することはなくなる。Therefore, since the microscopic fragments 3c do not adhere to the surface of the semiconductor chip 4, short-circuiting between wiring patterns on the semiconductor chip surface will not occur due to the microscopic fragments 3c.
第１図は本発明の一実施例の製造方法を説明するだめの
工程順側断面図である。FIG. 1 is a step-by-step side cross-sectional view illustrating a manufacturing method according to an embodiment of the present invention.
図において、１１は粘着テープ、１１ｂは常温時は固体
で１００°Ｃ程度に加熱されると粘性のでるメチルメタ
アクリレートをテープ１ａの片面に５０μｍの厚さで塗
布して形成した熱可塑性粘着材、１２は減圧部１２ａを
減圧して半導体ウェーハ３を下端面に吸着するウェーハ
用真空チャック、１３は粘着テープ１１を貼着したフレ
ーム２を載置して該粘着テープ１１を１００ ”Ｃ程度
に加熱可能なテープ貼着用加熱台、１４は内側壁に加熱
ヒータ１４ａを配設してフレーム２を載置して該フレー
ム２に貼着した粘着テープ１１を１００℃程度に加熱可
能なチップ！、ｒ１雛用加熱台をそれぞれ示す。In the figure, 11 is an adhesive tape, and 11b is a thermoplastic adhesive material formed by applying methyl methacrylate, which is solid at room temperature and becomes viscous when heated to about 100°C, to a thickness of 50 μm on one side of tape 1a. , 12 is a wafer vacuum chuck that vacuum chucks the semiconductor wafer 3 onto the lower end surface by reducing the pressure in the pressure reducing part 12a, and 13 is a wafer vacuum chuck on which the frame 2 to which the adhesive tape 11 is attached is placed, and the adhesive tape 11 is heated to about 100''C. The heating table 14 for attaching a heatable tape is a chip capable of heating the adhesive tape 11 attached to the frame 2 to about 100° C. by placing a heater 14a on the inner wall and placing the frame 2 on it! A heating table for r1 chicks is shown.
次に、第１図を参照して本発明の一実施例を詳細に説明
する。Next, an embodiment of the present invention will be described in detail with reference to FIG.
同図（ａ）は、ウェーハ用真空チャック１２により真空
吸着された半導体ウェーハ３が、フレーム２に貼着され
てテープ貼着用加熱台１３上で１００ ’Ｃ程度に加熱
されているテープ１１の直上部にある状態を示すもので
ある。In the same figure (a), a semiconductor wafer 3 vacuum-adsorbed by a wafer vacuum chuck 12 is directly attached to a tape 11 that is attached to a frame 2 and heated to about 100'C on a heating table 13 for attaching the tape. This shows the state at the top.
そして、ウェーハ用真空チャック１２は図示してない駆
動装置により下降し、半導体ウェーハ３の裏面を粘着テ
ープ１１の熱可塑性粘着材１１ｂに貼着する（同図（ｂ
）参照）。Then, the wafer vacuum chuck 12 is lowered by a drive device (not shown), and the back side of the semiconductor wafer 3 is stuck to the thermoplastic adhesive 11b of the adhesive tape 11 (see Figure (b).
)reference).
この後、半導体ウェーハ３は、前記説明した方法により
切断されて半導体チップ４が分離可能な状態となる。（
同図（ｃ）参照）。Thereafter, the semiconductor wafer 3 is cut by the method described above, so that the semiconductor chips 4 can be separated. (
(See figure (c)).
この切断は、室温中で行われるために粘着テープ１１の
熱可塑性粘着材１１ｂは硬い固体状態になっている。Since this cutting is performed at room temperature, the thermoplastic adhesive material 11b of the adhesive tape 11 is in a hard solid state.
従って、半導体ウェーハ３の切断が完了する直前におい
ても、該半導体ウェーハ３の未切断部分は硬度が高くな
った熱可塑性粘着材１１ｂで支持されているために、該
未切断部分が回転カッターの押圧、振動、衝撃等で破壊
されることはない。Therefore, even immediately before the cutting of the semiconductor wafer 3 is completed, the uncut portion of the semiconductor wafer 3 is supported by the thermoplastic adhesive material 11b with increased hardness, so that the uncut portion is pressed by the rotary cutter. It will not be destroyed by vibration, impact, etc.
（同図（ｄ）；同図（ｃ）のＡ部分拡大図参照）。(See figure (d); enlarged view of part A in figure (c)).
半導体チップ４の粘着テープ１１からの剥離は、フレー
ム２をチップ剥離用加熱台１４上に載置し、該フレーム
２に貼着した粘着テープ１１を１００℃程度に加熱した
後、前記で説明した方法により半導体チップ４を粘着テ
ープ１１から剥離する。The semiconductor chip 4 is peeled off from the adhesive tape 11 by placing the frame 2 on the chip peeling heating table 14 and heating the adhesive tape 11 attached to the frame 2 to about 100°C, as described above. The semiconductor chip 4 is peeled off from the adhesive tape 11 by this method.
上記詳細に亙る説明から明らなように、本発明の半導体
装置の製造方法は、半導体ウェーハを回転カッターによ
り切断しても該半導体ウェーハ裏面と切断溝とのコーナ
部に破壊が発生しないために、半導体ウェーハ材料の微
小な破砕片も熱論発生させない。As is clear from the detailed explanation above, the method for manufacturing a semiconductor device of the present invention is such that even if a semiconductor wafer is cut by a rotary cutter, no breakage occurs at the corner between the back surface of the semiconductor wafer and the cutting groove. , and does not generate heat generation, even minute fragments of semiconductor wafer material.
この結果、半導体チップ表面の配線パターンには、半導
体ウェーハ材料の微小な破砕片が付着することがないた
めに、配線パターンが上記微小な破砕片により短絡する
ことはない。As a result, since minute fragments of the semiconductor wafer material do not adhere to the wiring pattern on the surface of the semiconductor chip, the wiring pattern is not short-circuited by the minute fragments.
従って、本発明の半導体装置の製造方法は、半導体装置
を歩留まり良く製造することを可能にすると共に、高い
信頼性を存する半導体装置の製造をも可能とするもので
ある。Therefore, the method for manufacturing a semiconductor device of the present invention makes it possible to manufacture semiconductor devices with high yield, and also makes it possible to manufacture semiconductor devices with high reliability.
第１図は本発明の一実施例の製造方法を説明するための
工程順側断面図、
第２図は従来の製造方決を説明するための工程順側断面
図である。
図において、
１と１１は粘着テープ、
２はウェーハフレーム、
３は半導体ウェーハ、
４は半導体チップ、
５は突上治具、
６はウェーハ保持台、
７はチップ用真空チャック・
８は真空吸着板、
９は回転カッター
１２はウェーハ用真空チャック、
１３はテープ貼着用加熱台、
１４はチップ剥離用加熱台をそれぞれ示す。
第１図FIG. 1 is a process-order side sectional view for explaining a manufacturing method according to an embodiment of the present invention, and FIG. 2 is a process-order side sectional view for explaining a conventional manufacturing method. In the figure, 1 and 11 are adhesive tapes, 2 is a wafer frame, 3 is a semiconductor wafer, 4 is a semiconductor chip, 5 is a lifting jig, 6 is a wafer holder, 7 is a vacuum chuck for chips, and 8 is a vacuum suction plate , 9 indicates a rotary cutter 12, a vacuum chuck for wafers, 13 indicates a heating table for attaching a tape, and 14 indicates a heating table for peeling off chips. Figure 1
Claims (1)
撓性のテープ（１ａ）の片面に塗布して形成した粘着テ
ープ（１１）を加熱し、半導体ウェーハ（３）を前記熱
可塑性粘着材を介して粘着テープに貼着する工程と、 前記半導体ウェーハ（３）表面から切り込んで、該半導
体ウェーハに形成された半導体チップ（４）がそれぞれ
分離可能な状態に該半導体ウェーハを切断するとともに
、前記粘着テープ（１１）も該粘着テープ（１１）の厚
さ方向に一部未切断部を残して切り込む工程と、 前記粘着テープ（１１）を加熱して、前記半導体チップ
（４）を該粘着テープから剥離する工程とを含んでいる
ことを特徴とする半導体装置の製造方法。[Claims] An adhesive tape (11) formed by applying a thermoplastic adhesive material (11b) that becomes sticky when heated to one side of a flexible tape (1a) is heated, and a semiconductor wafer (3) is heated. a step of adhering the semiconductor chips (4) formed on the semiconductor wafer to an adhesive tape via the thermoplastic adhesive material; Cutting the wafer and cutting the adhesive tape (11) in the thickness direction of the adhesive tape (11) leaving a part uncut; and heating the adhesive tape (11) to cut the semiconductor chip. (4) Peeling the adhesive tape from the adhesive tape.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9611189A JP2687573B2 (en) | 1989-04-14 | 1989-04-14 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9611189A JP2687573B2 (en) | 1989-04-14 | 1989-04-14 | Method for manufacturing semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02273955A true JPH02273955A (en) | 1990-11-08 |
| JP2687573B2 JP2687573B2 (en) | 1997-12-08 |
Family
ID=14156279
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9611189A Expired - Lifetime JP2687573B2 (en) | 1989-04-14 | 1989-04-14 | Method for manufacturing semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2687573B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003063219A1 (en) * | 2002-01-25 | 2003-07-31 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing electronic component |
-
1989
- 1989-04-14 JP JP9611189A patent/JP2687573B2/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2003063219A1 (en) * | 2002-01-25 | 2003-07-31 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing electronic component |
| US6984572B2 (en) | 2002-01-25 | 2006-01-10 | Matsushita Electric Industrial Co., Ltd. | Method for manufacturing electronic component |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2687573B2 (en) | 1997-12-08 |
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