JPH02272877A - Half tone picture estimating device - Google Patents

Abstract

PURPOSE:To attain the reduction of cost by constituting a conditional expression decision circuit of an arithmetic circuit to compute two outputs and a pair of comparison circuits to which the computed output of the above-mentioned circuit is supplied. CONSTITUTION:In the case where a conditional expression ¦2e-g¦<=1 is decided when the total value of binary picture element level in each scanning opening is made (d) to (g) respectively, the subtraction processing of the expression 2e-g=p is executed by the arithmetic circuit 95. A signal corresponding to a constant '1' is supplied to the comparison circuit 96 as a reference signal, and the signal corresponding to the constant a-1' is supplied to the comparison circuit 97 of the other side, and they are level-compared with subtracted output (p) in the respective circuits. Then, the compared output Ca of '1' is obtained from the comparison circuit 96, and the compared output Cb of '-1' is obtained from the comparison circuit 97. Accordingly, if they are made to pass through an AND circuit 98, the decided output of the conditional expression can be obtained. Thus, the conditional expression decision circuit can be realized through simple arithmetic processing, and the reduction of the cost can be attained.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a halftone image estimating device that can satisfactorily estimate an original halftone image from, for example, a halftone displayed binary image, and particularly relates to This is a pre-elementized circuit configuration for scanning aperture selection used in .

[Background of the Invention] Currently, many of the output devices of display devices, printing devices, etc. that are in practical use can only be represented by binary values of white and black.

A dither method, which is a type of area gradation method, is known as a method for expressing a halftone image in a pseudo manner using such an output device.

As shown in Figure 7, the dithering method is based on a threshold matrix having a predetermined threshold value and size (approximately 8x8 pixels) as shown in Figure 7 (B) for the original halftone image (Figure 7 (A)). (In this example, a Bayer type dither matrix) is used to perform binarization to create a dithered image which is a pseudo halftone image as shown in FIG.

If it is possible to estimate the original halftone image from such a dithered image, it is possible to perform various data processing based on the estimated halftone image, and it is possible to have a degree of freedom in image conversion, which is convenient. Good.

To estimate a halftone image from a dithered image, a matrix of a predetermined size (hereinafter referred to as a scanning aperture) is prepared, and the number of white or black pixels existing within this scanning aperture and predetermined requirements (described later) are determined. Under the condition that the condition is satisfied, the halftone level of the pixel of interest is estimated, and this is sequentially executed for each pixel.

At this time, the scanning aperture is estimated by moving one pixel at a time in the row and column directions, and this is executed up to the last pixel to estimate a pseudo halftone image for the original halftone image.

When estimating a halftone image using a scanning aperture in this way, rather than using scanning apertures with the same area, it is better to prepare multiple scanning apertures with different aperture areas in advance and adjust the frequency characteristics of the original dithered image. It is possible to estimate a halftone image closer to the original halftone image by selecting the scanning aperture with the most suitable aperture area and estimating the halftone image (halftone level) of that pixel.

This has a high pixel level gradation discrimination ability in the low spatial frequency region (region with few pixel level changes), but only a low pixel level gradation discrimination ability in the high spatial frequency region (region with many pixel level changes). The scan aperture is selected to use a large scan aperture in low spatial frequency regions and a small scan aperture in high spatial frequency regions.

A specific example of estimating a halftone image based on such a principle has already been proposed by the applicant (for example, in Japanese Patent Laid-Open No. 63-267571, etc.), so a detailed explanation thereof will be omitted. As the scanning apertures, scanning apertures A to G and 2 having eight different aperture areas as shown in FIG. 8 are used.

The black circles shown in each scanning aperture from A to Z are the centers of movement when moving on the dithered image in FIG. 7(C). Although the scanning aperture Z is selected at the upper left pixel with respect to the center of movement, it may be selected at any position at the lower left, upper right, or lower right. By specifying the position of the scanning aperture in this manner, the estimated pixel position is also specified.

If a halftone image is estimated from the dithered image (insect) in FIG. 7(c) using such a scanning aperture, a halftone image as shown in FIG. 9(a) will be obtained. The result is very close to the original halftone image shown in (a).

The scanning aperture for each pixel used when estimating the halftone image in FIG. 9(A) is shown in FIG. 9(B). The pixel in the 1st row and 1st column uses the scanning aperture D, the pixel in the 1st row and 2nd column uses the scanning aperture, and the pixel in the 1st row and 3rd column uses the scanning aperture C.

The criterion for selecting a scanning aperture is the condition that there is no change in the pixel level within the selected scanning aperture. Then, the formula becomes as follows.

Here, it is assumed that the total value of the binary pixels in each scanning amount DG-G is d""=g.

2d-el≦1 ---(1) 2d-fl≦1 ... (2) 2e-gl≦1 ... (3) 2f-gl≦1 ... (4) d=o or d =16... (5) The scanning aperture to be used according to each condition is determined as shown in FIG. 10, with ○ indicating that each of these conditions is satisfied and X indicating that they are not satisfied.

The * mark in the figure indicates O or ×.

For example, if formulas (1), (2), and (5) are not satisfied, the aperture is selected without checking whether formulas (3) and (4) are satisfied. .

When formula (5) is not satisfied, when formula (1) is satisfied but formula (2) is not satisfied, aperture E is selected.

If the equation (1) is not satisfied or if the equation (2) is satisfied, the aperture F is selected.

When all formulas (1) to (4) are satisfied, the aperture G is selected.

Also, when the number of white pixels in the aperture is O or 16,
The aperture is selected regardless of equations (1) to (4).

Now, in the conditional expression mentioned above, for example, when formula (3) is expanded, -1≦2e-g≦1 ... (6), '-Cg-1
)/2≦e≦(g+1)/2... (7) Using equation (7) to calculate the e value for the value of g,
As shown in Figure 11, when g is an odd number? It can be seen that e takes on two values. Therefore, when g is an odd number, the corresponding 2
If the number is even, one corresponding value is determined as two values at the same time.

Therefore, as shown in FIG. 12, the conditional expression determination circuit 70 is composed of a conditional expression ROM 91, a pair of determination circuits (data coincidence detection circuits) 92 and 93, and an OR circuit 94.

A part of the contents of the conditional expression ROM 91 is shown in FIG. In this way, when g is an odd number, large data is output corresponding to the input value.

The output of the conditional expression ROM 91 is supplied to a determination circuit 93 when g is an odd value, and the data is compared with the value of e supplied here. Similarly, a determination circuit 92 for when g is an even value is provided, and 8 and e are supplied thereto.

When each determination is satisfied, 1° is output, and when it is not established, 0 is output.

[Problems to be Solved by the Invention] In this way, in the past, each conditional expression judgment circuit has a conditional expression R.
Since OM was used, the cost increased.

Therefore, this invention takes these points into consideration,
The conditional expression determination circuit is simplified to reduce costs.

[Means for Solving the Problems] In order to solve one of the above problems, in this invention,
Multiple scanning apertures with different aperture areas are selected according to a predetermined conditional expression to create an n-value image (n≧2) such as a dither image.
In a halftone image estimation device for estimating an original halftone image, a plurality of conditional expression judgment circuits for scanning aperture selection are provided, and each conditional expression judgment circuit includes an arithmetic circuit that calculates two inputs, and a calculation circuit that calculates two inputs. and a pair of comparison circuits to which an output is supplied, each comparison circuit is supplied with a reference signal related to a constant of the conditional expression, and a judgment output is output based on the comparison output. is a special number.

[Operation] For example, when conditional expression (3) is expanded, it becomes as follows.

2e-g≦1 ・ ・ ・ (8) 2e-g≧
-1 . . . (9) Therefore, 2e-g=p .

The comparison circuit 96 is supplied with a signal corresponding to the constant (=1) in equation (8) as its reference signal, and the other comparison circuit 9
7 is supplied with a signal corresponding to the constant (=-1) in equation (9), and the level is compared with the subtraction output p in each of them.

When the formula (8) is satisfied, the comparator output Ca of "11" is obtained from the comparison circuit 96, and when the formula (9) is satisfied, the comparison output cb of "11" is obtained from the comparator circuit 97. Therefore, If the signal is passed through the AND circuit 98, the judgment output of equation (3) is obtained.

In this way, a conditional expression determination circuit can be realized with simple arithmetic processing.

[Example] Hereinafter, a halftone image estimation method according to the present invention will be explained in detail with reference to FIG. 1 and subsequent figures.

FIG. 3 shows a specific example of a halftone image estimation device.

In the figure, an image reading device 1 reads an original image and converts it into binary data.

Manuscript image 4. It is read using a photoelectric conversion element such as a CCD and converted into an electrical signal. The converted electric signal is converted to digital data, and this digital data is subjected to shading correction (correction for equalizing CCD output) and then converted to binary data (composing a dithered image) as shown in FIG. 7 (c). A series of data processing is performed, such as converting the data into a binary data (binary data).

The digitized binary data is supplied to the halftone image estimating means 2 and, if necessary, to the image memory unit 6. The halftone image estimating means 2 is a means used when reprocessing binary data that has already been binarized, and in the case of binary data from the image reading device 1, it is used to reprocess binary data that has already been digitized. Since it is halftone data, it is output to the subsequent stage without any particular processing. In addition to the binary data, the halftone image estimating means 2 is supplied with timing signals necessary for estimation processing.

The halftone image signal is supplied to the image processing means 3 together with the timing signal, and is subjected to enlarging/reducing, filtering processing, etc.
Image processing corresponding to the specified processing mode is executed.

The image-processed halftone image signal is supplied to the binarization means 4, where it is re-binarized using the threshold selected by the threshold selection signal. Threshold selection No. 43 is designated from the control terminal or keyboard.

Reference numeral 5 denotes a recording device such as a laser printer, in which an image is reproduced based on the binary data output from the binarization means 4 or the image memory unit 6.

The image memory unit 6 is configured to be able to store the binary data itself obtained from the image reading device 1.

FIG. 4 shows an example of the configuration of FIG. 3 as an image processing system.

Image reading means 1, halftone image estimation means 2, image processing means 3, binarization means 4 and recording device 5 are connected to control terminal 13 via first and second interfaces 11 and 12, respectively. Further, the image memory unit 6 is configured to be connected to the first interface 11 via the system bus 14. 15 indicates an external device.

FIG. 5 shows an example of the halftone image estimating means 2. As shown in FIG.

Since a part of the configuration disclosed in the above-mentioned publication can also be used in this case, a detailed explanation of the part to be used will be omitted.

Binary data from the image reading device 1 can be supplied to the terminal 2a, and this binary data can be supplied to the line memory section 22 via the first selector 21.

The line memory section 22 receives the binary data sent from the first selector 21 and stores the binary data for each line, and as shown in the figure, it stores nine data from L1 to L9. Consists of line memory. The second selector 23 sequentially selects and stores binary data corresponding to each line in each of these nine line memories L1 to L9.

The line memory for 9 lines is prepared here because the maximum number of lines of the scanning aperture G to be used is 8 lines, and one more line memory is required for real-time processing. be.

Therefore, the second selector 23 selects eight line memories necessary for the current image processing among the nine line memories.

When using eight line memories, it is sufficient to combine them with one latch circuit. At this time, the input binary data is supplied to the latch circuit.

In this case, it is possible to obtain eight lines of binary data using the output of the latch circuit and the outputs of the remaining seven line memories excluding the line memory currently being written.

Each of the binary data of the selected eight line memories is supplied to the halftone image estimating section 30, and based on this binary data, only one scanning aperture is selected from among the plurality of types of scanning apertures.

Data indicating the selected scan aperture is provided to Hikone circuit 24 to estimate the value of the halftone image determined by the pixel level and gain within the scan aperture. Here, the gain corresponds to the area ratio of the scanning aperture, and the gain corresponds to the area ratio of the scanning aperture G.
When the gain of is set to 1, the scanning apertures E and F have a gain of 2,
The scan aperture has a gain of 4, scan apertures B and C have a gain of 8, scan aperture A has a gain of 16, and scan aperture Z has a gain of 64.
becomes.

Various timing signals obtained from the timing generation circuit 25 are supplied to the above-mentioned selectors 21 and 23, as well as the line memory section 22, halftone image estimation section 30, and selection circuit 24, and the data is processed at the necessary timing. Selection and address sending are controlled.

FIG. 6 shows a specific example of the halftone image estimation section 30.

Means 4 consisting of 8 shift registers (8 pixels)
0 is provided to set multiple scanning apertures.

50 is a counting circuit, which is provided in the same number as the scanning numerical aperture. This counting circuit 50 (50a to 50g).

50z), when each scanning aperture is set to the pixel of interest whose halftone image level is to be estimated, the number of white or black pixels within the scanning aperture is counted.

Among them, the outputs of the counting circuits 50a to 50c are 1, which is supplied to the density pattern discrimination circuit 60, which outputs a binary image created based on the counted value and an original binary image within the scanning aperture (see Fig. 7 (H)). )) are compared.

The outputs of the remaining counting circuits 5od to 50g are supplied to the conditional expression determination circuit 70.

The same number of conditional expression determination circuits 70 as the number of counting circuits are provided, and the determination output from each of them and the determination output of the density pattern determination circuit 60 are supplied to the scanning aperture determination circuit 80 to select the only scanning aperture. Ru.

31 is a circuit that outputs pattern position information. 32
indicates a register for holding the counted number of white pixels, and its output is supplied to a multiplier 33, where the counted number of white pixels is multiplied by the gain of each scanning aperture. The number of white pixels, which is the result of the multiplication, is used as an estimated value of the halftone image to be obtained.

Data indicating the estimated value of the halftone image is supplied to the selection circuit 24, and the estimated value of the halftone image is selected based on the scanning aperture selection signal output from the aperture determination circuit 80. For example, when a scanning aperture is selected, a halftone image estimated value (=4d) is selected, which is obtained by multiplying the number d of white pixels within this scanning aperture by a gain (=4).

The conditional expression determination circuit 70 is configured as follows.

For example, when conditional expression (3) is expanded, it becomes as follows.

2e-g≦1 ・ ・ ・ (8) 2e-g≧
-1. . . (9) Therefore, by setting 2e-g=p . . . (10), equation (3) can be composed of an arithmetic circuit and a comparison circuit for its output.

FIG. 1 shows an example.

All four conditional expression determination circuits 7o have the same configuration and include an arithmetic circuit 95 and a pair of comparison circuits 96 and 97.

The computation circuit 95 performs two-input arithmetic processing, and to exemplify the above-mentioned equation (3), the white pixel count egg related to the scanning apertures E and G is input.

The arithmetic circuit 95 performs the subtraction process (=2e-g) to form the calculated output p.

'g calculation output p is commonly supplied to comparison circuits 96 and 97. The comparison circuit 96 receives a reference signal (=1
signal) is fully supplied, and when the calculation output p is less than the reference signal, a comparison output Ca of °゛1'' is output.

The other comparison circuit 97 receives a reference signal (
= -1 signal) is supplied, and when the calculation output p is greater than or equal to the reference signal, a comparison output cb of 1° is output. The comparison outputs Ca and Cb are logically summed by an AND circuit 98. Therefore, when equation (3) is satisfied, a determination output of 1°° is obtained.

For each of equations (1), (2), and (4), the judgment output of the equation is obtained using the judgment circuit having the same configuration as described above.

FIG. 2 shows an example of the arithmetic circuit 95, in which the number of white pixels is e+g.
When is binary digital data, if the number e of white pixels is supplied to the left shift processing circuit 100, an output of 20 can be obtained.

If this and the number g of white pixels are supplied to the d calculator 101,
From this, we can simply obtain the trial calculation power of 2e-g=p.

In the above example, a binary dithered image was used as the original image, but instead of a binary dithered image, a multilevel image (
It is easy to understand that the present invention can also be applied to the case where a ternary dithered image (such as a ternary dithered image) is used and its halftone image level is estimated.

[Effects of the Invention] As described above, in the present invention, a conditional expression determination circuit is configured by an arithmetic circuit that calculates two inputs and a pair of comparison circuits to which the arithmetic output is supplied.

According to this, since conditional expression determination can be realized with a simple circuit, there is no need to use a ROM or the like as in the past. Therefore, it has the practical benefit of achieving a significant cost reduction compared to the conventional method.

[Brief explanation of drawings]

FIG. 1 is a system diagram showing an example of a conditional expression determination circuit used in a halftone image estimation device according to the present invention, and FIG.
A system diagram of the circuit, FIGS. 3 and 4 are system diagrams showing an example of a halftone image estimation device, FIG. 5 is a system diagram of the halftone image estimation means, and FIG. 6 is a system diagram of the halftone image estimation section. , FIG. 7 is an explanatory diagram when creating a dithered image from an original halftone image, FIG. 8 is a diagram showing an example of the scanning aperture used, and FIG.
The figure shows an example of an estimated halftone image obtained when the scanning aperture is selected, and the figure shows an example of the selection of the aperture used at that time. be. Image reading device Halftone image estimation means Image processing means Binarization means Recording device Line memory section selection circuit Halftone image estimation section 70...Conditional expression determination circuit 95...Arithmetic circuit 96,97...Comparison circuit 70 : Conditional expression judgment circuit 95: Arithmetic circuit (a) Original halftone image (b) Threshold matrix Fig. 7 (c) Dither image 1st scanning aperture example Fig. 1O Fig. 70: Conditional expression judgment circuit Fig. 12 (a) (b) ) BCB ACC ACB CCF CCC DDCB ECZ BBB CGG Figure 9

Claims (1)

[Claims] (1) Multiple scanning apertures with different aperture areas are selected according to a predetermined conditional expression, and an n-value image (n
≧2) In a halftone image estimating device that estimates an original halftone image, a plurality of conditional expression judgment circuits for scanning aperture selection are provided, and each conditional expression judgment circuit includes an arithmetic circuit that calculates two inputs, and an arithmetic circuit that calculates two inputs. , and a pair of comparison circuits to which the calculation output is supplied, each comparison circuit is supplied with a reference signal related to a constant of the conditional expression, and a judgment output is output based on the comparison output. A halftone image estimation device characterized by: