JPH0453352B2 - - Google Patents

Description

[Detailed description of the invention] (Industrial application field) The present invention relates to an image processing device.

(Prior Art) Currently, many of the output devices in practical use, such as display devices and printing devices, can only represent binary values of white and black. Density pattern method (luminance pattern method), dither method, and the like are known as methods for expressing halftones in a pseudo manner using such an output device. Both the density pattern method and the dither method are types of area gradation methods, in which the number of dots stored within a fixed area (matrix) is varied.

The density pattern method uses a threshold matrix to memorize a portion corresponding to one pixel of the document as multiple dots, as shown in Figure 18B, and the dither method uses the first
As shown in Figure 8A, this is a method in which a portion of the document corresponding to one pixel is recorded as one dot. As shown in the figure, binarized output data is obtained. This output data pseudo-expresses a halftone image using binary values of white and black.

(Problems to be Solved by the Invention) By the way, if it is possible to restore the original halftone image (corresponding to the input data in FIG. 18) from such a binarized pseudo halftone image, it is possible to convert various data into Since the processing can be performed, various degrees of freedom can be given to image conversion, which is convenient. In the case of a density pattern image, once the pattern level arrangement is known, it is possible to immediately restore the original halftone image.
However, the resolution is low compared to the amount of information. On the other hand, it is difficult to restore the dithered image to the original halftone image, which has a higher resolution than the density pattern image compared to the density pattern image. Therefore, various image conversions cannot be performed using dithered images alone.

The present invention has been made in view of the above points, and its purpose is to realize an image processing device that can satisfactorily estimate an original halftone image from a binary image (for example, a dither image). It is in.

(Means for Solving the Problems) The present invention, which solves the above problems, uses a plurality of types of apertures set for each pixel of a halftone image to be estimated in a binary image consisting of white pixels and black pixels. Among the line memories, the number corresponding to the number of rows of the maximum aperture is received, and the binary data regarding the binary image is stored in the corresponding line memory.
A first select circuit that sends value data, a second select circuit that selects the number of lines of data necessary for processing from the line memory, and a shift register that transfers the binary data selected by the second select circuit. The binary data of a predetermined latch of the shift register is stored, the number of white pixels or the number of black pixels in each aperture is counted, and the halftone image estimated value at each aperture is calculated. a halftone image estimating section that performs re-binarization using a dither matrix corresponding to the size of the aperture and compares the re-binary image with the original binary image; By comparing the value image and the original binary image, if they match at any aperture, the halftone image estimate at the larger aperture is selected as the final halftone image estimate at the corresponding pixel. , a selection circuit that selects the halftone image estimated value at the smallest aperture as the final halftone image estimated value for the corresponding pixel if the two do not match at any aperture, the line memory, and a first selection circuit. , the second selection circuit, the halftone image estimator, and the selection circuit, and a timing generation circuit that outputs a timing signal for controlling these operations.

(Function) The present invention prepares multiple types of apertures for each pixel, and compares the binary image in each aperture with the binary image that is binarized after performing predetermined processing on the binary image. By selecting the optimal aperture, excellent images can be obtained.

(Example) Examples of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, reference numeral 1 denotes an image reading device that reads an original image and converts it into binary data (binary signal). The image reading device 1 reads an original image using a photoelectric conversion element such as a CCD and converts it into an electrical signal. Then, the converted electric signal is A/D converted to digital data, and this digital data is subjected to shading correction (equalization processing of CCD output) and then converted to binary data. 2
is a halftone image restoration circuit which receives digital binary data (binary signal) and a timing signal from the image reading device 1, performs predetermined processing on the binary data, and restores it to a halftone image signal.

3 receives a halftone image signal and a timing signal from the halftone image restoration circuit 2, and performs processing such as enlarging/reducing and filtering according to a processing mode set from a host computer (not shown). It is a processing circuit. 4 is a binarization circuit that receives the halftone signal and timing signal from the image processing circuit 3 and performs binarization processing using a threshold selected by a threshold selection signal set from a host computer, keyboard, etc. . 5
6 is a recording device that receives the binary data output from the binarization circuit 4 and reproduces it as an image; 6 is a recording device that receives the binary data output from the binarization circuit 4; This is an image memory unit for storing images. As the recording device 5, for example, a laser printer, an LED printer, or the like is used. The operation of the device configured as described above will be explained as follows.

The image recorded on the document is scanned by the image reading device 1.
It is read using a photoelectric conversion element such as a CCD and converted into an electrical signal. The image signal converted into an electrical signal is also converted into digital data by an A/D converter within the image reading device 1. The converted digital data undergoes shading correction for each pixel data, and is then converted into digital binary data by a binarization circuit within the image reading device 1 and output. The output binary data is sent to the halftone image restoration circuit 2. At the same time, the image is stored in the image memory unit 6. The halftone image restoration circuit 2 restores a halftone image from input binary data. The halftone signal output from the halftone image restoration circuit 2 is sent to the subsequent image processing circuit 3.
Then, image processing is performed according to the processing mode input in advance. For example, if the enlargement/reduction mode is set, enlargement/reduction processing is performed, and if the filtering mode is set, filtering processing is performed. The halftone signal image-processed in the image processing circuit 3 in this way is re-digitized in the subsequent binarization circuit 4.
It is digitized and converted into binary data. This binary data may be immediately reproduced as an image by the recording device 5, or may be stored in the image memory unit 6 as binary data. The binary image data stored in the image memory unit 6 can be read out as needed and reproduced as an image by the recording device 5, or can be returned to the halftone image restoration circuit 2 and restored to a halftone image. You can also do it.

Next, the operation of the halftone image restoration circuit 2 will be explained in detail. FIG. 2 is a diagram showing a specific example of the configuration of the halftone image restoration circuit 2. As shown in FIG. In the figure, 20 is a first selection circuit that receives binary data from the image reading device 1 and selects the data flow;
is a line memory section that receives binary data sent from the select circuit 20 and stores data for each line. As shown in the figure, the line memory section 21 is composed of nine line memories _L1 to _L9 . Therefore, the circuit shown in the figure can store nine lines of binary data at the same time. Here, the reason why the line memory is prepared for 9 lines is because the number of lines of the maximum aperture G (see FIG. 6) is 8 lines, and because one more line is required for real-time processing.

22 is one of the nine lines of the line memory section 21,
A second select circuit 23 for selecting 8 lines of data required for current processing receives the data output from the select circuit 22 and re-inputs the estimated halftone image value and the original binary image for each aperture. This is a halftone estimator that outputs the comparison results of value images. 2
Reference numeral 4 denotes a selection circuit that receives the estimated value for each aperture outputted from the halftone estimating section 23 and the comparison result information of both binary images, selects the optimum estimated value, and outputs it as a halftone signal.

Reference numeral 25 indicates various timing signals (synchronous clock, H-VALID, V
-VALID, H-SYNC), the first and second
select circuits 20, 22, line memory section 2
1. A timing generation circuit that outputs a timing signal (an address in the case of the line memory section 21) to the halftone estimation section 23 and selection circuit 24. Here, the synchronization clock is a clock output for each binary data, and H-SYNC is a synchronization signal output for each line. H-VALID is an enable signal indicating the valid data width in the main scanning direction, V
-VALID is an enable signal indicating the valid data width (original reading width) in the sub-scanning direction. Timing charts showing the mutual relationship of these timing signals are shown in FIGS. 3 and 4. FIG. 3 shows a timing chart in the main scanning direction, and FIG. 4 shows a timing chart in the sub-scanning direction.

The timing charts shown in FIGS. 3 and 4 will be explained. In Figure 3, A is H-SYNC
signal, B is H-VALID signal, C is synchronous clock,
D is image information. The period from the rise of the H-SYNC pulse to the rise of the next pulse is one scanning time (CCD exposure time), and the period from the fall of the H-VALID pulse to the rise of the next pulse is the image data valid period. The image information is synchronized to 1 of the synchronous clock.
Established on the bus every pulse. In Figure 4, A is the document reading start pulse, A is H-
The SYNC signal and C are the V-VALID signals. V-
The document reading width is from the falling edge to the rising edge of the VALID signal. In other words, the timing generation circuit 25 receives these various timing signals and controls the operations of the internal circuits. The operation of the circuit configured as described above will be explained as follows.

Upon receiving the eight lines of binary data sent from the image reading device 1 and the timing signal from the timing generation circuit 25, the selection circuit 20 sequentially sorts the binary data and inputs it into the line memories _L1 to _L9 . . For example, input data is input to the _L2 memory, and when the _L2 memory becomes full, the binary data is inputted by sequentially switching to the next _L3 memory and so on. The selection circuit 22 selects eight lines of data necessary for the current processing from the line memory of the line memory section 21 and sends the selected data to the halftone estimating section 23 for reading.

The halftone estimation unit 23 receives binary data for eight lines from the selection circuit 22, performs predetermined processing, and generates aperture determination results for each of the plurality of types of apertures and a halftone image estimated value obtained for each aperture. output and select circuit 2
Send to 4. The selection circuit 24 receives these signals, obtains an optimal aperture based on the aperture determination result, and an estimated halftone image value based on the aperture, and outputs it. The halftone signal from the selection circuit 24 and the timing signal from the timing generation circuit 25 are sent to the image processing circuit 3 (see FIG. 1).

Next, the operation of the halftone estimation section 23 will be explained in detail. First, before explaining the operation of the halftone estimation section, a method for estimating a halftone image used in the present invention will be explained.

FIG. 5 is a flowchart showing an embodiment of a halftone image estimation method. The method of the present invention will be explained along this flowchart.

Step: Set multiple types of apertures for each pixel in a binary image consisting of a white area and a black area.

FIGS. 6A to 6B are diagrams in which a binary image and an aperture are shown superimposed, respectively. A shown in A is 2 rows x 2 columns (2 x 2), and B shown in B is 2 rows x 4 columns (2 x 4).
The C shown in C is 4 rows x 2 columns (4 x 2), the D shown in D is 4 rows x 4 columns (4 x 4), and the E shown in E is 4 rows x 8 columns (4 x 8). ), F shown in F is 8 lines x 4
G in column (8 x 4) is 8 rows x 8 columns (8 x
8) respectively show the openings. Here, the black circle "●" shown in each aperture in the figure is the center of movement when moving on the binary image, and the halftone image at this point is estimated.

The present invention selects one optimal aperture from among these multiple types of apertures, but in selecting the most optimal aperture, the following points need to be considered. In other words, human vision has a high gradation discrimination ability in low spatial frequency regions (regions with few pixel level changes), but only a low gradation discrimination ability in high spatial frequency regions (regions with many pixel level changes). It has the characteristic that it is not Therefore, if a large aperture is used in the low spatial frequency region to express high gradations, and a small aperture is used in the high spatial frequency region to reproduce an image with high resolution, an overall high quality halftone image can be obtained. be able to.

step First, the maximum aperture G is selected.

As explained in step 1, the basic idea of the present invention is to select an aperture as large as possible as long as no concentration change is observed within the aperture. Therefore, here, the order of aperture selection is set as G→F→E→D→C→B→A as shown in FIG.

Step: Obtain an estimated value based on the ratio of the white area to the black area within the selected aperture, and re-binarize this estimated value using a dither matrix corresponding to the size of the aperture.

When the aperture G is superimposed on the initial position of the scan as shown in FIG. 6D, and a binary image of the area surrounded by the aperture frame is taken out, it becomes as shown in FIG. 8A.
Now, if you count the number of white pixels within this aperture frame, there are 26. Therefore, use this 26×1 (gain) as the estimated value,
Assuming that the pixel level is the average pixel level of all pixels existing within the aperture frame, all pixels are compensated with 26 as shown in FIG. 8B.

The aperture G compensated for by the estimated value in this way
Once the estimated halftone image within is obtained, this estimated halftone image is then re-binarized using a dither matrix corresponding to the size of the aperture G as shown in FIG. 8C.
For example, if we compare the value 26 at the first row and first column (1, 1) of the estimated halftone image shown in B with the same value 45 (1, 1) in the dither matrix shown in C, B is smaller, so ( 1, 1) is black. Next, when comparing the value 26 of (1, 2) for b and the value 5 for c, b is larger, so the pixel at (1, 2) is made white.
When the estimated halftone image shown in B is re-binarized in this way, a binary image as shown in FIG. 8D is obtained.

Step Check whether the original binary image and the re-binary image match.

Taking the case of FIG. 8 as an example, the original binary image shown in A and the re-binary image shown in D are compared. In this case, as is clear from the figure, there is a mismatch. A mismatch means that the pixel level has changed within this aperture G.

If they do not match, it means that the aperture G is not appropriate, so the next aperture is selected (step).
The selection order of the apertures is as shown in FIG. Therefore, the next aperture to be selected is F. Once the aperture F is selected, the step operation is repeated for the aperture F. FIG. 8E shows a binary image at the initial position framed by the aperture F. If you count the number of white pixels within this frame, there are 14. Since the gain of aperture F is 2,
The estimated value here is 28, which is 14 multiplied by the gain.

Here, gain refers to the area of the largest aperture used divided by the area of the aperture (here, the maximum aperture is G). For example, when finding the gain of aperture A, the following is obtained: become that way.
The area of opening G is 8x864, and the area of opening A is 2
×2 of 4, so the gain of aperture A is 64/4=16
becomes. The numbers written under each aperture in FIG. 6 indicate the gain of that aperture. Such gain correction is performed to match the gradation characteristics of each aperture.

Assuming that the obtained estimated value 28 is the average pixel level of the binary image shown in E, all pixels are filled in with 28 as shown in FIG. F is the estimated halftone image in this case. Once the estimated halftone image has been determined, this halftone image is re-binarized using a dither matrix corresponding to the size of the aperture F as shown in Figure 8G, resulting in a binary image as shown in Figure 8H. is obtained.

Next, the original binary image H and the re-binary image H are compared.
From the figure, it is clear that the two coincide. This shows that there is no change in the pixel level within the aperture F.
Therefore, the aperture F is appropriate.

Step When the original binary image and the re-binary image match, the aperture F used at that time is set as the selected aperture, and the estimated value (28 in this case) obtained using the aperture is used as the halftone image corresponding to the center point. This is the halftone image setting value of the pixel (hereinafter referred to as the center point pixel). That is, an estimated value is obtained for each aperture, and the estimated value obtained for the appropriate aperture is used as the halftone image estimated value. The value 28 shown in FIG. 8 is the estimated value that should be obtained as is.

In this way, by selecting the optimal aperture for all pixels and estimating a halftone image based on the optimal aperture, high-quality image estimation is performed for all images. Therefore, if an image is reproduced on a recording device based on the estimated value obtained in this way, a high quality image will be obtained.

Incidentally, in comparing the original binary image and the re-binary image shown in the step, it is possible that the two images do not match for all the apertures prepared in advance. In this case, by selecting the smallest aperture (A in this case), it is possible to escape from the loop shown in FIG.

Next, the configuration of the halftone estimation section 23 will be explained.

The halftone estimation unit 23 has halftone image estimation circuits as many as the number of apertures (seven in this case) as shown in FIG.
It is assembled and composed. FIG. 9 shows a halftone image estimation circuit regarding the aperture G. Halftone image estimation circuits for the remaining apertures are shown in FIGS. 10 to 15.
As shown in the figure. Figure 10 shows the first
1 shows the halftone image estimation circuit for the aperture E, FIG. 12 for the aperture D, FIG. 13 for the aperture C, FIG. 14 for the aperture B, and FIG. 15 for the aperture A, respectively. Here, FIG. 9 will be explained in detail. Note that the numbers in the figure indicate the number of bits of the signal line.

The 8-bit binary data selected by the select circuit 22 is transferred to the timing generation circuit 25 by a shift register 30 consisting of latches _LA1 to _LA8 .
It is shifted from right to left in the figure by the timing signal from . Here, the shift register 30 consisting of latches _LA1 to _LA8 is common to the halftone image estimation circuits shown in FIGS. 10 to 15. It should be noted that the ◯ mark shown on the data line in the figure represents one piece of image data (binary data). In the case of the aperture G, the size is 8 rows x 8 columns, so it would be sufficient to count the number of white pixels in the shift register 30 each time it is shifted, but this method would take a long time. Moreover, the circuit becomes complicated. Therefore, the present invention provides two
The value data is shifted from the right side of the diagram to the left,
Data in the first column at the end (here, the contents of latch L ₈ )
The counting of the number of white pixels was simplified by taking advantage of the property that the number of white pixels is replaced.

I will explain in detail. When the data is shifted by one column, new binary data is latched into latch _LA1 . The number of white pixels for one column is counted by a counter 31. Furthermore, the data for one column that has been overflowing from the shift register 30 due to this shift operation is latched into the externally placed latch _LA9 . The latched number of white pixels for one column is counted by a counter 32. On the other hand, the latch 33 has an opening G before shifting.
Since the number of white pixels within is held, the subtracter 34
Then, subtract the number of white pixels for one column that protrudes from this number of white pixels, and add the decreased number of white pixels to the newly added number of white pixels for one column using the adder 35. After shifting, The number g of white pixels within the aperture G of is determined. The determined number g of white pixels is newly latched in the latch 33. The output of the latch 33 is multiplied by the gain (x1 in this case) by a multiplier 36, outputted as a halftone image estimated value at the aperture G, and sent to the subsequent selection circuit 24.

Although the operation of the halftone image estimating circuit for the aperture G has been described above, the same applies to the other apertures shown in FIGS. 10 to 15. Since the size differs depending on the type of aperture, the position at which data is taken out from the shift register 30 is changed, the number of white pixels is counted, and the halftone image estimated value for each aperture is output. For example, in the case of the aperture F shown in FIG. 10, the size of the aperture is 8 rows x 4 columns, and the inside of the shift register 30 is also set to 8 x 4. The same applies to other circuits. Note that the multiplier provided at the final stage of these circuits can be easily configured by using a shift register and shifting to the left by the magnitude of the magnification.

Next, the operation of the pattern comparison circuit for the original binary image and the re-binary image will be explained. As before, FIG. 9 will be explained. Assuming that a binarization threshold pattern as shown in Fig. 8C is prepared, the density pattern corresponding to the count value of the number of white pixels in the aperture is as shown in Fig. 16. Become something. Figure 16 A shows when the number of white pixels is 63, B shows when the number of white pixels is 62, and C shows when the number of white pixels is 61.
, D shows the density pattern when the number of white pixels is 3, E shows the density pattern when the number of white pixels is 2, and F shows the density pattern when the number of white pixels is 1. Although only six types of patterns are shown in the figure, 64 types of patterns are actually prepared and stored in the density pattern ROM 37. In this embodiment, the density pattern ROM 37 needs to output a pattern of 64 dots (indicated by a box on the signal line in the figure) at the same time.
As shown in 6b, it is composed of a total of eight ROMs, one ROM for each row. M ₁ in Figure 16 A is 1
ROMs are shown. And the density pattern
The ROM 37 receives the number g of white pixels as an upper address and the position information due to the movement of the aperture as a lower address.
A corresponding density pattern (corresponding to the above-mentioned re-binary image) is output.

For example, when the number of white pixels is 1 as shown in _FIG .
change as follows. Figure 17 is the density pattern
3 is a diagram showing the relationship between addresses and data in a ROM 36. FIG. However, white is set as "1" and black is set as "0". Here, data 10 is the initial position data.

In this way, the density pattern (re-binary image) output from the density pattern ROM 37 is compared in the determination circuit 38 to see if it is the same pattern as the binary image output from the shift register 30.
The determination circuit 38 outputs a "1" level if the patterns are the same, and a "0" level if the patterns are different.

Although the pattern comparison circuit for the aperture G has been described above, the operation is exactly the same for other apertures, except that the number of dots to be compared is different. Although a density pattern ROM may be created for each aperture, the density pattern ROM used for the aperture G may be made common and a value obtained by multiplying the number of white pixels in each aperture by a gain may be selected.

When the halftone image estimation value for each aperture and the aperture determination result are output from the halftone estimator as described above, the selection circuit 24 receives these signals, selects the optimal aperture, and estimates the halftone image. It will be output as a value.

As described above, according to the present invention, since a halftone image can be estimated from a binary image, image processing such as enlargement/reduction and filtering can be performed at the halftone level, and a high-quality image can be obtained. Further, even when various image processing is performed, it is possible to store the data in the memory as binary data, thereby saving memory space.

In the above description, an example is taken in which the number of white pixels within an aperture is counted to estimate a halftone image. However, the present invention is not limited to this, and any method may be used as long as it estimates a halftone image based on the ratio of the white area to the black area within the aperture. In the above explanation, 1
Although halftones are obtained by scanning pixel by pixel, the present invention is not limited to this, and it is also possible to scan two or more pixels at a time. Further, in the above description, an example is given in which there are seven types of openings, but the present invention is not limited to this, and any type may be used. Further, the size of the opening is not limited to the illustrated one, and any size can be used. Furthermore, image data does not need to be limited to binary conversion, and can be processed into ternarization, quaternary conversion, or the like.

(Effects of the Invention) As explained in detail above, according to the present invention,
By using a plurality of apertures for one pixel to obtain estimated values for each, and selecting one of these estimated values that satisfies a predetermined judgment condition as the halftone image estimated value for that pixel, an image is generated. An image processing device with good reproducibility can be realized.

[Brief explanation of drawings]

FIG. 1 is a configuration block diagram showing an embodiment of the method of the present invention, FIG. 2 is a diagram showing a specific configuration example of a halftone image estimation circuit, and FIGS. 3 and 4 are timing charts showing the operation of each part. , FIG. 5 is a flowchart showing an example of a halftone image estimation method, FIG. 6 is a diagram showing binary images and the types of apertures, FIG. 7 is a diagram showing the selection order of apertures, and FIG. 8 is a diagram showing the selection order of apertures. An explanatory diagram of aperture selection, FIGS. 9 to 15 are diagrams showing a specific configuration example of a halftone image estimation circuit, FIG. 16 is a diagram showing a density pattern, and FIG. 17 is a diagram showing the address and data of the density pattern ROM. A diagram showing the relationship, FIG. 18, is a diagram showing the conventional binarization method. 1... Image reading device, 2... Halftone image restoration circuit,
3... Image processing circuit, 4... Binarization circuit, 5... Recording device, 6... Image memory unit, 20, 22... Select circuit, 21... Line memory section, 23... Halftone estimation section, 24... Selection circuit, 25 ...Timing generation circuit, 30...Shift register, 31, 32...Counter, 33...Latch, 34...Subtractor, 35...Adder, 36...Multiplier, 37...Density pattern ROM,
38...Judgment circuit, _L1 to _L9 ...Line memory, _LA1 to
LA ₉ …Ratsuchi.

Claims (1)

[Claims] 1. Within a binary image consisting of white pixels and black pixels, the number of apertures corresponding to the number of rows of the maximum aperture among the plurality of types of apertures set for each pixel of the halftone image to be estimated. a line memory provided; a first select circuit that receives binary data regarding the binary image and sends the binary data to the corresponding line memory; a second select circuit that selects a white pixel in each aperture; and a second select circuit that stores the binary data selected by the second select circuit in a shift register, takes out the binary data of a predetermined latch of the shift register, and selects a white pixel in each aperture. The number of pixels or the number of black pixels is calculated, and the halftone image estimated value for each aperture is calculated, and the counted value is re-binarized using a dither matrix corresponding to the size of the aperture concerned, and the re-binary image is a halftone image estimation unit that compares the original binary image with the original binary image; and a halftone image estimation unit that compares the binary image with the original two
By comparison with the value image, if the two match at any aperture, the halftone image estimate at the larger aperture is selected as the final halftone image estimate at the corresponding pixel, and at either aperture. a selection circuit that selects the halftone image estimate value at the minimum aperture as the final halftone image estimate value for the corresponding pixel if the two do not match;
An image processing device comprising: a timing generation circuit that outputs a timing signal for controlling the operations of the selection circuit, the halftone image estimator, and the selection circuit;