JPH0227219U - - Google Patents

Info

Publication number
JPH0227219U
JPH0227219U JP10309088U JP10309088U JPH0227219U JP H0227219 U JPH0227219 U JP H0227219U JP 10309088 U JP10309088 U JP 10309088U JP 10309088 U JP10309088 U JP 10309088U JP H0227219 U JPH0227219 U JP H0227219U
Authority
JP
Japan
Prior art keywords
circuit
digital signal
reset
signal
microcomputer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10309088U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10309088U priority Critical patent/JPH0227219U/ja
Publication of JPH0227219U publication Critical patent/JPH0227219U/ja
Pending legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of drawings]

図は本考案の実施例を示すもので、第1図は回
路図、第2図はマイクロコンピユータによる出力
ポートPへのデジタル信号の出力制御を説明す
るための流れ図である。 10……無安定マルチ回路、16……マイクロ
コンピユータ、25……NPN形トランジスタ、
29……微分回路。
The figures show an embodiment of the present invention; FIG. 1 is a circuit diagram, and FIG. 2 is a flowchart for explaining output control of a digital signal to output port P2 by a microcomputer. 10... Astable multi-circuit, 16... Microcomputer, 25... NPN transistor,
29... Differential circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] プログラム制御の正常時一定周期のデジタル信
号を出力し、迷走時デジタル信号の出力を停止す
るマイクロコンピユータの出力ポートと、この出
力ポートからの信号を微分する微分回路と、この
微分回路出力に応動するトランジスタと、このト
ランジスタのオフ時動作を開始し、そのオフ動作
が少なくとも前記デジタル信号の周期を越える一
定時間以上継続すると前記マイクロコンピユータ
のリセツト端子にリセツト信号を供給する無安定
マルチ回路からなることを特徴とするマイクロコ
ンピユータの迷走リセツト回路。
An output port of a microcomputer that outputs a digital signal of a constant period when program control is normal and stops outputting the digital signal when it strays, a differentiation circuit that differentiates the signal from this output port, and a differential circuit that responds to the output of this differentiation circuit. A transistor, and an astable multi-circuit that starts the off-state operation of the transistor and supplies a reset signal to the reset terminal of the microcomputer when the off-state operation continues for at least a certain period of time exceeding the period of the digital signal. Features a stray reset circuit for microcomputers.
JP10309088U 1988-08-03 1988-08-03 Pending JPH0227219U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10309088U JPH0227219U (en) 1988-08-03 1988-08-03

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10309088U JPH0227219U (en) 1988-08-03 1988-08-03

Publications (1)

Publication Number Publication Date
JPH0227219U true JPH0227219U (en) 1990-02-22

Family

ID=31333597

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10309088U Pending JPH0227219U (en) 1988-08-03 1988-08-03

Country Status (1)

Country Link
JP (1) JPH0227219U (en)

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