JPH02270377A - Switching element - Google Patents

Switching element

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Publication number
JPH02270377A
JPH02270377A JP9108889A JP9108889A JPH02270377A JP H02270377 A JPH02270377 A JP H02270377A JP 9108889 A JP9108889 A JP 9108889A JP 9108889 A JP9108889 A JP 9108889A JP H02270377 A JPH02270377 A JP H02270377A
Authority
JP
Japan
Prior art keywords
voltage
drain
mosfet
igbt
source
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9108889A
Other languages
Japanese (ja)
Other versions
JP2550700B2 (en
Inventor
Yasukazu Seki
康和 関
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP1091088A priority Critical patent/JP2550700B2/en
Publication of JPH02270377A publication Critical patent/JPH02270377A/en
Application granted granted Critical
Publication of JP2550700B2 publication Critical patent/JP2550700B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To obtain a switching element which is small in ON-voltage and operable even at a voltage of 0.7V or below between a drain and a source by a method wherein the switching element is composed of a MOSFET and an IGBT connected in parallel. CONSTITUTION:A MOSFET 2 and an IGBT 3 are connected together in parallel to constitute a switching element of this design. For instance, the MOSFET 2 and the IGBT 3 are built in an integral structure on a P-type silicon substrate, and a source electrode 7, a drain electrode 10, and a gate electrode 13 of the MOSFET 2 are commonly connected with a source electrode 17, a drain electrode 20, and a gate electrode 23 of the IGBT 3 respectively. In an element constituted as above, when the voltage between the drain and source is 0.7V or lower, the MOSFET 2 operates and a drain current flows conforming a voltage-current characteristic Z of the MOSFET 2. When the voltage between the drain and source is 0.7V or above, both the MOSFET 2 and the IGBT 3 operate and a drain current X flows conforming the sum of the voltage-current characteristic curves Z and Y of the MOSFET 2 and the IGBT 3.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はスイン)ング電源等に・使用して好適なスイッ
チング素子に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a switching element suitable for use in swing power supplies and the like.

〔従来の技術〕[Conventional technology]

従来、スイッチング素子として、絶縁ゲート凰電界効果
トランジスタ、いわゆるMOSFETや、絶縁ゲート型
バイポーラトランジスタ、いわゆるIGBTが知られて
いる。
Conventionally, as switching elements, insulated gate field effect transistors, so-called MOSFETs, and insulated gate bipolar transistors, so-called IGBTs are known.

ここに、IGBTは、第3因に示すように−PNダイオ
ードの順方向特性と同様の電圧−電流特性を有している
。即ち、ゲートを開いたとしても、PN接合のビルトイ
ンポテンシャルのために、ドレイン・ソース間電圧が0
.7(V)以下ではドレイン電流は流れないが、ビルト
インポテンシャル以上の電圧を印加すると伝導度変調を
生じ、急激に電流が流れ始めるという特性を有している
Here, as shown in the third factor, the IGBT has voltage-current characteristics similar to the forward characteristics of a -PN diode. In other words, even if the gate is opened, the drain-source voltage is 0 due to the built-in potential of the PN junction.
.. At 7 (V) or less, no drain current flows, but when a voltage higher than the built-in potential is applied, conductivity modulation occurs and the current suddenly begins to flow.

これに対して、MOS FETは、第4図に示すように
、ゲートを開けば、ドレイン・ソース間電圧が0.7(
V)以下でありてもドレイン電流は流れるが、ドレイン
電流が流れ出しても、伝導度変調を生じないので、オン
電圧はIGBTと比軟すると小さい。
On the other hand, as shown in Figure 4, in a MOS FET, when the gate is opened, the drain-source voltage decreases to 0.7 (
Although the drain current flows even if the voltage is below V), conductivity modulation does not occur even if the drain current starts flowing, so the on-voltage is small compared to that of an IGBT.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

以上のように、IGBTには、オン電圧が小さいという
利点があるものの、ドレイン・ソース間電圧が0.7(
V)以下では動作しないという欠点があり、他方、MO
SFETには、ドレイン−ソー2間電圧が0.7(V)
以下でも動作するという利点はあるものの、オン電圧が
大きいという欠点がある。
As mentioned above, although IGBTs have the advantage of having a small on-state voltage, the drain-source voltage is 0.7 (
V) has the disadvantage that it does not work below, and on the other hand, MO
For SFET, the voltage between drain and source 2 is 0.7 (V)
Although it has the advantage of being able to operate even below this level, it has the disadvantage of having a large on-state voltage.

このため、それぞれその用途が限定されてしまうという
問題点があった。
For this reason, there was a problem in that the uses of each of them were limited.

本発明は、かかる点に鑑み、オン電圧が小さく、且つ、
0.7(V)以下のドレイン働ソース間電圧でも動作す
るようにしたスイッチング素子を提供することを目的と
する。
In view of these points, the present invention has a small on-voltage, and
It is an object of the present invention to provide a switching element that can operate even at a drain-to-source voltage of 0.7 (V) or less.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のスイッチング素子は、MOS FET  と、
IGBTとを並列接続したものである。
The switching element of the present invention includes a MOS FET,
IGBTs are connected in parallel.

〔作用〕[Effect]

ドレイン・ソース間電圧が0.7(V)以下の場合にお
いては、MOSFETが動作し、MOS  FETの電
圧−電流特性に従ったドレイン電流が流れる。
When the drain-source voltage is 0.7 (V) or less, the MOSFET operates and a drain current flows according to the voltage-current characteristics of the MOSFET.

また、ドレイン・ソース間電圧が0.7(V)以上の場
合には、MOSFET及びIGBTの両者が動作し、こ
れらMOSFET及びIGBTにおいて、それぞれMO
SFET及びIGBTの電圧−電流特性に従ったドレイ
ン電流が流れる。この結果、本発明のオン電圧は、MO
SFET及びIGBTのオン電圧に比較して小さくなる
In addition, when the drain-source voltage is 0.7 (V) or more, both the MOSFET and IGBT operate, and in these MOSFET and IGBT, each MOSFET and IGBT operate.
A drain current flows according to the voltage-current characteristics of the SFET and IGBT. As a result, the on-voltage of the present invention is MO
It is smaller than the on-voltage of SFET and IGBT.

〔実施例〕〔Example〕

以下、l!1図及び纂2図を参照して、本発明の一実施
例につき説明する。
Below, l! An embodiment of the present invention will be described with reference to FIG. 1 and FIG. 2.

第1図は本発明の一実施例の要部を示す断面図であうて
、本実施例のスイッチング素子は、P盤シリコン基板l
を基体とし、MOS FET 2とIGBT3とを一髪
して作り込み、これらを並列接続して構成されている。
FIG. 1 is a sectional view showing a main part of an embodiment of the present invention, in which the switching element of this embodiment is mounted on a P-board silicon substrate.
MOS FET 2 and IGBT 3 are built into the base, and these are connected in parallel.

ここに、4はP型シリコン基板1上に成長させたN層、
5は8層4の表面側に選択的に形成されたP層、6は2
層5の表面側に形成されたN 層からなるソース領域で
あって、このソース領域6には、アルミニウムからなる
ソース電極7がオーミックに接続されている。なお、8
はPSG膜である。
Here, 4 is an N layer grown on the P-type silicon substrate 1;
5 is a P layer selectively formed on the surface side of 8 layer 4, 6 is 2
A source region 6 is made of an N layer formed on the surface side of layer 5, and a source electrode 7 made of aluminum is ohmically connected to this source region 6. In addition, 8
is a PSG film.

また、9はN 層からなるドレイン領域であって、この
ドレイン領域9には、アルミニウムからなるドレイン電
極10がオーミックに接続されている。
Further, 9 is a drain region made of an N layer, and a drain electrode 10 made of aluminum is ohmically connected to this drain region 9.

また、11はゲート絶縁膜、12はポリシリコンからな
るゲート電極でありで、このポリシリコンからなるゲー
ト電極12にはアルミニウムからなるゲート電極13が
積層されている。
Further, 11 is a gate insulating film, 12 is a gate electrode made of polysilicon, and a gate electrode 13 made of aluminum is laminated on this gate electrode 12 made of polysilicon.

また、14は素子分離帯をなすP層、 15は8層4の
表面側に選択的に形成されたP層、16は8層4の表面
側に形成されたN層であって、これら2層15及び8層
16には、アルミニウムからなるソース電極17がオー
ミックに接続されている。
Further, 14 is a P layer forming an element isolation band, 15 is a P layer selectively formed on the surface side of 8 layers 4, and 16 is an N layer formed on the surface side of 8 layers 4. A source electrode 17 made of aluminum is ohmically connected to the layers 15 and 8 layers 16.

また、 18は8層4の表面側に選択的に形成されたN
層、19は8層18の狭面側に選択的に形成されたP層
であって、この2層19には、アルミニウムからなるド
レイン電極頭がオーミックに接続されている。
In addition, 18 is N selectively formed on the surface side of the 8 layer 4.
Layer 19 is a P layer selectively formed on the narrow side of eight layers 18, and a drain electrode head made of aluminum is ohmically connected to these two layers 19.

また、21はゲート酸化膜、nはポリシリコンからなる
ゲート電極でありて、このゲート電極nにはアルミニウ
ムからなるゲート電極器が積層されている。
Further, 21 is a gate oxide film, n is a gate electrode made of polysilicon, and a gate electrode device made of aluminum is laminated on this gate electrode n.

ここに、MOSFET2のソース電極7、ドレイン電極
10及びゲート電極13は、それぞれIGBT3のソー
ス電極17、ドレイン電極□□□及びゲート電極器と共
通接続されている。
Here, the source electrode 7, drain electrode 10, and gate electrode 13 of the MOSFET 2 are commonly connected to the source electrode 17, the drain electrode □□□, and the gate electrode device of the IGBT 3, respectively.

かかる本実施例においては、第2図に破線Xで示すよう
な電圧−電流特性を得ることができる。
In this embodiment, voltage-current characteristics as shown by the broken line X in FIG. 2 can be obtained.

なセ、この第2図において、実11YはIGBT3の電
圧−電流特性、実憑zはMOS FET2の電圧−電流
特性である。
Incidentally, in this FIG. 2, the symbol 11Y is the voltage-current characteristic of the IGBT 3, and the symbol z is the voltage-current characteristic of the MOS FET 2.

即ち、ドレイン・ソース間電圧が0.7(V)以下の場
合においては、MOSFET2が動作し、MOSFET
2の電圧−電流特性に従ったドレイン電流が流れる。
That is, when the drain-source voltage is 0.7 (V) or less, MOSFET2 operates and the MOSFET
A drain current flows according to the voltage-current characteristics of No. 2.

また、ドレイン・ソース間電圧が0.7(V)以上の場
合には、MOS  FET2及びIGBT3の両者が動
作し、これらMOS FET2及びIGBT3において
、それぞれMOS FET2及びI GBT 3の電圧
−電流特性に従ったドレイン電流が流れる。この結果、
本実施例のオン電圧は、MOS FET2及びIGBT
3のオン電圧に比較して小さくなる。
In addition, when the drain-source voltage is 0.7 (V) or more, both MOS FET2 and IGBT3 operate, and the voltage-current characteristics of MOS FET2 and IGBT3 are changed in these MOS FET2 and IGBT3, respectively. A corresponding drain current flows. As a result,
The on-voltage of this example is MOS FET2 and IGBT
It is smaller than the on-voltage of No. 3.

〔発明の効果〕〔Effect of the invention〕

本発明においては、MOSFETとIGBTとを並列接
続させているので、ドレイン・ソース間電圧が0.7(
V)以下でも動作し、且つ、オン電圧がMOS FET
及びIGBTよりも小さくなる。したがって、MOSF
ETやIGBTのようには用途範囲が限定されず、広い
範囲に使用することができる。
In the present invention, since the MOSFET and IGBT are connected in parallel, the drain-source voltage is 0.7 (
MOS FET that operates even below V) and has an on-voltage of
and smaller than IGBT. Therefore, MOSF
Unlike ET and IGBT, the range of applications is not limited, and it can be used in a wide range of applications.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例の要部を示す断面図、第2図
は第1図例の電圧−電流特性図、第3図はIGBTの電
圧−電流特性図、fJ4図はMOSFETの電圧−電流
特性図である。 MOSFET          IGBTl シリコ
ン基板               13ゲート電極
(アルミニウム)2 MOSFET         
    14 P+層(素子分離帯)3 IGBT  
             15 P層4N層    
           16N1層第1図 第2図 Q、7 (V)      電圧 第3図 0.7 (V)      電圧 第4図
Fig. 1 is a sectional view showing the main part of an embodiment of the present invention, Fig. 2 is a voltage-current characteristic diagram of the example shown in Fig. 1, Fig. 3 is a voltage-current characteristic diagram of IGBT, and fJ4 diagram is of a MOSFET. It is a voltage-current characteristic diagram. MOSFET IGBTl Silicon substrate 13 Gate electrode (aluminum) 2 MOSFET
14 P+ layer (element isolation band) 3 IGBT
15 P layer 4N layer
16N1 layer Fig. 1 Fig. 2 Q, 7 (V) Voltage Fig. 3 0.7 (V) Voltage Fig. 4

Claims (1)

【特許請求の範囲】[Claims] MOSFETと、IGBTとを並列接続したことを特徴
とするスイッチング素子。
A switching element characterized by a MOSFET and an IGBT connected in parallel.
JP1091088A 1989-04-11 1989-04-11 Switching element Expired - Lifetime JP2550700B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1091088A JP2550700B2 (en) 1989-04-11 1989-04-11 Switching element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1091088A JP2550700B2 (en) 1989-04-11 1989-04-11 Switching element

Publications (2)

Publication Number Publication Date
JPH02270377A true JPH02270377A (en) 1990-11-05
JP2550700B2 JP2550700B2 (en) 1996-11-06

Family

ID=14016766

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1091088A Expired - Lifetime JP2550700B2 (en) 1989-04-11 1989-04-11 Switching element

Country Status (1)

Country Link
JP (1) JP2550700B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007318062A (en) * 2006-04-27 2007-12-06 Matsushita Electric Ind Co Ltd High withstand voltage semiconductor switching device
JP2011119542A (en) * 2009-12-04 2011-06-16 Fuji Electric Systems Co Ltd Semiconductor device for internal combustion engine igniter

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62124764A (en) * 1985-11-25 1987-06-06 Matsushita Electric Works Ltd Semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62124764A (en) * 1985-11-25 1987-06-06 Matsushita Electric Works Ltd Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007318062A (en) * 2006-04-27 2007-12-06 Matsushita Electric Ind Co Ltd High withstand voltage semiconductor switching device
JP2011119542A (en) * 2009-12-04 2011-06-16 Fuji Electric Systems Co Ltd Semiconductor device for internal combustion engine igniter

Also Published As

Publication number Publication date
JP2550700B2 (en) 1996-11-06

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