JPH0226761B2 - - Google Patents
Info
- Publication number
- JPH0226761B2 JPH0226761B2 JP58009748A JP974883A JPH0226761B2 JP H0226761 B2 JPH0226761 B2 JP H0226761B2 JP 58009748 A JP58009748 A JP 58009748A JP 974883 A JP974883 A JP 974883A JP H0226761 B2 JPH0226761 B2 JP H0226761B2
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor
- ohmic electrode
- electrode
- central region
- present
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004065 semiconductor Substances 0.000 claims description 33
- 239000000919 ceramic Substances 0.000 claims description 6
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 12
- 238000000034 method Methods 0.000 description 7
- 229910052759 nickel Inorganic materials 0.000 description 5
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000007747 plating Methods 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 239000004332 silver Substances 0.000 description 4
- 238000005336 cracking Methods 0.000 description 3
- 230000008646 thermal stress Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 229910052763 palladium Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- JRPBQTZRNDNNOP-UHFFFAOYSA-N barium titanate Chemical compound [Ba+2].[Ba+2].[O-][Ti]([O-])([O-])[O-] JRPBQTZRNDNNOP-UHFFFAOYSA-N 0.000 description 1
- 229910002113 barium titanate Inorganic materials 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000000873 masking effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052573 porcelain Inorganic materials 0.000 description 1
- 238000007751 thermal spraying Methods 0.000 description 1
Landscapes
- Compositions Of Oxide Ceramics (AREA)
- Thermistors And Varistors (AREA)
Description
【発明の詳細な説明】
本発明は、加熱装置に用いて好都合な正特性磁
器半導体素子に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a positive characteristic ceramic semiconductor device conveniently used in a heating device.
従来のものは、正特性磁器半導体の相対向した
面に電極を付与した構造であり、該面の全域ある
いはその面の中央領域を上記電極が占めているの
が一般的である。 The conventional type has a structure in which electrodes are provided on opposite surfaces of a PTC ceramic semiconductor, and the electrodes generally occupy the entire area of the surfaces or the central region of the surfaces.
しかしながら、かかる従来例のものによれば、
上記半導体の形状が大型化になつたときには、通
電時には正特性磁器半導体に熱分布の不均一が生
じるために、熱応力が生じてしまい、この熱応力
の作用で半導体自身に割れを生じるという不具合
がある。 However, according to such conventional examples,
When the shape of the semiconductor described above becomes larger, thermal stress is generated due to non-uniform heat distribution in the PTC porcelain semiconductor when electricity is applied, and the semiconductor itself cracks due to the effect of this thermal stress. There is.
そこで、本発明者は鋭意研究の結果、半導体の
相対向した両面に各面の中央領域を除いて電極を
付与することにより、半導体中央領域での過大な
熱の発生を防いで半導体の熱分布を均一にし、熱
応力を緩和して上記の割れを防ぐようにしたもの
である。 Therefore, as a result of intensive research, the inventor of the present invention has determined that by providing electrodes on both opposing surfaces of a semiconductor, except for the central region of each surface, the generation of excessive heat in the central region of the semiconductor can be prevented and the heat distribution of the semiconductor can be improved. The structure is made uniform and reduces thermal stress to prevent the above-mentioned cracks.
以下本発明を具体的実施例により説明する。第
１図ａ，ｂにおいて、１はチタン酸バリウムを主
成分とする公知組成の正特性磁器半導体であり、
板状の形状を有している。この半導体１の相対向
する面には、その中央部領域を除いて環状にオー
ミツク電極２が付与してある。 The present invention will be explained below using specific examples. In FIGS. 1a and 1b, 1 is a positive characteristic ceramic semiconductor of a known composition containing barium titanate as a main component,
It has a plate-like shape. An ohmic electrode 2 is provided on opposing surfaces of the semiconductor 1 in a ring shape except for the central region thereof.
この電極２は無電解ニツケルメツキで例えば形
成してあり、半導体１の全面領域にニツケルメツ
キを施した後、エツチングにより不必要な部分を
除くことで電極２の形状が得られる。 This electrode 2 is formed, for example, by electroless nickel plating, and the shape of the electrode 2 is obtained by applying nickel plating to the entire surface of the semiconductor 1 and then removing unnecessary portions by etching.
３はカバー電極であり、この電極３は上記オー
ミツク電極２の全体を覆うように半導体１の両面
に形成してある。このカバー電極３は、例えば銀
ペーストを塗布、焼付けることによつて得られる
もので、非オーミツクである。 Reference numeral 3 denotes a cover electrode, which is formed on both sides of the semiconductor 1 so as to cover the entirety of the ohmic electrode 2. This cover electrode 3 is obtained by applying and baking silver paste, for example, and is non-ohmic.
第２図ａ，ｂは従来構造を示すもので、これは
半導体１の略全域に、無電解ニツケルメツキで形
成したオーミツク電極２が付与してあり、かつ該
オーミツク電極２を覆うように銀ペーストの塗
布、焼付けによる非オーミツクなカバー電極３が
形成してある。 Figures 2a and 2b show a conventional structure, in which an ohmic electrode 2 formed by electroless nickel plating is provided over almost the entire area of the semiconductor 1, and a silver paste is applied to cover the ohmic electrode 2. A non-ohmic cover electrode 3 is formed by coating and baking.
次に、第１図ａ，ｂの本発明実施例と、第２図
ａ，ｂの従来例との性能比較実験について説明す
る。第３図ａ，ｂは各々本発明実施例、従来例の
試料を説明するもので、各図中の１５，２８，３
０は長さ寸法（単位；mm）を表わしている。な
お、半導体１の肉厚は各々1.1mmである。また、
オーミツク電極２の材質はニツケル、カバー電極
３の材質は銀であり、その形成方法は上述したと
おりである。 Next, a performance comparison experiment between the embodiment of the present invention shown in FIGS. 1A and 1B and the conventional example shown in FIGS. 2A and 2B will be described. Figures 3a and 3b illustrate samples of the present invention example and conventional example, respectively, and 15, 28, 3 in each figure.
0 represents the length dimension (unit: mm). Note that the thickness of each semiconductor 1 is 1.1 mm. Also,
The material of the ohmic electrode 2 is nickel, and the material of the cover electrode 3 is silver, and the method of forming them is as described above.
第３図ｃから明白なように、従来例イのものは
印加電圧20Vあたりから半導体に割れが発生して
いる。これに対し、本実施例ロでは約35Vで割れ
が発生している。従つて、同一印加電圧では本実
施例のものは割れを発生しないことがわかる。ま
た、第３図ｃからわかるごとく、半導体に対する
印加電圧を上げても本実施例のものは割れ発生が
低い。 As is clear from FIG. 3c, in conventional example A, cracks occur in the semiconductor at an applied voltage of around 20V. On the other hand, in Example B, cracking occurred at about 35V. Therefore, it can be seen that cracks do not occur in this example at the same applied voltage. Moreover, as can be seen from FIG. 3c, even if the voltage applied to the semiconductor is increased, the occurrence of cracking in this example is low.
第４図ａ，ｂおよび第５図ａ，ｂは本発明の他
の実施例を示している。 4a, b and 5 a, b show other embodiments of the invention.
なお、本発明は上記した実施例に限定されず、
以下のごとく種々の変形が可能である。 Note that the present invention is not limited to the above-mentioned embodiments,
Various modifications are possible as described below.
(1) 半導体１にオーミツク電極単独、あるいは非
オーミツク電極単独を形成してもよい。この場
合、これら電極は、半導体１の中央領域を除い
て該半導体１に付与することは勿論である。な
お、前述の第１図の実施例では非オーミツク電
極３が半導体１の中央領域までも付与してある
が、この第１図の実施例のようにオーミツク電
極と非オーミツク電極との組合せでは電流のほ
とんど全てがオーミツク電極に流れるため、非
オーミツク電極を半導体の中央領域に付与して
も差支えない。つまり、本発明では半導体に電
流を流すための電極を半導体の中央領域を除い
て該半導体に付与すればよいのである。この非
オーミツク電極の材質としては銀、金、パラジ
ウム、銅などがあり、これらを無電解メツキ、
印刷焼付、溶射などの方法で付与すればよい。(1) An ohmic electrode or a non-ohmic electrode may be formed on the semiconductor 1. In this case, these electrodes are of course applied to the semiconductor 1 except for the central region of the semiconductor 1. In the embodiment shown in FIG. 1, the non-ohmic electrode 3 is provided even in the central region of the semiconductor 1, but in the combination of an ohmic electrode and a non-ohmic electrode as in the embodiment shown in FIG. Since almost all of the current flows to the ohmic electrode, it is acceptable to apply a non-ohmic electrode to the central region of the semiconductor. In other words, in the present invention, it is sufficient to provide the semiconductor with an electrode for passing a current through the semiconductor except for the central region of the semiconductor. Materials for this non-ohmic electrode include silver, gold, palladium, copper, etc., and these can be made by electroless plating,
It may be applied by printing, baking, thermal spraying, or other methods.
(2) オーミツク電極２の材質としては、ニツケル
の他にアルミニウム、スズなどがある。これら
の付与方法は上記(1)の非オーミツク電極の場合
と同じである。(2) Materials for the ohmic electrode 2 include aluminum, tin, etc. in addition to nickel. The method for applying these is the same as in the case of the non-ohmic electrode in (1) above.
(3) 半導体の中央部領域を除く部位に電極を付与
する方法としては、マスキング法でもよい。ま
た、活性化ペースト法でもよい。これは、パラ
ジウムを含む活性化ペーストを、電極を付与し
たい半導体部分に印刷焼付し、その後前記のご
とく無電解Niメツキをする方法である。これ
によると、ペースト焼付部分に短時間でNiが
メツキされる。(3) A masking method may be used as a method for applying electrodes to areas other than the central region of the semiconductor. Alternatively, an activated paste method may be used. This is a method in which an activation paste containing palladium is printed and baked onto a semiconductor portion where an electrode is to be provided, and then electroless Ni plating is applied as described above. According to this, the part where the paste is baked is plated with Ni in a short time.
(4) 半導体の一方の面にオーミツク電極、他方の
面に非オーミツク電極を付与、形成してもよ
い。(4) An ohmic electrode may be provided on one surface of the semiconductor, and a non-ohmic electrode may be provided on the other surface.
(5) 半導体の形状としては、前記第６図ａのよう
に部分的に貫通孔１ａを有しているものでもよ
く、あるいはハニカム形状であつてもよい。(5) As for the shape of the semiconductor, it may have a through hole 1a partially as shown in FIG. 6a, or it may have a honeycomb shape.
以上述べた如く、本発明によれば、半導体の割
れを防ぐことができ、その実用上の効果は大き
い。 As described above, according to the present invention, it is possible to prevent cracking of semiconductors, and the practical effects thereof are significant.
第１図ａ，ｂは本発明の実施例を示すもので、
第１図ａは平面図、第１図ｂは第１図ａのＡ−Ａ
断面図、第２図ａ，ｂは従来例を示すもので、第
２図ａは平面図、第２図ｂは第２図ａのＥ−Ｅ断
面図、第３図ａ，ｂ，ｃは本発明の効果の説明に
供する図であり、第３図ａ，ｂは試料を示す平面
図、第３図ｃは特性図、第４図ａ，ｂおよび第５
図ａ，ｂは本発明の他の実施例を示すもので、各
図ａは平面図、各図ｂは各図ａのＢ−Ｂ，Ｃ−
Ｃ，Ｄ−Ｄ断面図である。
１……半導体、２……電極。
Figures 1a and 1b show embodiments of the present invention,
Figure 1a is a plan view, Figure 1b is A-A in Figure 1a.
Cross-sectional views, Figures 2a and b show a conventional example, Figure 2a is a plan view, Figure 2b is a sectional view taken along line E-E in Figure 2a, and Figures 3a, b, and c are cross-sectional views. 3A and 3B are plan views showing the sample, FIG. 3C is a characteristic diagram, and FIGS.
Figures a and b show other embodiments of the present invention, where each figure a is a plan view and each figure b is a BB, C-
C, DD sectional view. 1...Semiconductor, 2...Electrode.
Claims (1)
向した面に電極を付与した正特性磁器半導体素子
であつて、 前記相対向した両面の電極を、該両面の中央領
域を除いて付与して成る正特性磁器半導体素子。[Scope of Claims] 1. A positive characteristic ceramic semiconductor element in which electrodes are provided on opposing surfaces of a ceramic semiconductor having positive resistance-temperature characteristics, wherein the electrodes on the opposing surfaces are connected to a central region of both surfaces. A positive characteristic ceramic semiconductor element provided with the exception of.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58009748A JPS59135703A (en) | 1983-01-24 | 1983-01-24 | Positive temperature coefficient porcelain semiconductor element |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58009748A JPS59135703A (en) | 1983-01-24 | 1983-01-24 | Positive temperature coefficient porcelain semiconductor element |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59135703A JPS59135703A (en) | 1984-08-04 |
| JPH0226761B2 true JPH0226761B2 (en) | 1990-06-12 |
Family
ID=11728920
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58009748A Granted JPS59135703A (en) | 1983-01-24 | 1983-01-24 | Positive temperature coefficient porcelain semiconductor element |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59135703A (en) |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10326554A (en) * | 1997-03-27 | 1998-12-08 | Ngk Insulators Ltd | Current limiting device and/or circuit breaker equipped with ptc element |
| JPH11135302A (en) * | 1997-10-27 | 1999-05-21 | Murata Mfg Co Ltd | Positive temperature coefficient thermistor |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS411170Y1 (en) * | 1964-09-28 | 1966-02-01 |
-
1983
- 1983-01-24 JP JP58009748A patent/JPS59135703A/en active Granted
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS411170Y1 (en) * | 1964-09-28 | 1966-02-01 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59135703A (en) | 1984-08-04 |
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