JPH0226162U - - Google Patents

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Publication number
JPH0226162U
JPH0226162U JP10159288U JP10159288U JPH0226162U JP H0226162 U JPH0226162 U JP H0226162U JP 10159288 U JP10159288 U JP 10159288U JP 10159288 U JP10159288 U JP 10159288U JP H0226162 U JPH0226162 U JP H0226162U
Authority
JP
Japan
Prior art keywords
signal
digital
input signal
analog
recording
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10159288U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10159288U priority Critical patent/JPH0226162U/ja
Publication of JPH0226162U publication Critical patent/JPH0226162U/ja
Pending legal-status Critical Current

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  • Signal Processing Not Specific To The Method Of Recording And Reproducing (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案による記録装置の第1実施例を
示すブロツク図、第2図は本考案の第2実施例を
示すブロツク図、第3図は本考案の第3実施例を
示すブロツク図、第4図は本考案の第4実施例を
示すブロツク図である。 1…デジタル/アナログ変換回路、2,4,1
2,20,23,33…ピーク検出回路、3,2
1…除算器、6,11,31…可変利得増幅回路
、10,30…比較器、22,32…アナログ/
デジタル変換回路、24…乗算器。
FIG. 1 is a block diagram showing a first embodiment of a recording apparatus according to the present invention, FIG. 2 is a block diagram showing a second embodiment of the present invention, and FIG. 3 is a block diagram showing a third embodiment of the present invention. , FIG. 4 is a block diagram showing a fourth embodiment of the present invention. 1...Digital/analog conversion circuit, 2, 4, 1
2, 20, 23, 33...Peak detection circuit, 3, 2
1...Divider, 6,11,31...Variable gain amplifier circuit, 10,30...Comparator, 22,32...Analog/
Digital conversion circuit, 24...multiplier.

Claims (1)

【実用新案登録請求の範囲】 (1) 同一内容のアナログ入力信号及びデジタル
入力信号が信号源装置から与えられ、上記アナロ
グ入力信号を可変利得増幅回路を介して増幅して
記録信号を作成する記録装置において、 上記アナログ入力信号及び上記デジタル入力信
号のレベルを比較手段によつて比較し、その比較
結果に基づいて上記可変利得増幅回路の利得を可
変するようにしたことを特徴とする記録装置。 (2) 上記デジタル入力信号をデジタル/アナロ
グ変換回路を介してアナログ信号に変換した後、
上記比較手段で上記アナログ入力信号と比較する
ようにしたことを特徴とする実用新案登録請求の
範囲第1項に記載の記録装置。 (3) 上記アナログ入力信号をアナログ/デジタ
ル変換回路を介してデジタル信号に変換した後、
上記比較手段で上記デジタル入力信号と比較する
と共に、上記記録信号をデジタル信号としたこと
を特徴とする実用新案登録請求の範囲第1項に記
載の記録装置。 (4) 同一内容のアナログ入力信号及びデジタル
入力信号が信号源装置から与えられ、上記アナロ
グ入力信号を可変利得増幅回路を介して増幅して
記録信号を作成する記録装置において、 上記記録信号及び上記デジタル入力信号のレベ
ルを比較手段によつて比較し、その比較結果に基
づいて上記可変利得増幅回路の利得を可変するよ
うにしたことを特徴とする記録装置。 (5) 上記デジタル入力信号をデジタル/アナロ
グ変換回路を介してアナログ信号に変換した後、
上記比較手段で上記記録信号と比較するようにし
たことを特徴とする実用新案登録請求の範囲第4
項に記載の記録装置。 (6) 上記記録信号をアナログ/デジタル変換回
路を介してデジタル信号に変換した後、上記比較
手段で上記デジタル入力信号と比較すると共に、
上記記録信号をデジタル信号としたことを特徴と
する実用新案登録請求の範囲第4項に記載の記録
装置。
[Claims for Utility Model Registration] (1) Recording in which an analog input signal and a digital input signal with the same content are given from a signal source device, and the analog input signal is amplified via a variable gain amplifier circuit to create a recording signal. A recording device, characterized in that the levels of the analog input signal and the digital input signal are compared by comparison means, and the gain of the variable gain amplifier circuit is varied based on the comparison result. (2) After converting the above digital input signal to an analog signal via a digital/analog conversion circuit,
2. The recording device according to claim 1, wherein the comparison means compares the analog input signal with the analog input signal. (3) After converting the above analog input signal to a digital signal via an analog/digital conversion circuit,
2. The recording device according to claim 1, wherein the comparing means compares the digital input signal and the recording signal is a digital signal. (4) In a recording device that receives an analog input signal and a digital input signal with the same content from a signal source device and amplifies the analog input signal through a variable gain amplifier circuit to create a recording signal, A recording apparatus characterized in that the levels of digital input signals are compared by a comparing means, and the gain of the variable gain amplifier circuit is varied based on the comparison result. (5) After converting the above digital input signal to an analog signal via the digital/analog conversion circuit,
Utility model registration claim 4, characterized in that the comparison means compares with the recorded signal.
Recording device as described in section. (6) After converting the recorded signal into a digital signal via the analog/digital conversion circuit, comparing it with the digital input signal by the comparing means,
The recording device according to claim 4, wherein the recording signal is a digital signal.
JP10159288U 1988-07-30 1988-07-30 Pending JPH0226162U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10159288U JPH0226162U (en) 1988-07-30 1988-07-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10159288U JPH0226162U (en) 1988-07-30 1988-07-30

Publications (1)

Publication Number Publication Date
JPH0226162U true JPH0226162U (en) 1990-02-21

Family

ID=31330728

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10159288U Pending JPH0226162U (en) 1988-07-30 1988-07-30

Country Status (1)

Country Link
JP (1) JPH0226162U (en)

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