JPH02256231A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH02256231A JPH02256231A JP7920689A JP7920689A JPH02256231A JP H02256231 A JPH02256231 A JP H02256231A JP 7920689 A JP7920689 A JP 7920689A JP 7920689 A JP7920689 A JP 7920689A JP H02256231 A JPH02256231 A JP H02256231A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- reaction
- deposited
- cathode
- metallic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 41
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 239000000758 substrate Substances 0.000 claims abstract description 35
- 229910052751 metal Inorganic materials 0.000 claims abstract description 28
- 239000002184 metal Substances 0.000 claims abstract description 27
- 238000006243 chemical reaction Methods 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims abstract description 12
- 239000012495 reaction gas Substances 0.000 claims abstract description 12
- 239000007789 gas Substances 0.000 claims abstract description 9
- 238000000151 deposition Methods 0.000 claims description 11
- 238000010349 cathodic reaction Methods 0.000 claims 1
- 230000008021 deposition Effects 0.000 abstract description 6
- 238000003487 electrochemical reaction Methods 0.000 abstract description 4
- 239000000463 material Substances 0.000 abstract description 4
- 238000007348 radical reaction Methods 0.000 abstract description 4
- 238000009713 electroplating Methods 0.000 abstract description 3
- 150000004696 coordination complex Chemical class 0.000 description 4
- 238000007796 conventional method Methods 0.000 description 3
- 150000002739 metals Chemical class 0.000 description 2
- 238000005979 thermal decomposition reaction Methods 0.000 description 2
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001259 photo etching Methods 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 239000012808 vapor phase Substances 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
この発明は半導体装置の製造方法に関し、特に金属の気
相において、半導体基板上に多数の金属を選択的に堆積
できる成膜技術に関するものである。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor device, and in particular to a film formation technique that can selectively deposit a large number of metals on a semiconductor substrate in a metal vapor phase. be.
第3図は半導体基板上に選択的に金属膜を堆積する従来
の方法を示す半導体装置の断面図である。FIG. 3 is a cross-sectional view of a semiconductor device showing a conventional method of selectively depositing a metal film on a semiconductor substrate.
図において、(1)は半導体基板、(2)は半導体基板
上に形成された誘電体膜、(9)は誘電体膜(2)の所
定部分に開口されたコンタクトホール、(イ)は半導体
基板(1)に熱を与えるサセプタ、(4)は反応ガス、
(イ)は熱分解された反応種あるいは反応ラジカル、(
ハ)は堆積された金属膜である。In the figure, (1) is a semiconductor substrate, (2) is a dielectric film formed on the semiconductor substrate, (9) is a contact hole opened in a predetermined part of the dielectric film (2), and (A) is a semiconductor substrate. A susceptor that applies heat to the substrate (1), (4) a reactive gas,
(a) is a thermally decomposed reactive species or reactive radical, (
C) is the deposited metal film.
次に動作について説明する。金属膜(ハ)は、サセプタ
(イ)から与えられた熱によって反応ガス(ホ)の熱分
解反応によって形成されるので、金属膜(ハ)の堆積は
半導体基板(1)の全面に行われる。したがってコンタ
クトホール(9)の穴埋めには後工程でフォトエツチン
グが必要になる。Next, the operation will be explained. The metal film (c) is formed by a thermal decomposition reaction of the reaction gas (e) by heat applied from the susceptor (a), so the metal film (c) is deposited on the entire surface of the semiconductor substrate (1). . Therefore, photo-etching is required in a subsequent process to fill the contact hole (9).
また反応を熱によらず、グロー放電などによるラジカル
反応を用いる場合もあるが、この場合も金属膜(財)の
堆積は半導体基板(1)全面に行われる。Further, the reaction may not be based on heat, but instead may use a radical reaction such as glow discharge, but in this case as well, the metal film is deposited over the entire surface of the semiconductor substrate (1).
例外としてタングステンなど極めて限定された材料でコ
ンタクトホール(9)へ選択的に堆積が行なわれる。As an exception, very specific materials such as tungsten are selectively deposited into the contact holes (9).
従来の半導体基板上に選択的に金属膜を堆積する方法は
以上のように行われているので、半導体基板は電気的に
浮いており、堆積反応は熱化学反応あるいはラジカル反
応であり、半導体基板上に選択的に堆積させることは困
難であった。The conventional method of selectively depositing a metal film on a semiconductor substrate is carried out as described above, so the semiconductor substrate is electrically floating and the deposition reaction is a thermochemical reaction or a radical reaction, and the semiconductor substrate It was difficult to deposit selectively on the top.
また、選択成長する材料はタングステンなど極めて限ら
れていた。更に堆積中、半導体基板は高温下あるいは放
電下にさらされることになり半導体素子へのダメージや
適用工程が限定されるなどの問題もあった。Furthermore, materials that can be selectively grown are extremely limited, such as tungsten. Furthermore, during deposition, the semiconductor substrate is exposed to high temperatures or discharge, which causes problems such as damage to semiconductor elements and limitations on the applicable process.
この発明は以上のような問題点を解消するためになされ
たもので多数の金属を選択的にダメージなしに低温で堆
積できる方法を提供することを目的とする。The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a method by which a large number of metals can be selectively deposited at low temperatures without damage.
この発明に係る金属膜の堆積方法は、堆積しようとする
半導体基板の導電性を有する部分の表面を所定の陰極電
位に保ち、正にイオン化した反応ガスとの間で電気化学
反応を起こさせるものである。The method for depositing a metal film according to the present invention maintains the surface of a conductive portion of a semiconductor substrate to be deposited at a predetermined cathode potential, and causes an electrochemical reaction with a positively ionized reaction gas. It is.
この発明における金属膜の堆積方法は、半導体基板上の
導電性を有する部分の表面に正にイオン化した反応ガス
との間で電気化学反応を起こさせることによって金属を
半導体基板の導電部分にのみ堆積させる。The method of depositing a metal film in this invention deposits metal only on the conductive portion of the semiconductor substrate by causing an electrochemical reaction with a positively ionized reactive gas on the surface of the conductive portion of the semiconductor substrate. let
以下、この発明の一実施例を図について説明する。第1
図は半導体基板上に選択的に金属膜を堆積する方法を示
す模式断面図である。An embodiment of the present invention will be described below with reference to the drawings. 1st
The figure is a schematic cross-sectional view showing a method of selectively depositing a metal film on a semiconductor substrate.
図において、(1)は半導体基板、(2)は半導体基板
(1)上に形成された誘電体膜、(9)は誘電体膜(2
)上に開口されたコンタクトホール、(3)は半導体基
板(1)を保持する陰極、(4)は陰極(3)と半導体
基板(1ンとの電気的な接続部分、(5)は陽極、(6
)は反応ガス、(7)は反応ガス(6)の中の、正にイ
オン化された金属元素又は金属錯体ガス、(8)は正に
イオン化された金属元素又は金属錯体ガス(7)が電気
化学反応によってコンタクトホール(9)部分にのみ堆
積した金属膜である。In the figure, (1) is a semiconductor substrate, (2) is a dielectric film formed on the semiconductor substrate (1), and (9) is a dielectric film (2).
), (3) is the cathode that holds the semiconductor substrate (1), (4) is the electrical connection between the cathode (3) and the semiconductor substrate (1), (5) is the anode , (6
) is the reaction gas, (7) is the positively ionized metal element or metal complex gas in the reaction gas (6), and (8) is the positively ionized metal element or metal complex gas (7) in the reaction gas (6). This is a metal film deposited only on the contact hole (9) by a chemical reaction.
第2図は、第1図に示す製造方法を実現するための反応
室の基本構成を示す断面側面図である。FIG. 2 is a cross-sectional side view showing the basic configuration of a reaction chamber for realizing the manufacturing method shown in FIG. 1.
図において、(1)〜(5)は第1図に示したものと同
等である。αυは反応室、(2)は反応室αυへ反応ガ
ス(6)を導く反応ガス導入口、時は排気口、0勇は陰
! (3)に陽極(5)に対して負の電位を与える電源
である。In the figure, (1) to (5) are equivalent to those shown in FIG. αυ is the reaction chamber, (2) is the reaction gas inlet that leads the reaction gas (6) to the reaction chamber αυ, time is the exhaust port, and 0 is the shade! (3) is a power source that applies a negative potential to the anode (5).
次に動作について説明する。Next, the operation will be explained.
陽極(5)に対して負の電位に保たれた陰極(3)上に
保持された半導体基板(1)は陰極と半導体基板との電
気的接続部分(4)によって上記と同様に陽極(5)に
対して負の電位になるため、反応ガス(6)のうち正に
イオン化された金属元素又は金属錯体ガス(7)は誘電
体膜(2)上に開口された導電性を有するコンタクトホ
ール(9)に電属めっきと同様の原理で選択的に金属膜
(3)として堆積し、導電性を有しない誘電体膜上には
堆積しない。The semiconductor substrate (1) held on the cathode (3) which is kept at a negative potential with respect to the anode (5) is connected to the anode (5) by the electrical connection part (4) between the cathode and the semiconductor substrate. ), the positively ionized metal element or metal complex gas (7) in the reaction gas (6) is transferred to a conductive contact hole opened on the dielectric film (2). (9) is selectively deposited as a metal film (3) using the same principle as electroplating, and is not deposited on a dielectric film that does not have conductivity.
以上のようにこの発明によれば、金属膜を堆積中の半導
体基板の部分を負の電位に保ち、電気化学反応を用いて
堆積を行うので電解めっきのように導電部分にのみ選択
的な堆積が行え・るため、コンタクトホール部分の穴埋
めが材料的な制約が少なく簡単に実現でき、従来の熱分
解反応やラジカル反応を用いないため、極めて低温で堆
積でき、半導体素子へのダメージの問題も回避できる効
果がある。As described above, according to the present invention, the part of the semiconductor substrate where the metal film is being deposited is kept at a negative potential, and the deposition is performed using an electrochemical reaction, so that the metal film can be selectively deposited only on the conductive part, like electrolytic plating. Because it can be performed, it is easy to fill contact holes with few material restrictions, and because it does not use conventional thermal decomposition reactions or radical reactions, it can be deposited at extremely low temperatures, and there is no problem of damage to semiconductor elements. There is an effect that can be avoided.
第1図は、この発明の一実施例による半導体基板上に選
択的に金属膜を堆積する方法を示す模式断面図、第2図
は第1図の製造方法を実現するための反応室の基本構成
を示ず断面側面図、第3図は従来の半導体基板上に選択
的に金属膜を堆積する方法を示す半導体装置の断面図で
ある。
図において、(1)は半導体基板、(2月よ誘電体膜、
(3)は陰極、(4)は陰極と半導体基板との電気的な
接続部分、(5)は陽極、(6月よ反応ガス、(7)は
正にイオン化された金属元素又は金属錯体ガス、(8)
は金属膜、(9)はコンタクトホール、Oυは反応室、
(6)は反応ガス導入口、α4は排気口、0弔は電源で
ある。
なお、図中、同一符号は同一、又は相当部分を示す。FIG. 1 is a schematic cross-sectional view showing a method for selectively depositing a metal film on a semiconductor substrate according to an embodiment of the present invention, and FIG. 2 is a basic reaction chamber for realizing the manufacturing method shown in FIG. FIG. 3 is a cross-sectional side view without showing the structure, and is a cross-sectional view of a semiconductor device showing a conventional method of selectively depositing a metal film on a semiconductor substrate. In the figure, (1) is a semiconductor substrate, (February dielectric film,
(3) is the cathode, (4) is the electrical connection between the cathode and the semiconductor substrate, (5) is the anode, (reactant gas, and (7) is the positively ionized metal element or metal complex gas. , (8)
is a metal film, (9) is a contact hole, Oυ is a reaction chamber,
(6) is a reaction gas inlet, α4 is an exhaust port, and 0 is a power source. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
る半導体基板を反応室に導入し、陰極に載置する工程と
、反応室を排気する工程と、半導体基板を陰極電位に保
持する工程と、イオン化された反応ガスを反応室に導入
する、あるいは反応ガスを反応室に導入し放電によって
イオン化する工程と、正にイオン化された金属あるいは
その錯体ガスを陰極電位に保持された半導体基板に導き
、陰極反応によって、半導体基板表面の導電部分にのみ
、金属を堆積する工程から成る半導体装置の製造方法。A step of introducing a semiconductor substrate formed by forming a dielectric film pattern on a conductive substrate into a reaction chamber and placing it on a cathode, a step of evacuating the reaction chamber, and a step of holding the semiconductor substrate at cathode potential. A step of introducing an ionized reaction gas into a reaction chamber, or a step of introducing a reaction gas into a reaction chamber and ionizing it by electric discharge, and a step of applying a positively ionized metal or its complex gas to a semiconductor substrate held at a cathode potential. A method for manufacturing a semiconductor device, which consists of a step of depositing metal only on conductive parts of the surface of a semiconductor substrate by a cathodic reaction.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7920689A JPH02256231A (en) | 1989-03-29 | 1989-03-29 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7920689A JPH02256231A (en) | 1989-03-29 | 1989-03-29 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH02256231A true JPH02256231A (en) | 1990-10-17 |
Family
ID=13683473
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7920689A Pending JPH02256231A (en) | 1989-03-29 | 1989-03-29 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH02256231A (en) |
-
1989
- 1989-03-29 JP JP7920689A patent/JPH02256231A/en active Pending
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