JPH02254974A - Rectifier circuit provided with power-factor improvement circuit - Google Patents

Abstract

PURPOSE:To make an output voltage constant within a wide range from a light load to a rated load by employing a chopper circuit including a power- factor improvement circuit. CONSTITUTION:Off-control means 14, 15 turn a switching means 8 off when the value of a current, conducted through the switching means 8, has exceeded a predetermined value and on-control means 16, 17, 18 turn the switching means 8 on after a delay time corresponding reversely to the value of the current, conducted through the switching means 8, whereby the delay time is lengthened upon a light load. According to this constitution, the period of ON/OFF of the switching means 8 is lengthened in a light load and the on-duty of the same becomes small. The period of ON/OFF is controlled in such a manner and, therefore, the duty is controlled even upon the light load, not capable of shortening the on-period of the switching means 8, and an output voltage may be controlled to a given value corresponding to a predetermined value especially within the range of the light load.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a rectifier circuit, and particularly to a rectifier circuit that improves the power factor by making the waveform of an AC input current sinusoidal.

(Prior art) In order to improve the power factor in a rectifier circuit that rectifies AC input and supplies it to a load, for example, in a capacitor input type rectifier circuit, the capacitance of a smoothing capacitor is used to suppress the DC voltage ripple value. must be increased, which increases the peak value (inrush current value) of the rectified current.

As a result, the power factor decreases and negative effects including the generation of harmonics appear.

Therefore, an alternative method has been proposed in which the pulsating current rectified by a rectifier circuit is switched by a chopper circuit (
JP-A-53-5755 and JP-B-60-4672), both basically perform PWM control on the chopper circuit so that the AC input current becomes a sine wave.

[Problem to be solved by the invention]

However, this method has a problem in that when the load changes over a wide range, the output voltage increases at light loads. The reason is that the transistors used in the chopper circuit, etc.
This is because the pulse width cannot be controlled below a certain value due to slow switching speed or the like.

An object of the present invention is to make the output voltage constant over a wide range from light loads to rated loads using a chopper circuit including a power factor correction circuit.

[Means to solve the problem]

In the present invention, a rectifying means (5) for rectifying the AC input (1)
, a smoothing capacitor (9), an inductance (6) inserted between the rectifying means (5) and the smoothing capacitor (9)
, a chopper circuit (8, 12, 13, 15, 19) including a switching means (8) for giving the output of the rectifying means (5) to the smoothing capacitor (9), and an on/off switch of the switching means (8). A power factor correction circuit (7,10°1
4 to 18), the power factor correction circuit (7, 10, 14 to 18) is connected to a secondary winding (7) wound in parallel to the inductance (6), and a switching means (8).
), the current detecting means (10) detects the current value flowing through the current detecting means (10), and the current detecting means (10) detects the current value flowing through the
) is the delay time (r o ) that corresponds inversely to the current value detected by
ON control means (16, 17, 18) which later turns on the switching means (8), and current detection means (10).
) turns off the switching means (8) when the current value detected by the switch exceeds a predetermined value.
5).

[Effect]

The off control means (14, 15) is connected to the switching means (8
) exceeds a predetermined value, the switching means (8) is turned off and the on control means (16, 17, 1
8) after a delay time (T o ) which corresponds inversely to the value of the current flowing through the switching means (8).
, the delay time (T o ) becomes longer when the load is low (the predetermined value is set low).

As a result, at low loads, the on/off period of the switching means (8) becomes longer and the on-duty becomes smaller. Since the on/off period is controlled in this way, the on-period of the switching means (8) is shortened so that the duty can be controlled even when the load is low, increasing the range of duty control and reducing the load. The output voltage can be controlled to a constant value corresponding to the predetermined value over a wide range, particularly in a low load range.

Other objects and features of the present invention will become apparent from the following description of embodiments with reference to the drawings.

〔Example〕

FIG. 1 shows an embodiment of the present invention. Inductance 6,
Switching element 8. Diode 20 and capacitor 9 form a step-up DC/DC converter circuit 22. 5 is a rectifying diode bridge. Inductances 2 and 3 and capacitor 4 constitute a noise cut filter 21 that prevents switching noise from flowing back into the power supply.

In the step-up DC/DC converter 22, when the switching element 8 is turned on, energy is stored in the inductance 6, and when the switching element 8 is turned off, energy is released and current flows to the load 11.

The switching element 8 is turned on when the flip-flop 17 is in the set state a (Q=H), and turned off when the flip-flop 17 is reset (Q=L). The power supply detector 10 detects the current flowing through the switching element 8, and when this current value reaches a threshold value corresponding to the desired inductance current peak value, the comparator 15 detects the current flowing through the flip-flop 1.
7 (turn off switching element 8).

The output voltage command value is generated by a voltage generator 12 made of a potentiometer. The control amplifier 13 generates a difference voltage between the voltage specifying the output voltage command value and the output voltage (load voltage).

A multiplier 14 multiplies the input voltage of the inductance 6 and the output voltage amplitude of the control amplifier 13 to generate the product as a threshold value (predetermined value: corresponding to the setting of the voltage generator 12).

When the switching element 8 is turned off, the inductance 6
causes current to flow through the diode 20 to the load 11. When the energy stored in the inductance 6 is exhausted, the current TL flowing through the inductance 6 becomes zero, and the voltage across the secondary inductance 7 becomes zero.

The voltage across the secondary inductance 7 is input to a voltage controlled delay circuit 18 . The voltage controlled delay circuit 18 is
The input signal is output after being delayed by a delay time T.

As shown in FIG. 2, this delay time To is a value that corresponds inversely to the current value of the switching element 8 (the value averaged by the low-pass filter 16) detected by the current detector IO. In other words, the voltage controlled delay circuit 18.

The input signal is output after a delay time TO which corresponds inversely to the current value of the switching element 8.

The flip-flop 17 is a voltage controlled delay circuit 18
It is reset at the falling edge of the output signal.

That is, after the output of the secondary inductance 7 falls to zero, it is set after TO, and its Q output is set to H, thereby turning on the switching element 8.

FIG. 3 shows the relationship between the collector/emitter voltage vc of the switching element 8 and the current value IL flowing through the inductance 6 when the delay time To is zero. In the case of zero, the switching element 8 is turned on again as soon as the current in the inductance 6 becomes zero.

In Fig. 4, when there is a certain value of delay time To,
As shown in FIG. 2, which shows the relationship between Vc4 and IL, when the delay time TD is increased as the output current decreases, the on/off period of the switching element 8 becomes longer by the increased amount, and the on-duty becomes smaller. Since the on/off period is controlled in this way, the switching means (8
) The duty is controlled even at low loads where the on-period of It becomes a constant value corresponding to the threshold value.

FIG. 5 shows the relationship between the output current I out and the output voltage Vout. In the conventional case where the delay time T0 is not introduced, the output voltage becomes higher than the desired value in the low load region as shown by the dotted line, but by introducing the delay time To as described above, the output voltage becomes higher than the desired value in the low load region The output voltage is also set to a desired value in this region.

〔Effect of the invention〕

As described above, according to the present invention, the off control means (14°15
) turns off the switching means (8) when the current value flowing through the switching means (8) exceeds a predetermined value, and the on control means (16, 17, 18) turns off the switching means (
Since the switching means (8) is turned on after a delay time (TO) that corresponds inversely to the current value flowing through the circuit (8), a low load (
When the predetermined value is set low), the delay time (T
o) becomes longer.

As a result, at low loads, the on/off period of the switching means (8) becomes longer and the on-duty becomes smaller. Since the on/off period is controlled in this way, the duty can be controlled even when the load is low and it is not possible to shorten the on period of the switching means (8), thereby expanding the range of duty control and reducing the load. The output voltage can be controlled to a constant value corresponding to the predetermined value over a wide range, particularly in a low load range.

[Brief explanation of drawings]

FIG. 1 is a block diagram of one embodiment of the present invention. Figure 2 is number 11! Voltage controlled delay circuit 1 shown in I
8 is a graph showing the relationship between the control voltage (output current I out) and the delay time To. 3 and 4 show the collector/emitter voltage vc! of the switching element 8 shown in FIG. 1. FIG. 3 is a time chart showing the relationship between the current IL of the inductance 6 and the current IL of the inductance 6. FIG. 3 shows the case when the delay time TO is zero, and the fourth Ys shows the case when the delay time J! The case where l T o has a certain value is shown below. FIG. 5 shows the step-up DC/DC converter 22 shown in FIG.
2 is a graph showing the relationship between the output current 1 out and the output voltage Vout, in which the solid line shows the output characteristics of the conductor shown in FIG. 1, and the broken line shows the output characteristics of the conventional one. 1: AC power supply 2, 3: Inductance 4: Capacitor 5: Diode bridge (rectifier) 6: Inductance (inductance) 7
: Secondary inductance (secondary winding) 8 Switching element (switching means) 9: Capacitor (smoothing capacitor) 10: Current detector (current detection means)

Claims (1)

[Claims] Includes a rectifying means for rectifying AC input, a smoothing capacitor, an inductance inserted between the rectifying means and the smoothing capacitor, and a switching means for applying the output of the rectifying means to the smoothing capacitor. A rectifier circuit comprising a chopper circuit and a power factor correction circuit that performs PWM control to turn on/off the switching means so that the AC input current becomes a sine wave, the power factor correction circuit being connected in parallel to the inductance. A wound secondary winding, a current detection means for detecting the current value flowing through the switching means, and a delay time that corresponds inversely to the current value detected by the current detection means from the fall of the voltage of the secondary winding. It is characterized by comprising an on control means that later turns on the switching means, and an off control means that turns off the switching means when the current value detected by the current detection means exceeds a predetermined value. Rectifier circuit with power factor correction circuit.