JPH02241066A - Semiconductor photodetector - Google Patents

Semiconductor photodetector

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Publication number
JPH02241066A
JPH02241066A JP1063216A JP6321689A JPH02241066A JP H02241066 A JPH02241066 A JP H02241066A JP 1063216 A JP1063216 A JP 1063216A JP 6321689 A JP6321689 A JP 6321689A JP H02241066 A JPH02241066 A JP H02241066A
Authority
JP
Japan
Prior art keywords
layer
type
layer thickness
face
type layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1063216A
Other languages
Japanese (ja)
Inventor
Mayumi Nomiyama
野見山 真弓
Akihiro Murata
明弘 村田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Electric Corp filed Critical Yokogawa Electric Corp
Priority to JP1063216A priority Critical patent/JPH02241066A/en
Publication of JPH02241066A publication Critical patent/JPH02241066A/en
Pending legal-status Critical Current

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  • Photometry And Measurement Of Optical Pulse Characteristics (AREA)
  • Light Receiving Elements (AREA)

Abstract

PURPOSE:To operate an Si PIN photodiode having a small dark current and high speed response of low cost type by etching necessary parts of front and rear faces of low concentration Si board having good crystallinity to form an I-type layer thickness. CONSTITUTION:A semiconductor photodetector for converting a light radiated from various types of light emitting elements into electric signals has an I-type layer thickness formed by etching necessary parts of front and rear faces of a low concentration Si board 10 having high crystallinity, N<+> type or P<+> type layers 12 formed at least on the I-type layer thickness of the rear face, P<+> type or N<+> type layer 13 formed on the at least I-type layer thickness of the front face to become a photodetecting face, electrodes 7, 4 and a reflection preventive film 6 formed on the layers 12, 13 formed thereon. For example, an etching mask 11 is formed on the necessary parts of the front and rear face so the board 10, and so anisotropically etched as to become the I-type layer thickness of tau = several 10mum. Thereafter, an N<+> layer 12 is formed on the rear face, a P<+> layer 13 and a guard ring 9 are formed on the front face to become a photodetecting face by ion implanting method, etc.

Description

【発明の詳細な説明】 〈産業上の利用分野〉 本発明は、光を電気信号に変換して検出する素子として
用いられる半導体光検出素子(半導体フォトセンサ)に
関するものである。
DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a semiconductor photodetection element (semiconductor photosensor) used as an element that converts light into an electrical signal and detects it.

〈従来の技術〉 光を電気信号に変換して検出する半導体光検出素子とし
ては、例えば光通信における光損失の測定や、光デイス
クシステム等に使用され半導体レーザーの特性評価等に
用いられているSLフォトダイオードが知られている。
<Prior art> Semiconductor photodetectors that convert light into electrical signals and detect them are used, for example, to measure optical loss in optical communications, to optical disk systems, and to evaluate the characteristics of semiconductor lasers. SL photodiodes are known.

このSjフォトダイオードにはPN型及びPIN型があ
り、PIN型としては第3図のようなものが従来知られ
ている。
There are two types of Sj photodiodes: a PN type and a PIN type, and the type shown in FIG. 3 is conventionally known as the PIN type.

これは高速応答を特徴としている。It is characterized by fast response.

第3図は従来のPIN型のSjフォトダイオードの構造
図である。
FIG. 3 is a structural diagram of a conventional PIN type Sj photodiode.

第3図において各部の符号と名称は以下のとおりである
In FIG. 3, the symbols and names of each part are as follows.

符号1は、高不純物濃度から成るN型Si基板(n”)
を示す、符号2は、1層を示す、符号3は、高濃度の2
層(P+)を示す、符号4及び7は、電極層(Alt極
)を示す、符号5は、を極層4上から取出された高バイ
アス電圧が印加される正電極(AIt極)を示す、符号
6は、酸化膜から成る反射防止膜を示す、符号8は、負
電極を示す、符号9は、表面リークを防止するために設
けられたガードリング(n+)を示す。
Reference numeral 1 indicates an N-type Si substrate (n'') consisting of a high impurity concentration.
2 indicates one layer, 3 indicates high concentration 2
The code 4 and 7 indicate the layer (P+), the code 4 and 7 indicate the electrode layer (Alt pole), and the code 5 indicates the positive electrode (AIt pole) to which the high bias voltage taken out from above the electrode layer 4 is applied. , numeral 6 indicates an antireflection film made of an oxide film, numeral 8 indicates a negative electrode, and numeral 9 indicates a guard ring (n+) provided to prevent surface leakage.

ここで、この種のPIN型のSiフォトダイオードは下
記のようにして製造される。
Here, this type of PIN type Si photodiode is manufactured as follows.

■:まず、N型Si基板1の表面上に、エピタキシャル
成長により必要な厚さだけ低不純物濃度S、エピタキシ
ャル層(いわゆる絶縁S9層)の1層2を形成する。
(2): First, on the surface of the N-type Si substrate 1, one layer 2 of an epitaxial layer (so-called insulating S9 layer) with a low impurity concentration S is formed by epitaxial growth to a required thickness.

■二次に、この1層2に、熱拡散又はイオン注入により
1層3.及び、n+層であるガードリング9を形成する
■Secondly, layer 3 is added to layer 2 by thermal diffusion or ion implantation. Then, a guard ring 9, which is an n+ layer, is formed.

■:I層2の表面は鏡面に仕上がっているために、光の
反射が大きい、このために、受光部表面でこの反射を小
さくして感度を高めるために、適当な膜厚の反射層を形
成する必要がある。即ち、1層2を形成したその後に、
受光部となる表面上に、感度を高くするための例えば酸
化膜等の反射防止膜6を形成する。
■: The surface of the I layer 2 has a mirror finish, so it reflects a lot of light. Therefore, in order to reduce this reflection and increase the sensitivity on the surface of the light receiving part, a reflective layer with an appropriate thickness is applied. need to be formed. That is, after forming layer 1 and layer 2,
An antireflection film 6, such as an oxide film, is formed on the surface that will become the light-receiving portion in order to increase sensitivity.

■:次に、表面(P層/I層)上、及び、裏面(N基板
)上に電極層<AI電極)4.7を形成する。
(2) Next, an electrode layer <AI electrode) 4.7 is formed on the front surface (P layer/I layer) and the back surface (N substrate).

■:電極層4.7上からワイヤーボンディングにより正
端子5及び負端子8を取出す、この時、基本的にP層3
面内が空間ビーム光用としての受光部となる。
■: Take out the positive terminal 5 and negative terminal 8 from above the electrode layer 4.7 by wire bonding. At this time, basically the P layer 3
The inside of the plane becomes a light receiving part for spatial beam light.

〈発明が解決しようとする課題〉 ところで、この様なPIN型のS、フォトダイオードは
、N基板1の表面上に不純物をほとんど含まない結晶性
の良い、即ち、前記暗電流の原因となる欠陥や再結合中
心密度の小さい、低不純物濃度84層をエピタキシャル
成長で形成するのは鉗しく、又これを解決しようとする
ために製造装置の保守も大変であり、結果的にコストア
ップの一因となっていた、いう問題点があった。
<Problems to be Solved by the Invention> By the way, such a PIN type S photodiode has good crystallinity that contains almost no impurities on the surface of the N substrate 1, that is, there are no defects that cause the dark current. It is difficult to form a low impurity concentration 84 layer with a low recombination center density by epitaxial growth, and it is also difficult to maintain the manufacturing equipment to solve this problem, which results in an increase in costs. There was a problem.

本発明は、従来の技術の有するこのような問題点に鑑み
てなされたものであり、その目的とするところは、暗電
流が小さく、且つ高速応答可能でローコストタイプの、
S、PIN型フォトダイオードとして動作させることが
できる半導体検出素子を提供するものである。
The present invention has been made in view of the above-mentioned problems of the conventional technology, and its purpose is to provide a low-cost type that has low dark current and is capable of high-speed response.
The present invention provides a semiconductor detection element that can be operated as an S, PIN type photodiode.

く課題を解決するための手段〉 上記目的を達成するために、本発明の半導体光検出素子
は、各種の発光素子から出射される光を電気信号に変換
する半導体光検出素子において、結晶性の良い低濃度S
、基板の表・裏面の必要部分にエツチングにより形成さ
れる■層厚と、前記裏面の少なくとも前記1層厚部分に
形成されるn+層又はP中層と、受光面となる前記表面
の少なくとも前記I層厚部分に形成されるP中層又はn
+層と、これ等形成した層の上に形成される電極及び反
射防止膜と、からなることを特徴とするものである。
Means for Solving the Problems> In order to achieve the above object, the semiconductor photodetecting element of the present invention converts light emitted from various light emitting elements into electrical signals. Good low concentration S
, (2) layer thickness formed by etching on required portions of the front and back surfaces of the substrate, an n+ layer or P middle layer formed on at least the one layer thick portion of the back surface, and at least the I layer on the front surface that will become the light-receiving surface. P middle layer or n formed in the thick layer part
It is characterized in that it consists of a + layer, and an electrode and an antireflection film formed on these layers.

く作用〉 結晶性の良い低不純物濃度N型(又はP型)S基板の表
・裏面の必要部分にエツチング用マスクを施し、その後
に設計上最適な厚さの1層(■層厚)を形成するために
エツチングを施し、裏面の少なくともエツチングした前
記■層厚の部分にn中層(低不純物濃度P型の時はP中
層)を形成し、受光面となる表面の少なくともエツチン
グした前記■層厚の部分にP中層(低不純物濃度P型の
時はn+層)を形成し、これ等形成した層の上に反射防
止膜及び電極を形成する。尚、ここでは低不純物濃度N
型Si基板で以下説明する。
Etching mask is applied to the necessary parts of the front and back surfaces of a low impurity concentration N-type (or P-type) S substrate with good crystallinity, and then one layer (■ layer thickness) of the optimum thickness for the design is applied. An n medium layer (a P medium layer in the case of a low impurity concentration P type) is formed on the back surface of at least the etched part of the ■ layer thickness, and at least the etched said ■ layer on the surface that will become the light-receiving surface. A P medium layer (an n+ layer in the case of a low impurity concentration P type) is formed in the thick portion, and an antireflection film and an electrode are formed on these formed layers. In addition, here, the low impurity concentration N
A type Si substrate will be explained below.

〈実施例〉 実施例について図面を参照して説明する。尚、以下の図
面において、第3図と重複する部分は同一の符号を付し
てその詳細な説明は省略する。
<Example> An example will be described with reference to the drawings. In the following drawings, parts that overlap with those in FIG. 3 are designated by the same reference numerals, and detailed explanation thereof will be omitted.

第1図は本発明の半導体光検出素子の説明に供する図で
ある。
FIG. 1 is a diagram for explaining the semiconductor photodetecting element of the present invention.

第1図(1)に示す符号10は、不純物をほとんど含ま
ない結晶性の良い10”cm″3程度の低不純物濃度S
i基板、即ち、欠陥や再結合中心密度の小さいS、基板
である。
The reference numeral 10 shown in FIG. 1 (1) indicates a low impurity concentration S of about 10"cm"3 that contains almost no impurities and has good crystallinity.
This is an i-substrate, that is, an S substrate with a low density of defects and recombination centers.

■二同図(11)において、符号11はエツチング用マ
スクである。このエツチング用マスク11を同図(+)
で示す81基板10の表・裏面の必要部分に施す。
(2) In the figure (11), reference numeral 11 is an etching mask. This etching mask 11 is shown in the same figure (+).
It is applied to the required portions of the front and back surfaces of the 81 substrate 10 shown in .

■:その上で、設計上最適な、例えばτ=R10μm程
度のI層厚となるように異方性エツチングする。
(2) Then, anisotropic etching is performed so that the thickness of the I layer becomes optimum for the design, for example, τ=R10 μm.

■:その後に、エツチング用マスク11を取除く。■: After that, the etching mask 11 is removed.

■二次に、同図(lif)に示すように、裏面にn中層
12を、又、受光面となる表面にP中層13及びガード
リンク9を、例えばイオン注入で形成する。尚、n4″
層12やP中層13は、例えば選択エピタキシャル成長
や熱拡散で形成させることもできる。
(2) Next, as shown in the same figure (lif), an N medium layer 12 is formed on the back surface, and a P medium layer 13 and a guard link 9 are formed on the surface that will become the light receiving surface, for example, by ion implantation. In addition, n4″
The layer 12 and the P intermediate layer 13 can also be formed, for example, by selective epitaxial growth or thermal diffusion.

■:次に、同図(転)に示すように、n+N12上に反
射防止膜6を形成し、その上でAl電&4 、7を形成
する。
(2): Next, as shown in the same figure (transfer), an anti-reflection film 6 is formed on the n+N12, and Al electrodes 4 and 7 are formed thereon.

■:最後に1.’181#14 、7上から正・負端子
5゜8を取出す。
■: Finally 1. '181#14, Take out the positive and negative terminals 5°8 from above 7.

この様な製造方法により得られた半導体検出素子を5i
PIN型フオトダイオードとして動作させれば、暗電流
が小さく、且つ高速応答可能でローコストタイプのもの
が製作できたことととなる。
The semiconductor detection element obtained by such a manufacturing method is 5i
If it is operated as a PIN type photodiode, a low-cost type with small dark current and high-speed response can be manufactured.

ところで、第1図の半導体検出装置の構造はこれに限定
されるものではない。
By the way, the structure of the semiconductor detection device shown in FIG. 1 is not limited to this.

例えば第2図のような構造とすることも可能である。For example, a structure as shown in FIG. 2 is also possible.

第2図は第1図の応用実施例を示す図である。FIG. 2 is a diagram showing an applied example of FIG. 1.

第2図は、同−Si基板内にアンプ等の回路14も搭載
したものである。尚、n+十層2aは例えばイオン注入
で形成される。この時、ガードリング9があることで、
受光素子と完全に分離して同−S、基板10内にトラン
ジスタ等のアンプ等の回路14を形成できる。
FIG. 2 shows that a circuit 14 such as an amplifier is also mounted within the same -Si substrate. Note that the n+10 layer 2a is formed by, for example, ion implantation. At this time, with the guard ring 9,
A circuit 14 such as an amplifier such as a transistor can be formed within the substrate 10 completely separate from the light receiving element.

このような構成とすることにより、アンプW!載槽造の
半導体光検出素子が実現で“き、配線容量等の影響を受
けない小型#I造が可能となる。
With this configuration, the amplifier W! A semiconductor photodetector element built in a tank can be realized, and a small #I structure that is not affected by wiring capacitance etc. is possible.

尚、反射防止膜は1層でも良いが、更に感度を高めるた
めに、2層構造とすること(特に受光面III)もでき
る。この場合、例えば、界面準位等を考慮して熱酸化膜
が使用されるが、この熱酸化膜の上に保護用樹脂を塗付
すると屈折率がほとんど同じために反射防止条件が崩れ
て感度低下が起こるので、例えば、屈折率が熱酸化膜よ
り高い窒化膜を採用することでこのことを防止すると共
に感度の向上を計ることができる。但し、S1表面の安
定性から熱酸化膜をバッファー層として形成し、その上
に窒化膜を形成するように構成することができる。
Note that the antireflection film may have a single layer, but in order to further increase sensitivity, it may have a two-layer structure (particularly on the light-receiving surface III). In this case, for example, a thermal oxide film is used in consideration of the interface level, etc., but if a protective resin is applied on top of this thermal oxide film, the refractive index is almost the same, so the anti-reflection conditions are broken and sensitivity is reduced. Since a decrease occurs, for example, by employing a nitride film whose refractive index is higher than that of a thermal oxide film, this can be prevented and the sensitivity can be improved. However, in view of the stability of the S1 surface, a thermal oxide film can be formed as a buffer layer, and a nitride film can be formed thereon.

〈発明の効果〉 本発明は、以上説明したように構成されているので、次
に記載するような効果を奏する。
<Effects of the Invention> Since the present invention is configured as described above, it produces the following effects.

不純物をほとんど含まない結晶性の良いSi基板を用い
て製作することで、エピタキシャル成長で1層を形成し
たものよりも暗電流が少なく、高速応答でローコストな
半導体光検出素子を安定して製造することができる。
By manufacturing using a Si substrate with good crystallinity that contains almost no impurities, it is possible to stably manufacture a low-cost semiconductor photodetector element with lower dark current, faster response, and lower cost than one formed by epitaxial growth. I can do it.

又、反射防止膜の構造を複数層構造とすることで、上記
効果に加えて高感度化がはかれる。
Furthermore, by forming the anti-reflection film into a multi-layered structure, in addition to the above-mentioned effects, higher sensitivity can be achieved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の半導体光検出素子の説明に供する図、
第2図は第1図の応用実施例を示す図、第3図は従来の
PIN型のSiフォトダイオードの構造図である。 1・・・Si基板、4,7・・・電極層、5・・・正端
子、6・・・反射防止膜、8・・・負端子、9・・・ガ
ードリング、10・・・低不純物濃度Sl基板。 (i) 第1図 「17丁10 第J図
FIG. 1 is a diagram for explaining the semiconductor photodetecting element of the present invention;
FIG. 2 is a diagram showing an applied example of FIG. 1, and FIG. 3 is a structural diagram of a conventional PIN type Si photodiode. DESCRIPTION OF SYMBOLS 1...Si substrate, 4,7...electrode layer, 5...positive terminal, 6...antireflection film, 8...negative terminal, 9...guard ring, 10...low Impurity concentration Sl substrate. (i) Figure 1 “17-10 Figure J

Claims (1)

【特許請求の範囲】[Claims] 各種の発光素子から出射される光を電気信号に変換する
半導体光検出素子において、結晶性の良い低濃度Si基
板の表・裏面の必要部分にエッチングにより形成される
I層厚と、前記裏面の少なくとも前記I層厚部分に形成
されるn^+層又はp^+層と、受光面となる前記表面
の少なくとも前記I層厚部分に形成されるp^+層又は
n^+層と、これ等形成した層の上に形成される電極及
び反射防止膜と、からなることを特徴とする半導体光検
出素子。
In a semiconductor photodetector element that converts light emitted from various light emitting elements into an electrical signal, the thickness of the I layer formed by etching on the required parts of the front and back surfaces of a low concentration Si substrate with good crystallinity, and the thickness of the back surface. an n^+ layer or p^+ layer formed at least in the I layer thickness portion; a p^+ layer or n^+ layer formed in at least the I layer thickness portion of the surface serving as a light-receiving surface; 1. A semiconductor photodetecting element comprising an electrode and an antireflection film formed on a layer formed in the same manner.
JP1063216A 1989-03-15 1989-03-15 Semiconductor photodetector Pending JPH02241066A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1063216A JPH02241066A (en) 1989-03-15 1989-03-15 Semiconductor photodetector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1063216A JPH02241066A (en) 1989-03-15 1989-03-15 Semiconductor photodetector

Publications (1)

Publication Number Publication Date
JPH02241066A true JPH02241066A (en) 1990-09-25

Family

ID=13222786

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1063216A Pending JPH02241066A (en) 1989-03-15 1989-03-15 Semiconductor photodetector

Country Status (1)

Country Link
JP (1) JPH02241066A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6690078B1 (en) * 1999-08-05 2004-02-10 Integration Associates, Inc. Shielded planar dielectrically isolated high speed pin photodiode and method for producing same
RU178061U1 (en) * 2017-08-01 2018-03-21 Акционерное общество "НПО "Орион" Silicon pin photodiode with increased sensitivity to a wavelength of 1.06 microns
RU184980U1 (en) * 2018-08-29 2018-11-15 Акционерное общество "НПО "Орион" Silicon p-i-n-photosensitive element with an increased level of sensitivity to a wavelength of 1.06 μm

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57170576A (en) * 1981-04-15 1982-10-20 Toshiba Corp Manufacture of semiconductor photodetector
JPS62158373A (en) * 1985-12-23 1987-07-14 モトロ−ラ・インコ−ポレ−テツド High speed silicon photodiode and manufacture of the same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57170576A (en) * 1981-04-15 1982-10-20 Toshiba Corp Manufacture of semiconductor photodetector
JPS62158373A (en) * 1985-12-23 1987-07-14 モトロ−ラ・インコ−ポレ−テツド High speed silicon photodiode and manufacture of the same

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6690078B1 (en) * 1999-08-05 2004-02-10 Integration Associates, Inc. Shielded planar dielectrically isolated high speed pin photodiode and method for producing same
RU178061U1 (en) * 2017-08-01 2018-03-21 Акционерное общество "НПО "Орион" Silicon pin photodiode with increased sensitivity to a wavelength of 1.06 microns
RU184980U1 (en) * 2018-08-29 2018-11-15 Акционерное общество "НПО "Орион" Silicon p-i-n-photosensitive element with an increased level of sensitivity to a wavelength of 1.06 μm

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