JPH02240912A - Wafer having notch - Google Patents

Abstract

PURPOSE:To enable simple recognition of the surface and the back of a wafer having a notch by forming the notch in a laterally asymmetric shape changing discontinuously with a change in position in the direction of the center. CONSTITUTION:In a wafer 1 having a notch 2 formed in the peripheral part, the notch 2 is formed in a shape changing discontinuously with a change in position in the direction of the center and the shape of the notch 2 is made asymmetric laterally with respect to a center line 1a. Since the notch 2 formed in the peripheral part of the water 1 has the shape changing discontinuously with the change in position in the direction of the center, in other words, a detection light formed by the notch 2 is also discontinuous when rough alignment of the wafer 1 is executed by using a photosensor, for instance, and even a minute slippage of the rough alignment can be detected. Thereby an error in alignment can be diminished and the surface and the back of the wafer can be recognized simply by eyes.

Description

[Detailed Description of the Invention] [Summary] Regarding wafers with notches such as semiconductor wafers, the purpose of this invention is to easily check the front and back sides of the wafer and to reduce rough alignment errors. A wafer having a notch, the notch having a shape that changes discontinuously as the position changes toward the center, and the shape of the notch being asymmetrical with respect to the center line. do.

[Industrial application field]

The present invention relates to a wafer having a notch, and more particularly to a wafer having a notch in which a notch is formed at the periphery of a semiconductor wafer or the like.

[Conventional technology]

Conventionally, wafers with notches, such as semiconductor wafers, are separated by 90° from each other in order to distinguish between the front and back sides and perform rough alignment.
°Orientation flats are provided at different peripheral locations. However, for example, in a semiconductor wafer, the orientation and the
Providing a flat destroys the symmetry of the wafer,
The center of the wafer is different from the actual center of gravity, and for example, when applying a resist agent onto the semiconductor wafer using a spin coater, the resist agent may not be applied uniformly due to eccentricity.

In order to solve these problems, a semiconductor wafer in which notches are formed in the periphery of the semiconductor wafer has been proposed in recent years.

Since the notch formed at the periphery of the semiconductor wafer has a small shape, there is almost no deviation between the center of the wafer and the actual center of gravity, and the resist agent can be applied uniformly by a spin coater. Furthermore, since the notch is much smaller than the orientation flat, the semiconductor wafer can be used effectively to create a large number of semiconductor chips, especially when using a large diameter semiconductor wafer. be.

FIG. 5 shows a conventional notched wafer.

In the wafer having a notch shown in FIG.
21 and 122 are chamfered with different radii, so that it is possible to check the front and back sides of a wafer having a notch. In addition, in the wafer having a notch shown in FIG.
2, the notches are made at different angles from each other, so that, like the semiconductor wafer 101 described above, it is possible to check the front and back sides of the semiconductor wafer.

[Problem to be solved by the invention]

As described above, it has been proposed to provide a semiconductor wafer with an asymmetric notch so that the front and back sides of the wafer having the notch can be checked.

By the way, such a notch is due to orientation and
Like flat, it is also used to perform rough alignment of semiconductor wafers.

However, in conventional notched wafers, the shape of the notch changes continuously, so for example,
When performing rough alignment of a semiconductor wafer (a wafer having a notch), alignment errors have become large.

That is, for example, when performing rough alignment of a semiconductor wafer using a photosensor, FIGS. 5(a) and (
The conventional notched wafer shown in b) has notches 1
Since the shapes of 02 and 202 are made to change continuously with respect to the center and peripheral directions of the wafer,
Difficult to detect minute misalignment,
It has been difficult to reduce alignment errors. Furthermore, the shape of the notch in a conventional notched wafer exhibits continuous changes in asymmetry with respect to the center line, so that it is sometimes difficult to visually distinguish between the front and the back.

The present invention has been developed in view of the problems of the conventional notched wafers described above. The purpose is to easily check the front and back sides of the image and to reduce rough alignment errors.

[Means to solve the problem]

FIG. 1 is a diagram showing the principle of a wafer having a notch according to the present invention.

According to the present invention, there is provided a wafer 1 having a notch 2 formed at the periphery, the notch 2 having a shape that changes discontinuously as the position changes toward the center, and A wafer having a notch characterized in that the shape of the notch 2 is asymmetrical with respect to the center line 1a is provided.

[For production]

According to the wafer having a notch of the present invention, the notch 2 formed on the periphery of the wafer l has a shape that changes discontinuously as the position changes toward the center, so that it can be used as a photo sensor, for example. When roughly aligning the wafer 1 using the notch 2, the detection light by the notch 2 also becomes discontinuous, making it possible to detect even minute deviations in the rough alignment, thereby reducing alignment errors. Furthermore, since the shape of the notch in the notched wafer of the present invention exhibits asymmetry with respect to the center line 1a through discontinuous changes, it is also possible to easily confirm the front and back surfaces with the naked eye.

〔Example〕

Hereinafter, embodiments of a wafer having a notch according to the present invention will be described with reference to the drawings.

FIG. 2 is an enlarged view of essential parts of an embodiment of a wafer having a notch according to the present invention. As shown in the figure, a wafer (semiconductor wafer) 1 having a notch according to this embodiment has a notch 2 formed at the periphery of a circular semiconductor wafer 1 discontinuously as the position changes toward the center. It has a step shape that changes over time, and is formed asymmetrically with respect to the center line 1a.

Specifically, the notch 2 points the center of the semiconductor wafer 1 at the origin 0.
(0,0), six points A(rs, θ0), B(
ratθo)+c(r++θ+), D(rg+θ+)
, E(rzt02).

The shape is defined by F(ri+02).

FIG. 3 is a diagram for explaining the function of the notched wafer of FIG. 2, and FIG. 4 is a diagram showing how the rough alignment of the notched wafer of the present invention is performed.

By the way, when rough alignment of the semiconductor wafer 1 is performed using photosensors such as light emitting diodes and photodiodes, the presence or absence of light reflection at the notch 2 provided on the semiconductor wafer 1 is used as -a.

As shown in FIG. 4, the semiconductor wafer 1 is placed on an XY stage 50 whose position is controlled by an XY stage controller 49. As shown in FIG. A reflector plate 51 is arranged between the X-Y stage 50 and the wafer l, and reflects the light that is focused from the light emitting diode 41 onto the notch 2 via the half mirror 42 and the lens 43. is being done. That is, in the notch 2, where the semiconductor wafer is not present, the light emitting diode 41
is reflected by the reflecting plate 51, and the reflected light is reflected by the lens 4.
3 and a half mirror 42 to reach the photodiode 44.

When the reflected light is detected by the photodiode 44, the output of the photodiode 44 is amplified by the amplifier 45, and the output from the photodiode 44 is amplified by the amplifier 45.
The signal is supplied to a D converter 46. Furthermore, the A/D converter 46
The digitally converted signal is sent to the microcomputer 4.
7, predetermined arithmetic processing is performed by the microcomputer 47, and control signals are supplied to the rotation axis control device 48 and the XY stage control device 49, respectively. In response to this control signal, the semiconductor wafer 1 is rotated to a predetermined position by the rotation axis control bag y148, and the position in the X direction and the Y direction is controlled by the X-Y stage control device 49. . After the rough alignment is performed in this manner, a more precise alignment adjustment process is performed, and the semiconductor wafer 1 is coated with a resist agent, exposed to light, and the like.

Next, the relationship between the position of the light focused from the light emitting diode 41 on the notch 2 via the half mirror 42 and the lens 43 and the light detected by the photodiode 44 will be described in detail.

The light detected by the photodiode 44 has a rotation angle θ between the radii rl and r2 at the notch 2 of the semiconductor wafer 1. and θ, and the radius r2
The rotation angle θ is between and r. and θ2 only. In this way, since the shape of the notch 2 is a step shape that changes discontinuously as the position changes toward the center of the semiconductor wafer 1, the rough alignment of the semiconductor wafer 1 can be checked at multiple locations. can do.

That is, as shown in FIGS. 2 and 3, at the notch 2, radii r and r! For light between, the rotation angle is θ. and θ, end A-B and end D-
The presence or absence of detection light changes at C, and the radii r2 and r
For light between , the rotation angle is θ. Since the presence or absence of the detection light changes at the ends A-B and FE, which are θ2 and θ2, the rough alignment can be confirmed at each of these ends. Furthermore, the shape 2 of the notch in the wafer l having the notch of this example is defined by the center line 1a
Since the asymmetry with respect to the notch is also manifested by discontinuous changes, it is possible to more easily confirm the front and back sides of a wafer having a notch, compared to the conventional notch shape in which the shape changes continuously.

〔Effect of the invention〕

As described above in detail, the wafer having a notch according to the present invention has an asymmetrical shape that changes discontinuously as the position of the notch changes in the central direction. It is possible to easily recognize the front and back sides and perform rough alignment with small errors.

[Brief explanation of drawings]

Fig. 1 is a diagram showing the principle of a wafer having a notch according to the present invention, Fig. 2 is an enlarged view of the main part of an embodiment of a wafer having a notch according to the present invention, and Fig. 3 is a diagram showing the principle of a wafer having a notch according to the present invention. FIG. 4 is a diagram illustrating the rough alignment of a wafer having a notch according to the present invention, and FIG. 5 is a diagram illustrating a conventional wafer having a notch. (Explanation of symbols) 1...Wafer with a notch (semiconductor wafer), 1a
...center line, 2...notsuchi. Center of semiconductor substrate Enlarged view of main parts showing one embodiment of a wafer having a notch according to the present invention $20 Section 9 for explaining the function of the wafer having a notch according to the present invention shown in Figure 2 Section 3: A notch according to the present invention A diagram showing the principle of a wafer with
) Figure 51 shows a wafer with a conventional notch.

Claims (1)

[Scope of Claims] 1. A wafer (1) having a notch (2) formed at the periphery, the notch having a shape that changes discontinuously as the position changes toward the center. and the shape of the notch is aligned with the center line (
A wafer having a notch characterized by being asymmetrical with respect to 1a).