JPH02238740A - Start-stop synchronization adaptor - Google Patents

Abstract

PURPOSE:To connect the terminal equipment of a start-stop system transmission means to a synchronous type MODEM without the revision of the equipment by receiving a start-stop system transmission data in a sampling clock and converting the data into a synchronous type transmission data synchronously with the selected transmission clock. CONSTITUTION:A start-stop synchronization conversion means 15 receives a start-stop system transmission data in response to a sampling clock outputted from a clock generating means 11. Moreover, the means 15 converts the start- stop system transmission data into the synchronous transmission data in response to either the transmission clock outputted from the clock generating means 11 or the transmission clock supplied from a synchronous MODEM and outputs the result. Thus, the processing of the transmission clock between the terminal equipment of the start-stop system transmission protocol and the synchronous MODEM and the conversion from the start-stop system transmission data into the synchronous transmission data are attained and both the equipments are connected without any revising.

Description

[Detailed Description of the Invention] [Summary] Regarding the start-stop synchronous adapter that controls the connection between a terminal device that communicates using the start-stop transmission procedure and a synchronous modem, the adapter can be used to connect the terminal device that uses the start-stop transmission procedure and the terminal device that uses the start-stop transmission procedure without changing the device. The purpose of the present invention is to enable connection with a synchronous modem, and includes a clock generation means for generating a transmission clock and a predetermined sampling clock corresponding to the transmission timing of the synchronous modem, and a transmission clock supplied from the transmission clock or the synchronous modem. A selection means for selecting one of Chronok;
The apparatus further comprises a start-stop synchronous conversion means for receiving start-stop transmission data using a sampling clock and converting it into synchronous transmission data in synchronization with a selected transmission clock.

[Industrial application field]

The present invention relates to an online system using a modem that connects a central computer and a terminal device via an online line and controls the transmission and reception of data. The present invention relates to an asynchronous to start-stop adapter that performs connection control.

Note that the adapter of the present invention controls processing during transmission performed from a terminal device in an asynchronous transmission procedure via a synchronous modem.

[Conventional technology]

The second modem is configured to transmit at the transmission timing of the connected terminal device, and is used when the line speed is 1200 bps or less.

On the other hand, in response to the demand for faster online lines due to the recent improvements in computer performance, synchronous modems, which have been introduced to achieve line speeds of 2,400 bps or more, transmit data at the same time as the transmitting timing of the connected terminal device. There is a method in which transmission is synchronized with the transmission timing of the opposing modem.

That is, when transmitting at the transmission timing of a terminal device, a transmission timing signal (STI) is transmitted from the terminal device to the modem as a transmission clock. Furthermore, when transmitting in synchronization with the transmission timing of the opposing modem, the transmission timing signal (ST2) sent by the modem is received as the transmission clock.

In this way, the transmission clock is unnecessary in an asynchronous modem, but is essential in a synchronous modem.

Note that the transmitting/receiving clock corresponding to the start-stop transmission procedure has a period of 1/16 or 1/64 of the clock period corresponding to the line speed, and in the start-stop modem, this sampling clock is used to process the start-stop transmission data. Sampling is being carried out. Therefore, the clock cannot be the same as a synchronous modem, which uses a clock with a cycle that is 1/1 of the clock cycle that corresponds to the line speed.

[Problem to be solved by the invention]

By the way, when using a start-stop modem, the terminal device uses the start-stop transmission procedure, and when using a synchronous modem, it uses the synchronous transmission procedure, but older terminal devices use the synchronous transmission procedure. There are some cases for which transmission procedures are not prepared.

Therefore, in order to accommodate a terminal device that is not equipped with a synchronous transmission procedure into a synchronous modem as the line speed increases, it is necessary to make major changes to the equipment, including the line control program.

SUMMARY OF THE INVENTION An object of the present invention is to provide an asynchronous adapter for connecting a terminal device using an asynchronous transmission procedure to a synchronous modem without changing the device.

[Means to solve the problem] FIG. 1 is a block diagram of the principle of the present invention.

In the figure, a clock generation stage 11 generates a transmission clock and a predetermined sampling clock corresponding to the transmission timing of the synchronous modem. The selection means 13 selects either the transmission clock output from the clock generation stage 11 or the transmission clock supplied from the synchronous modem.

The 1,000-stage asynchronous converter 15 receives asynchronous transmission data using a sampling clock, and converts it into synchronous transmission data in synchronization with a selected transmission clock.

[For production]

In the present invention, the start-stop synchronization conversion means 15 receives start-stop two transmission data in response to the sampling clock output from the clock generation means 11. Further, the start-stop type transmission data is converted into synchronous type transmission data and outputted according to either the transmission clock outputted from the clock generating means l1 or the transmission clock supplied from the synchronous modem.

FIG. 2 is a time chart illustrating the principle of converting asynchronous transmission data that is asynchronous to the transmission clock into synchronous transmission data that is synchronized to the transmission clock. Note that the start-stop transmission data is received using a sampling clock that is multiplied with respect to the transmission clock.

In this way, it is possible to process the transmission clock and convert the start-stop transmission data to the synchronous transmission data between the terminal device using the start-stop transmission procedure and the synchronous modem, and it is possible to connect the two devices without changing them. can be done.

〔Example〕

Hereinafter, embodiments of the present invention will be described in detail based on the drawings.

FIG. 3 is a block diagram showing the configuration of an embodiment of the present invention.

In the figure, a line speed setting circuit 31 that sets a clock frequency corresponding to the line speed controls an oscillation circuit 33 to generate a predetermined clock signal (sampling clock). This clock signal is converted into a predetermined transmission clock (for example, 1200 to 9600 Ilz) by the frequency dividing circuit 35 and inputted to one terminal of the selection circuit 37. The other terminal of the selection circuit 37 is supplied with the transmission clock ST2 from the synchronous modem via the interface circuit 39. The selection circuit 37 outputs either the transmission clock from the frequency dividing circuit 35 or the transmission clock ST2 from the synchronous modem as the transmission clock STI.

Serial transmission data from the terminal device (start-stop transmission data) S
The DI is input to the L first transmitting/receiving circuit 43 via the interface circuit 41. The transmitter/receiver circuit 43 is the oscillation circuit 3
Serial transmission data SD with a sampling clock (with a period of, for example, 1/16 of the transmission clock) sent from 3.
I is received, converted into a parallel signal, and stored in the buffer 45. The transmission data transferred from the huffer 45 is input to the second transmission/reception circuit 47 . The transmission/reception circuit 47 converts the transmission data into serial transmission data (synchronous transmission data) SD2 in synchronization with the transmission clock (1/l) STI, and sends it to the synchronous modem via the interface circuit 39.

Further, the transmission request signal RS1 from the terminal device is converted into the transmission request signal RS2 via the delay circuit 49, and sent to the same type 1 modem via the interface circuit 39.

Here, the correspondence relationship with the Pronoc diagram of the principles of the present invention shown in FIG. 1 will be shown.

The clock generation means 11 corresponds to the line speed setting circuit 3l, the oscillation circuit 33, and the frequency dividing circuit 35.

The selection stage 13 corresponds to the selection circuit 37.

The start-stop synchronization conversion means 15 corresponds to the transmitting/receiving circuits 43 and 47, the bumper 45, and the delay circuit 49.

FIG. 4 is a time chart explaining the operation of the embodiment of the present invention.

That is, serial transmission data SDI, which is start-stop transmission data sent from the terminal device, is received by the transmission/reception circuit 43 using a sampling clock, and is transferred to the transmission/reception circuit 47 via the Hanwha 45. In the transmitter/receiver circuit 47,
In synchronization with the transmission clock STI, the synchronous transmission data is converted into serial transmission data SD2 and sent to the synchronous modem.

Note that the delay circuit 49 is for compensating for the delay time until the serial transmission data SD2 is output from the transmitting/receiving circuit 47, and provides a predetermined amount of delay to the falling edge of the transmission request signal RS1 to output the transmission request signal. Convert to RS2.

Further, the selection circuit 37 is appropriately set according to the transmission timing of the synchronous modem. In other words, a synchronous modem. If the method is to transmit at the transmission timing of the connected terminal device, the terminal device does not have a transmission clock, so the clock signal from the frequency dividing circuit 35 is selected as the transmission clock STI, and the transmission clock of the opposing modem is If the method is to transmit in synchronization with the timing, the transmission clock ST
2 and set it as the return transmission clock STI.

FIG. 5 is a block diagram showing the connection configuration of the start-stop modem and the synchronous modem.

FIG. 5(1) shows the connection configuration between the start-stop modem 5l and the terminal device 53 for the start-stop transmission procedure, and FIG. This is the connection configuration of the terminal device 59 in the formula transmission procedure.

As shown in FIG. 5(2), by using the start-stop-sync adapter 57 according to the present invention, it is possible to convert the start-stop signal on the terminal device 59 side and the synchronous signal of the synchronous modem 55. , the synchronous modem 55 and the terminal device 59 need not be changed.

[Screaming effect]

As described above, according to the present invention, by using the start-stop synchronization adapter of the present invention in connection between a synchronous modem and a terminal device for start-stop transmission procedures, it is possible to connect the online line without changing each device. It is possible to increase the speed.

Additionally, it can flexibly accommodate various line speeds, making it extremely useful in practice.

[Brief explanation of drawings]

Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is a time chart explaining the principle of the present invention, Fig. 3 is a block diagram showing the configuration of an embodiment of the invention, and Fig. 4 is the operation of the embodiment of the invention. FIG. 5 is a block diagram showing a connection configuration of an asynchronous modem and a synchronous modem. 1 is a line speed setting circuit, 3 is an oscillation circuit, 5 is a frequency dividing circuit, 7 is a selection circuit, 9 and 4l are interface circuits, 3.47 is a transmitting/receiving circuit, 5 is a buffer, and 9 is a delay circuit. In the figure, 11 is a clock generation means, 13 is a selection means, 15 is an asynchronous conversion means, FIG. 1 is a block diagram of the principles of the present invention, and FIG. ．． −． ．． ．． ．． ．． ．． jLrL. ．． ．． ．． ．． ．． ．． ．． fi. ．．
．． ．． ．． ．． ．． ．． J1 block. ．． ．． 、． ．． ．． ,,Time chart explaining the principle of the present invention Fig. 2 Example time chart Fig. 4

Claims (1)

[Claims] (1) Clock generation means (11) for generating a transmission clock and a predetermined sampling clock corresponding to the transmission timing of the synchronous modem; and selection means for selecting either the transmission clock or the transmission clock supplied from the synchronous modem. (13); and a start-stop synchronous conversion means (15) that receives start-stop transmission data using the sampling clock and converts it into synchronous transmission data in synchronization with the selected transmission clock. Asynchronous Adapter.