JPH02238666A - Solid-state image sensing device - Google Patents

Solid-state image sensing device

Info

Publication number
JPH02238666A
JPH02238666A JP1058906A JP5890689A JPH02238666A JP H02238666 A JPH02238666 A JP H02238666A JP 1058906 A JP1058906 A JP 1058906A JP 5890689 A JP5890689 A JP 5890689A JP H02238666 A JPH02238666 A JP H02238666A
Authority
JP
Japan
Prior art keywords
conductive film
film
solid
transparent conductive
interlayer insulating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1058906A
Other languages
Japanese (ja)
Inventor
Yoshio Nakazawa
良雄 中澤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP1058906A priority Critical patent/JPH02238666A/en
Publication of JPH02238666A publication Critical patent/JPH02238666A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To enable two layers to be used as internal wiring layers for a thin film transistor and enable highly free wiring for driver circuit based on the thin film transistor and improve integration density by providing a second interlayer insulating film. CONSTITUTION:A photosensor layer 27 held between a transparent conductive film 26 and a conductive film 29, a second interlayer insulating film 28 held between the transparent conductive film 26 and the conductive film 29, the transparent conductive film 26 electrically connected to polycrystalline silicon 22 and a gate electrode 24, the conductive film 29 electrically connected to the polycrystalline silicon 22 and the gate electrode 24, are laminated and integrated in the order of the transparent conductive film 26, the photosensor layer 27, the second interlayer insulating film 28, the conductive film 29. Thus, integration density and yield can be increased, and production processes and cost can be reduced.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は固体撮像装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a solid-state imaging device.

[従来の技術] 従来、薄膜トランジスタによって構成されたドライバー
回路及び光センサーを集積した固体撮像装置は第16回
固体素子及び材料コンファレンスの予稿集P559−P
562の様に光入射結像光を透明基板を通さず行う構造
となっていた。
[Prior Art] Conventionally, a solid-state imaging device that integrates a driver circuit composed of thin film transistors and a photosensor is described in the Proceedings of the 16th Solid-State Devices and Materials Conference P559-P.
562, it had a structure in which the incident imaging light was not passed through the transparent substrate.

また他の従来技術例としては本出願人の出願した特開昭
61−1059’80の第1図に示すものがある。薄膜
トランジスタの内部配線はセンサー電極と共用されてい
るが、透明電極は薄膜トランシスタの内部配線と共用さ
れていなかった[発明が解決しようとする課題] しかし、前述の従来技術では薄膜トランジスタの内部配
線が一層しかないので固体撮像装置の集積密度を高くで
きなかった。特に原稿と同一幅の光センサーアレイを用
いる密着型イメージセンサと呼ばれる固体撮像装置にお
いては、固体撮像装置の長さが100ミリメートル( 
B 5サイズハ約182ミリメートル)以上になり、内
部に集積されるドライバー回路の電源配線も1oOミリ
メートル以上の長さとなる。電源配線の抵抗を下げて、
固体撮像装置のドライバー回路のスイッチング雑音を減
らしたいので電源配線のパターン幅は大きいことが望ま
しい。また固体撮像装置の集積密度を高くするため薄膜
トランジスタ上に電源配線を形成する必要がある。しが
し以上の技術的経済的要求に対して薄膜トランジスタの
内部配線が一層しかないという従来技術では対応できな
いという問題点があった。
Another example of the prior art is shown in FIG. 1 of Japanese Patent Laid-Open No. 61-1059'80 filed by the present applicant. The internal wiring of the thin film transistor is shared with the sensor electrode, but the transparent electrode is not shared with the internal wiring of the thin film transistor [Problem to be solved by the invention] However, in the prior art described above, the internal wiring of the thin film transistor is Therefore, it was not possible to increase the integration density of solid-state imaging devices. In particular, in solid-state imaging devices called contact image sensors that use an optical sensor array with the same width as the document, the length of the solid-state imaging device is 100 mm (
The B5 size is approximately 182 mm or more, and the power supply wiring for the driver circuit integrated inside is also over 100 mm long. Lower the resistance of the power supply wiring,
Since it is desired to reduce the switching noise of the driver circuit of the solid-state imaging device, it is desirable that the pattern width of the power supply wiring is large. Furthermore, in order to increase the integration density of the solid-state imaging device, it is necessary to form power supply wiring on the thin film transistor. There was a problem in that the conventional technology, in which the thin film transistor had only one layer of internal wiring, could not meet the technical and economic demands.

そこで本発明はこのような問題点を解決するもので、そ
の目的とするところは、歩留力が高く、製造プロセスが
少な《低コストな特性の優れた固体撮像装置を提供する
ところにある。
The present invention is intended to solve these problems, and its purpose is to provide a solid-state imaging device with excellent characteristics at a low cost and with a high yield and a small number of manufacturing processes.

[課題を解決するための手段] 本発明の固体撮像装置は、 a) 透明基板上に、光センサー及び薄膜トランジスタ
によって構成されるドライバー回路を集積せしめ、光入
射を透明基板を通して行う固体撮像装置において、 b) 透明導電膜26,導電膜29に挾持された光セン
サー層27、 C) 透明導電膜26,導電膜29に挾持された第2の
層間絶縁膜28、 d) 多結晶シリフン22,ゲート電極24と電気的接
続を有す透明導電膜26、 C〕 多結晶シリコン22,ゲート電極24と電気的接
続を有す導電膜29、 f) 以上を透明導電膜26,光センサー層27,第2
の層間絶縁膜28,導電膜29の順番に積層集積されて
いることを特徴とする。
[Means for Solving the Problems] The solid-state imaging device of the present invention includes: a) A driver circuit constituted by an optical sensor and a thin film transistor is integrated on a transparent substrate, and light is incident through the transparent substrate. b) Photosensor layer 27 sandwiched between transparent conductive film 26 and conductive film 29; C) Second interlayer insulating film 28 sandwiched between transparent conductive film 26 and conductive film 29; d) Polycrystalline silicon 22 and gate electrode. 24; C] Polycrystalline silicon 22; conductive film 29, electrically connected to gate electrode 24; f) Transparent conductive film 26, photosensor layer 27,
It is characterized in that an interlayer insulating film 28 and a conductive film 29 are stacked and integrated in this order.

[実施例] 第1図は本発明の実施例における固体撮像装置の主要な
各工程中の断面図である。
[Example] FIG. 1 is a sectional view of each main process of a solid-state imaging device in an example of the present invention.

透明基板21は光の透過性及び電気絶縁性を有する石英
基板,サファイヤ基板,ガラス基板などである。多結晶
シリコン22は薄膜トランジスタのソース電極部,ドレ
イン電極部及びチャネル部を有する。ゲート酸化膜26
は多結晶シリコン22を熱酸化して形成する。ゲート電
極24は多結晶シリコン材料などで形成され、セルファ
ライメントゲート技術によるイオン打ち込みのマスクな
どにも用いられる。第1の層間絶縁膜25は、CvD法
によるS102膜やSi3N,膜が形成され、フォトリ
ソグラフィー法により透明導電膜26と電気的接続が必
要な多結晶シリコン22及びゲート電極24上に選択的
に穴あけが行なわれる。
The transparent substrate 21 is a quartz substrate, a sapphire substrate, a glass substrate, or the like, which has light transmittance and electrical insulation properties. The polycrystalline silicon 22 has a source electrode portion, a drain electrode portion, and a channel portion of the thin film transistor. Gate oxide film 26
is formed by thermally oxidizing polycrystalline silicon 22. The gate electrode 24 is formed of a polycrystalline silicon material or the like, and is also used as a mask for ion implantation using self-alignment gate technology. The first interlayer insulating film 25 is formed by forming an S102 film or a Si3N film by a CvD method, and is selectively formed by a photolithography method on the polycrystalline silicon 22 and the gate electrode 24 that need to be electrically connected to the transparent conductive film 26. Drilling is done.

その際同時にあるいは追加する工程によってゲート酸化
膜26にも穴あけが行なわれる。次に透明導電膜26は
酸化インジウム錫(工To)等の透明導電性材料を用い
てスパッタ法などにより形成される。続いて透明導電膜
26はフォ} IJノグラフィー法により薄膜トランジ
スタの配線材料及光センサーの電極等としてパターニン
グされる。(以上第1図(.Z)参照。)以上の工程に
より薄膜トランジスタのソース,ゲート,ドレイン電極
の一部と光センサーの光入射側電極が電気的に接続され
る。
At this time, holes are also formed in the gate oxide film 26 at the same time or in an additional step. Next, the transparent conductive film 26 is formed using a transparent conductive material such as indium tin oxide (TO) by sputtering or the like. Subsequently, the transparent conductive film 26 is patterned as a wiring material for a thin film transistor, an electrode for a light sensor, etc. by the photo-IJ nography method. (See FIG. 1 (.Z) above.) Through the above steps, part of the source, gate, and drain electrodes of the thin film transistor and the light incident side electrode of the photosensor are electrically connected.

以上の工程に続けて(第1図(b)参照。)、光センサ
ー層27は、例えば非品質シリコン材料をP,工,Nの
導電型でプラズマO’VD装置などにより順次積層しパ
ターニングする。続いて第2の層間絶縁膜28は、CV
D法によるSin,,膜やSi3N4膜あるいはポリイ
ミド膜,フォトーース膜などがスピーコートされること
により形成される。(以上第1図Cb’l参照。)続い
て(第1図(C)参照。)第2の層間絶縁膜28に対し
てフォトリソグラフィー法により導電膜29と電気的接
続が必要な多結晶シリコン22,ゲート電極24及光セ
ンサー層27上に選択的に穴あけが行なわれる。その際
同時にあるいは追加する工程によって第1の層間絶縁膜
25及びゲート酸化膜23にも穴あけが行なわれる。次
に導電膜29はAt−Si−Ou等のアルミニウム合金
材料等を用いてスパッタ法などにより形成される。続い
て導電膜29はフォトリソグラフィー法により薄膜トラ
ンジスタの配線材料及び光センサーの電極としてバター
ニングされる。以上の工程により薄膜l・ランジスタの
各電極と光センサーの各電極がすべて電気的に接続され
る。そして最後に保護膜30を形成してボンディングパ
ンドの穴あけのバターニングを行って製造される。(以
上第1図(C)参照。) [発明の効果] 以上述べたように本発明によれば次のような効果を有す
る。
Continuing with the above steps (see FIG. 1(b)), the optical sensor layer 27 is formed by sequentially laminating and patterning, for example, non-quality silicon materials of P, N, and N conductivity types using a plasma O'VD device or the like. . Subsequently, the second interlayer insulating film 28 is
It is formed by spey coating a Sin film, a Si3N4 film, a polyimide film, a photoose film, etc. by the D method. (See FIG. 1 Cb'l above.) Subsequently (see FIG. 1 (C)), polycrystalline silicon that needs to be electrically connected to the conductive film 29 is applied to the second interlayer insulating film 28 by photolithography. 22, the gate electrode 24 and the photosensor layer 27 are selectively drilled. At this time, holes are also formed in the first interlayer insulating film 25 and the gate oxide film 23 at the same time or in an additional step. Next, the conductive film 29 is formed by sputtering or the like using an aluminum alloy material such as At-Si-Ou. Subsequently, the conductive film 29 is patterned by photolithography as a wiring material for a thin film transistor and an electrode for a photosensor. Through the above steps, all the electrodes of the thin film L transistor and each electrode of the optical sensor are electrically connected. Finally, a protective film 30 is formed and patterning is performed to form holes for bonding pads. (See FIG. 1(C) above.) [Effects of the Invention] As described above, the present invention has the following effects.

a) 第2の層間絶縁膜28を設けることにより、薄膜
トランジスタの内部配線層として2層、すなわち透明導
電膜26及導電膜29を用いることができるので、薄膜
トランジスタによるドライバー回路の配線の自由度が高
まり、例えば薄膜トランジスタ上に電源配線がレイアウ
トできるので1電源配線のパターン幅が太き《でき、ド
ライバー回路の面積が小さ《でき、薄膜トランジスタ上
の電源配線のシールド効果により固体撮像装置の信号対
雑音比性能も改善されるという効果を有するb) 従来
の固体撮像装置の構造に加える層は第2の層間絶縁膜2
8だげであ、るので、歩留シが高く、製Mプロセスが少
なく低コストなだけでな《前述のように特性もすぐれて
いるのでコストパフォーマンスが極めて高いという効果
を有する。
a) By providing the second interlayer insulating film 28, two layers, that is, the transparent conductive film 26 and the conductive film 29, can be used as the internal wiring layer of the thin film transistor, so the degree of freedom in wiring the driver circuit using the thin film transistor is increased. For example, since the power supply wiring can be laid out on the thin film transistor, the pattern width of one power supply wiring can be widened, and the area of the driver circuit can be made small.The shielding effect of the power supply wiring on the thin film transistor improves the signal-to-noise ratio performance of the solid-state imaging device. b) The layer added to the structure of the conventional solid-state imaging device is the second interlayer insulating film 2.
8, it not only has a high yield and low cost due to fewer manufacturing processes, but also has excellent characteristics as described above, so it has the effect of extremely high cost performance.

本発明は特に密着型イメージセンサの低コスト化及び特
性の向上に有効である。
The present invention is particularly effective in reducing costs and improving characteristics of contact type image sensors.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の固体撮像装置の一実施例を示す主要な
各工程中の断面図。 21・・・・・・・・・透明基板 22・・・・・・・・・多結晶シリコン26・・・・・
・・・・ゲートts化膜2、4・・・・・・・・・ゲー
ト電極 5・・・・・・・・・第1の層間絶縁膜6・・・・・・
・・・透明導電膜 7・・・・・・・・・光センサー・層 8・・・・・・・・・第2の層間絶縁膜9・・・・・・
・・・導電膜 O・・・・・・・・・保護膜 以上
FIG. 1 is a sectional view showing each main process of an embodiment of the solid-state imaging device of the present invention. 21...Transparent substrate 22...Polycrystalline silicon 26...
...Gate TS film 2, 4...Gate electrode 5...First interlayer insulating film 6...
...Transparent conductive film 7...Photo sensor layer 8...Second interlayer insulating film 9...
...Conductive film O......Protective film or higher

Claims (1)

【特許請求の範囲】 a)透明基板上に、光センサー及び薄膜トランジスタに
よって構成されるドライバー回路を集積せしめ、光入射
を透明基板を通して行う固体撮像装置において、 b)透明導電膜26、導電膜29に挾持された光センサ
ー層27、 c)透明導電膜26、導電膜29に挾持された第2の層
間絶縁膜28、 d)多結晶シリコン22、ゲート電極24と電気的接続
を有す透明導電膜26、 e)多結晶シリコン22、ゲート電極24と電気的接続
を有す導電膜29、 f)以上を透明導電膜26、光センサー層27、第2の
層間絶縁膜28、導電膜29の順番に積層されているこ
とを特徴とする固体撮像装置。
[Claims] a) A solid-state imaging device in which a driver circuit including an optical sensor and a thin film transistor is integrated on a transparent substrate, and light is incident through the transparent substrate, b) a transparent conductive film 26 and a conductive film 29; a sandwiched photosensor layer 27; c) a second interlayer insulating film 28 sandwiched between the transparent conductive film 26 and the conductive film 29; d) a transparent conductive film electrically connected to the polycrystalline silicon 22 and the gate electrode 24; 26, e) polycrystalline silicon 22, a conductive film 29 electrically connected to the gate electrode 24; A solid-state imaging device characterized in that the solid-state imaging device is laminated with.
JP1058906A 1989-03-10 1989-03-10 Solid-state image sensing device Pending JPH02238666A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1058906A JPH02238666A (en) 1989-03-10 1989-03-10 Solid-state image sensing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1058906A JPH02238666A (en) 1989-03-10 1989-03-10 Solid-state image sensing device

Publications (1)

Publication Number Publication Date
JPH02238666A true JPH02238666A (en) 1990-09-20

Family

ID=13097855

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1058906A Pending JPH02238666A (en) 1989-03-10 1989-03-10 Solid-state image sensing device

Country Status (1)

Country Link
JP (1) JPH02238666A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5294811A (en) * 1990-11-30 1994-03-15 Hitachi, Ltd. Thin film semiconductor device having inverted stagger structure, and device having such semiconductor device
US6004831A (en) * 1991-09-25 1999-12-21 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating a thin film semiconductor device
KR100538068B1 (en) * 1999-06-30 2005-12-20 매그나칩 반도체 유한회사 Method for fabricating CMOS image sensor with improved photo sensitivity

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5294811A (en) * 1990-11-30 1994-03-15 Hitachi, Ltd. Thin film semiconductor device having inverted stagger structure, and device having such semiconductor device
US6004831A (en) * 1991-09-25 1999-12-21 Semiconductor Energy Laboratory Co., Ltd. Method for fabricating a thin film semiconductor device
US6979840B1 (en) * 1991-09-25 2005-12-27 Semiconductor Energy Laboratory Co., Ltd. Thin film transistors having anodized metal film between the gate wiring and drain wiring
KR100538068B1 (en) * 1999-06-30 2005-12-20 매그나칩 반도체 유한회사 Method for fabricating CMOS image sensor with improved photo sensitivity

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