JPH0223760A - Telephone system - Google Patents

Abstract

PURPOSE:To reduce the power consumption of refreshment(REF), and to attain the buckup of long time by low power by receiving the output of a power failure detection circuit by a refreshment circuit, and changing the period of REF into the period longer than that at non-power-failure time. CONSTITUTION:When power failure occurs during standby or communication, a power failure detection signal is generated from the power failure detecting circuit 26, and power is supplied to DRAMs 19, 20 from a backup power source 24 until the power failure is restored. Simultaneously, an REF switch signal is outptutted from an OR circuit 22 so that REF of the DRAMs 19, 20 is performed in an extended period. Thus, the power consumption of REF is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a telephone device such as an answering machine that uses a dynamic RAM (DRAM) as a voice memory or the like.

(Prior Art and Problems to be Solved by the Invention) In recent years, small-sized, large-capacity DRAMs are being used in place of magnetic tapes as voice memories for answering machines and the like. D
RAM requires refreshment, and the standard refreshment period is several ms. Therefore, in conventional telephone devices using DRAM, refreshment is constantly performed at a cycle of several milliseconds, and therefore a considerable amount of power is consumed even when the telephone is not in use.

Therefore, conventional devices need to be constantly supplied with power from a commercial power source, and the battery life of the backup power source does not last long in the event of a power outage. There are drawbacks such as the need for a configuration that can accommodate changes in impedance.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a telephone device that can reduce refreshment power consumption as much as possible and perform long-term backup with low power. Still another object is to provide a telephone device that can be driven steadily using a local power source or a battery without using a commercial power source.

[Structure of the Invention] (Means for Solving the Problems) The present invention includes a memory using a dynamic RAM,
In a telephone device that is capable of writing and reading out transmitted information or received information during a call in this memory, there is a power supply circuit that supplies power to each part of the telephone device including the memory, and a power outage detection circuit that detects a power outage in this power supply circuit. It is equipped with a backup power supply that backs up the memory in the event of a power outage, and a refreshment circuit that refreshes the memory, and this refreshment circuit receives the output of the power outage detection circuit and makes the refreshment cycle longer than that in the case of a non-power outage. The present invention provides a telephone device characterized by changing the telephone device.

Further, the present invention provides a telephone device as described above, which includes means for detecting that writing or reading of the memory is not performed, and upon receiving the output of the detecting means, the refreshment circuit writes the refreshment period. Alternatively, the present invention provides a telephone device characterized in that the period is changed to a longer period than when reading.

(Function) According to the above-mentioned first configuration, when the power supply circuit is out of power, refreshment is performed at a longer cycle than when the power is turned on, so power consumption during backup is reduced. Therefore, long-term backup is possible. Furthermore, according to the second configuration, when writing/reading is not being performed on the memory, refreshment is performed at a longer cycle than when writing/reading, so the average power consumption during a call is also reduced. Therefore, it is possible to use a local power source or a battery with a small current capacity as a power source.

Furthermore, considering the performance of DRAM currently in use,
Under normal usage conditions, the refreshment period can be extended to about 10 times the standard period (several ms) without affecting the memory contents.

(Example) Examples will be explained below.

FIG. 1 shows a block configuration of an answering machine according to an embodiment of the present invention.

A bell detection circuit 1 for detecting incoming calls is connected to the office line connection terminals Ll and L2, and its output is input to a control section 2 consisting of a microcomputer that controls each part of the telephone. In addition, the office line connection terminals Ll, L2
An internal communication line 4 of the telephone is connected to the internal communication line 4 via a rectifier bridge 3, and a line capture switch 5 is inserted into this internal communication line 4. The line capture switch 5 is closed to capture the central office line.

Furthermore, when making a call, when the handset 6 is taken off-hook, the hook switch 7 is closed and the line capture switch 5 is turned on to capture the central office line.

A communication circuit 8 is connected to the internal communication line 4, and the internal communication line 4, which is a two-line line, is converted into a four-line line including a transmission line and a reception line within the communication circuit 8. A transmitter line (not shown) of the telephone circuit 8 includes a transmitter 9 of the handset 6.
, the MF signal output of the control section 2 or the playback output of the voice recording/playback circuit 10 for recording and playing a message are selectively connected in accordance with a transmission switching signal from the control section 2. Note that a low-pass filter 11 is inserted between the playback output of the voice recording and playback circuit 10 and the telephone call circuit 8 in order to remove noise during playback.

A receiving line (not shown) of the telephone communication circuit 8 includes a receiver 12 of the handset 6, one input terminal of a recording selector switch 113 for selecting a recorded voice to be sent to the voice recording and reproducing circuit 10,
A call end detection circuit 14 which mainly detects the end of a call based on a voltage change in the receiving line and notifies the controller 2 of the call, and a PB receiver 15 which decodes a button signal from the central office line and sends it to the controller 2 are connected to the terminal. . The other input terminal of the recording changeover switch 13 is connected to the microphone 16 , and either the microphone 16 or the receiving line of the communication circuit 8 is selectively switched to the voice recording/reproducing circuit 10 by the recording changeover signal from the control section 2 . It is now connected to the recording input.

Note that an audio input amplifier 17 for adjusting the recording level and a low-pass filter 18 for removing recording noise are inserted between the output of the recording changeover switch 13 and the recording input of the audio recording/playback circuit 10.

The voice recording and reproducing circuit 10 records and reproduces various messages according to commands from the control section 2, and is connected to DRAMs 19 and 20 for storing messages. The capacity and number of DRAMs 19 and 20 are determined depending on the number of messages to be handled, the time per message, and the like. The audio recording/playback circuit 10 includes a crystal oscillator 21 that emits a reference frequency signal, and generates DRAM drive signals (RASCAS, WE, etc.) based on the reference frequency signal.
etc.), and these drive signals drive the DRAM 19.
20 writes, reads, and refreshes.

In this case, when the audio recording and reproducing circuit 10 receives a refresh period switching signal from an OR circuit 22 (to be described later), it extends the refreshment period to a predetermined number of times (for example, 10 times) the standard value (several ms). The details of this audio recording/reproducing circuit 10 are shown in FIG. 2 and will be explained later.

This embodiment has, as a power source, an AC power supply circuit 23 that receives power from a commercial AC power source and generates a DC voltage, and a backup power source 14 using a battery that is used to back up the DRAM 19, 20 in the event of a power outage. The output power of the AC power supply circuit 23 is supplied to D via the constant voltage regulator 25.
It is supplied to RAMI 9.20 and also to each part of the telephone. A power outage detection circuit 26 is connected to the output of the AC power supply circuit 23, detects a power outage in the power supply circuit 23, and notifies the control section 2 of the power outage. When the control section 2 learns of a power outage, it turns on a backup start switch 27 connected to the backup power source 24 to start supplying power from the backup power source 24. At this time, the transistor of the constant voltage regulator 25 is turned off, and the backup power supply 24 is disconnected from the AC power supply circuit 23 and the power failure detection circuit 26.

A power failure detection signal from the power failure detection circuit 26 and a recording/playback non-execution signal from the control unit 2 indicating that recording/playback is not being executed are input to the OR circuit 22, and the refresh cycle switching signal is generated by the logical sum of both signals. is starting to occur.

Here, the control unit 2 is programmed to output a recording/playback non-execution signal in the following cases.

l) When the phone is in standby mode. That is, when the incoming call has not yet been answered. This is determined by the hook information from the hook switch 28 connected to the control unit 2 in the normal telephone mode, and by whether or not a line capture signal for automatic answering is output in the answering machine mode. to decide.

2) When the call has already ended even after the incoming call has been answered. This is determined based on the detection signal from the end of call detection circuit 14.

3) Even if a call is in progress, the voice recording/playback circuit 10 is not performing recording/playback or stopping at that time.

This is determined based on the operation signal from the audio recording and reproducing circuit 10.

Therefore, refreshment is performed at the standard cycle only during recording/playback or when it is stopped, and at other times refreshment is performed at an extended cycle.

A key matrix 29 is connected to the control unit 2, and based on the key information from the key matrix 29, the control unit 2 controls the transmission of an MF signal when making a call, the recording control of answering messages and messages, and the normal telephone mode. and switch to answering mode, control the playback of messages from the other party, etc. The control unit 2 also controls the PB after the automatic response.
Based on the PB signal decoding information sent from the receiver 15, recording control of the other party's message is performed.

Next, the operation of this embodiment will be explained.

Assuming that the answering mode is currently set and the system is in standby mode, the control unit 2 is outputting a recording/playback non-execution signal, the OR circuit 22 is outputting a refresh cycle switching signal, and the voice recording/playback circuit 10 is outputting a refresh cycle switching signal. refreshes the DRAMs 19 and 20 at an extended period.

When an incoming call is received in this state, the incoming call is detected by the bell detection circuit 1, a line capture signal is issued, the line switch 5 is closed, and the central office line is captured. Subsequently, the answering machine message in the DRAMI 9 is read out by the voice recording/reproducing circuit 10 and sent to the central office line via the telephone communication circuit 8 for automatic response. At this time, the output of the recording/playback non-execution signal is stopped by the control unit 2 when the audio recording/playback circuit 10 starts playing, and the refreshment during playback is stopped by the DR.
This is performed at standard intervals between AM read operations. When the playback ends, the recording/playback non-execution signal is outputted again, and refreshment is performed again at an extended period.

After that, when the voice recording/playback circuit 10 starts the recording operation to record a message from the other party, the output of the recording/playback non-execution signal is stopped again and the refreshment is performed in the DRAM.
This is done at standard intervals between write operations. When the recording ends, the recording/playback non-execution signal is outputted again, and the refreshment period returns to the extended period. Subsequently, the line switch 5 is released and the telephone returns to the standby state.

Furthermore, if a power outage occurs during standby or during a call, the power outage detection circuit 26 will issue a power outage detection signal, so the backup power supply 24 will use the DRAM 19.2 until the power outage is restored.
0 is supplied with power, and refreshment is performed at an extended period.

In this way, the refreshment period is the standard period only during recording/playback operation or when the time is stopped, and at other times it is an extended period, for example, 10 times the standard period, so the overall power consumption is significantly reduced. The power consumption, especially during backup, is reduced to nearly 1/10, and the backup power supply is 24 times smaller.
The lifespan of will be extended by nearly 10 times. Furthermore, in the above embodiment, the AC power supply circuit 23 that receives power from the commercial power supply is used as a power supply during steady state, but since the power consumption is reduced,
It is also possible to use a local power supply or battery with a relatively small current capacity. Note that, according to the performance of DRAMs currently in practical use, under normal temperature conditions in Japan, stored contents can be sufficiently retained even with a refresh cycle that is about 10 times the standard refresh cycle.

FIG. 2 is a block diagram showing the internal configuration of the audio recording/reproducing circuit 10 of FIG. 1.

Voice analysis and synthesis circuits 101 and D for processing voice signals.
/A converter 102 is provided.

During recording, the audio analysis and synthesis circuit 101 samples an analog input audio signal ADin from the outside, converts it into a digital code, and sends it to the DRAM interface 103. D.R.
The AM interface 103 provides the audio data from the audio analysis and synthesis circuit 101 to the DRAM as write data Din. Furthermore, during playback, data D out read from the DRAM is input to the speech analysis and synthesis circuit 101 through the DRAM interface 102 . The speech analysis and synthesis circuit 101 converts the coded data I)out into a voltage level and sends it to the D/A converter 103.

The D/A converter 103 converts the output of the audio analysis and synthesis circuit 101 into a temporally continuous signal and outputs an output audio signal ADout.
Send it to the outside as

Write/read addresses are specified using address counter 1.
04. This address counter 104 is
Addresses AO to An are divided into row addresses and column addresses and output. The index register 105 stores the start address of the area where each message is stored, and the start address is specified from the index register 105 when recording/playback of each message is started.

The stop address register 106 stores the final address of each message area. The refresh counter 107 specifies refreshment addresses, and specifies only row addresses.

A row address strobe signal RAS (hereinafter referred to as RAS signal) and a column address strobe are generated by the timing generator 108 and applied to the DRAM through the DRAM interface 102. Further, from the timing generator 108, the speech analysis and synthesis circuit 101,
Address counter 104, index register 105
, a drive signal is applied to the stop address register 106 and the refresh counter 107.

In other words, the timing generator 108 comprehensively controls the operation timing of each section during recording/playback and refreshment.

The timing generator 108 is connected to a control section (see number 2 in FIG. 1) via a CPU interface 109.
It operates/stops, records/plays/- based on the chip enable command CE, playback command RD, recording command WR and control data DO-Di+ from the CPU.
Controls operating conditions such as time and stop. At the same time, timing generator 108 writes information indicating the current operating state to status register 110. This information is sent from the status register 110 to the CPU of the control unit 2 via the CPU interface 109.

The refresh cycle switching signal is input to the timing generator control circuit 111. Upon receiving the refresh cycle switching signal, the timing generator control circuit 111 controls the timing generator 108.
A control signal is sent to extend the refreshment period. When the timing generator 108 is not receiving the control signal, that is, during recording/playback/stop, the timing generator 108 generates RA based on the reference frequency signal from the crystal oscillator 21 so that refreshment is performed at the standard cycle.
Generates the S signal, CAS signal, WE multiplication signal, and drive signals for each part. In addition, when receiving the above control signal, (RAS
(If it is only refreshment), the pulse width of the RAS signal and the count period of the refresh counter 107 are extended.

FIG. 3 shows a timing chart when RAS-only refreshment is performed on a 1 Mbit DRAM by the audio recording/reproducing circuit configured as described above.

In this case, while the DRAM is not writing or reading, specify the row address AO-A8 from the refresh counter 07, and add the down edge input of the RAS signal from the timing generator 108 for each count, and input the down edge of the RAS signal from the timing generator 108. The 512 rows (rows) are refreshed one after another. FIG. 3(a) shows a case where no refresh cycle switching signal is input, and all 512 rows are refreshed once at a standard cycle, for example, every 8 ms. Therefore, refresh address designation and down edge input of the RAS signal are performed every 81512 ms. Figure 3(b) shows the case where the refresh cycle switching signal is input, and the refresh address designation and down edge manual cycle of the RAS signal is extended by 10 times to 80m5.
Refreshment is performed once on all 512 rows each time.

By the way, in the above embodiment, the case where a DRAM is used as the voice memory of an answering machine has been described as an example, but it is obvious that the present invention can be applied to other uses such as an image memory. As for the refreshment method, it goes without saying that the present invention can be applied not only to RAS-only refreshment but also to other methods such as self-refreshment.

〔Effect of the invention〕

As explained above, according to the present invention, the refreshment cycle can be changed to a longer cycle than usual depending on the state of the telephone device, so long-term backup is possible, and the station power supply and battery Steady operation is also possible by supplying power from the

Furthermore, it becomes easy to cope with the increase in the capacity of DRAM.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the telephone device according to the present invention, FIG. 2 is a block diagram showing the internal configuration of the voice recording/playback circuit of the embodiment of FIG. 3 is a timing chart of RAS-only refreshment performed by the circuit shown in the figure. DESCRIPTION OF SYMBOLS 1... Bell detection circuit, 2... Control section, 4...
・・Internal call line, 5・・Line capture switch, 8・・
-Telephone circuit, 10...Voice recording and playback circuit, 14...
end of call detection circuit, 19.20... dynamic RAM,
21・Crystal oscillator, 22...OR circuit, 23...A
C power supply circuit, 24... backup power supply, 26...
Power failure detection circuit, 27... backup start switch,
28... Hook switch, 101... Voice analysis and synthesis circuit, 102... DRAM interface, 103...
...D/A converter, 104...Address counter, 1
05... Index register, 106... Stop address register, 107... Refresh counter, 108... Timing generator, 109...
-CPU interface, 110...Status register, 111...Timing generator control circuit. Applicant's agent Mr. Sato

Claims (1)

[Scope of Claims] 1. A telephone device equipped with a memory using dynamic RAM, in which information transmitted or received during a call can be written and read, wherein each part in the telephone device including the memory A power supply circuit that supplies power, a power failure detection circuit that detects a power outage in this power supply circuit, a backup power supply that backs up the memory in place of the power supply circuit in the event of a power outage, and a refreshment circuit that refreshes the memory. A telephone device, characterized in that said refreshment circuit has means for changing a refreshment period to a period longer than when electricity is applied in response to an output of said power failure detection circuit. 2. In a telephone device equipped with a memory using dynamic RAM and capable of writing and reading information transmitted or received during a call to this memory, a power supply circuit that supplies power to each part in the telephone device including the memory. and a backup power supply for backing up the memory in the event of a power outage of the power supply circuit, means for detecting that writing or reading is not performed on the memory, and a refreshment circuit for refreshing the memory,
A telephone device characterized in that said refreshment circuit has means for changing a refreshment period to a period longer than when writing or reading is being performed in response to the output of said detecting means.