JPH022306B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a static induction thyristor that has a high blocking voltage, a low forward voltage drop, and a high switching speed.

[Prior art]

Conventional thyristors, which basically consist of a pnpn four-layer structure, have the disadvantage that it is difficult to switch off using a gate electrode, and even if it is possible to switch off using a gate, the speed is extremely slow. On the other hand, an electrostatic induction thyristor (hereinafter referred to as an SI thyristor) having a diode structure with a gate has the advantage that it is extremely easy to shut off with the gate and that the shutoff time is quick. FIG. 1 shows a typical structural example of an SI thyristor and a drawing explaining its operating principle. Figure 1a
is a cross-sectional view of a typical example of a surface gate structure of an SI thyristor.

Figure 1b shows the potential distribution when the cross section of the channel between gates is cut off, Figure 1c and d
is the potential distribution when the cathode and the anode are cut off, and FIG. 1 e and f are the potential distribution when the gate and the anode are cut off.

In FIG. 1a, p ⁺ regions 11 and 14 are an anode region and a gate region, n ⁺ region 13 is a cathode region, and n ⁻ region 12 is a region constituting a channel. 11', 13', 14' are Al, Mo, W,
The anode electrode, cathode electrode, and gate electrode are made of Au or other metals, low-resistance polysilicon, or a multilayer structure thereof.
Reference numeral 16 denotes an insulating layer of SiO ₂ , Si ₃ N ₄ , Al ₂ O ₃ , AlN, etc., or another insulating layer, or a composite insulating layer or multilayer insulating layer of these. The reason why a cutoff state in which no current flows is achieved even when a predetermined positive voltage is applied to the anode will be explained using the potential distributions shown in FIGS. 1b to 1f. FIG. 1b shows the potential distribution in the channel cross-sectional direction when a predetermined reverse bias (including V _g =0) is applied to the gate. All potential distributions after this are shown for electrons, and the lower the potential, the easier it is for electrons to reach. Therefore, positively charged holes are exactly the opposite, and the higher the potential, the easier they reach.
Potential 0 in FIG. 1 indicates the potential of the cathode. V _bi in figure b is the diffusion potential between the gate and channel. If the potential V _g ^* at the center of the channel is sufficiently larger than the thermal energy KT (K: Boltzmann's constant, T: temperature) possessed by electrons, almost no electrons will be injected from the cathode to the anode side beyond this barrier. Figures 1c and d show the potential distribution from the cathode to the anode in the center of the channel. The anode voltage V _a at d is larger than in figure c. Shown on the anode side
V _bi is the anode-channel diffusion potential.
Electron injection from the cathode side is inhibited by the point of maximum potential occurring in front of the cathode, that is, by the potential barrier -V _g ^* of the intrinsic gate. On the other hand, on the anode side, since the n ^- region 12 near the anode remains without being completely depleted, hole injection into the channel region is suppressed by the diffusion potential of the p ⁺ n ^- junction. In other words, when we look at the path from the cathode to the anode, we see that it has a diode structure of n ⁺ n ^- p ⁺ , which explains why no current flows even when a forward voltage is applied to it. In other words, a potential barrier is generated on the cathode side and the anode side to suppress carrier injection, respectively, thereby suppressing the flow of current. Furthermore, when the anode voltage V _a is increased, the potential distribution becomes the first
Figure d. On the cathode side, as the anode voltage V _a increases, the reverse gate voltage V _g is
A sufficiently high potential barrier can always be created by increasing the voltage within the range of the breakdown voltage between the gates. It is said that there is sufficient breakdown voltage between the gate and cathode to achieve the maximum forward blocking voltage. However, as the anode voltage _V a further increases, the anode side becomes n ^- region 1.
If 2 becomes almost completely depleted up to the anode region, the potential barrier that suppresses hole injection becomes smaller as shown in the figure. In this case, electron injection on the cathode side is suppressed, but
Holes will be injected from the anode side,
The hole flows towards the side with higher potential. In this case, holes flow into the vicinity of the intrinsic gate, so the potential barrier of the intrinsic gate is substantially lowered, electron injection from the cathode occurs, and current begins to flow. This condition will provide the maximum forward blocking voltage.
Of course, if the withstand voltage between the gate and cathode is not sufficient, a sufficient potential barrier will not be formed on the cathode side, and even if hole injection is sufficiently suppressed on the anode side, electron injection will occur from the cathode side, resulting in a current may start flowing.

Figures 1e and 1f show the potential distribution between the gate and anode with respect to V _a in Figures c and d. The gate and anode have a p ⁺ n ^- p ⁺ structure, and when a positive voltage V _a is applied to the anode and a reverse bias (negative voltage) (including V _g = 0) is applied to the gate, the gate The side will be biased in the reverse direction and the anode side will be biased in the forward direction. Therefore,
The depletion layer will expand from the gate side toward the anode. The electric field strength is strongest in the n ^- region near the gate. The electric field distribution between the gate and the anode is changed to
Shown in Figure g. The maximum electric field strength E _nax must of course be smaller than the threshold electric field E _B for avalanche initiation. If E _nax exceeds E _B in a voltage application state where the potential barrier on the cathode side and anode side disappears, the maximum forward blocking voltage is determined to be this voltage.

[Problem to be solved by the invention]

The characteristics required of a thyristor, which is a high-power switching device, are (1) maximum forward blocking voltage V _{Ba nax} : large, (2) voltage amplification factor μ: large (large blocking voltage with as small a gate voltage as possible). (realization), (3) Current Ia during conduction: large, (4) Voltage drop V _fd during conduction: small ((3) and (4) mean small resistance during conduction), (5) The switching speed is fast, and (6) the current gain G when shutting off is large.

In order to increase the blocking voltage, l ₂ in FIG. 2 must be made longer. However, if the length is increased beyond a certain point, in this structure, the electric field velocity E _nax near the gate increases, exceeding the threshold electric field E _B for starting an avalanche, and the maximum blocking voltage is determined by the avalanche. become. The threshold electric field for starting an avalanche is approximately 200 _KV /cm for Si, and a little higher for _GaAs , although it depends on the thickness of the region. In addition, unnecessarily increasing l ₂ increases the running time of the carrier, slowing down the switching speed, and also reduces the voltage drop V _fd when conducting.
Make it bigger. In conventional thyristors, there is no guideline for designing the optimal length _l2 , and the above (1) ~
It was impossible to satisfy all requirements (5).

In order to increase the switching speed, it is necessary to reduce the capacitance of the gate, and it is necessary to make the gate as small as possible, but there are limits to microfabrication technology. Furthermore, if the gate is made too small, the leakage current at the time of interruption becomes large, so the gate size cannot be made infinitely small.

For high-speed switching, an insulated gate thyristor without carrier injection from the gate at turn-on is preferable;
The drawback was that the turn-off characteristics deteriorated because the holes could not be sucked out when turned off.

[Purpose of the invention]

The object of the present invention is to eliminate the above-mentioned drawbacks, to provide a static induction thyristor with a small gate capacitance, a small voltage drop, a large maximum forward blocking voltage, and a fast switching speed, and to provide an optimum design and guideline for the electrostatic induction thyristor. It is about providing.

Another object of the present invention is to provide an electrostatic induction thyristor that can perform particularly effective high-speed switching when a MOS gate is used as the drive gate.

[Summary of the invention]

The present invention will be described below with reference to the drawings.

As long as the maximum blocking voltage allows, the thinner the n ^- region 12 is, the faster the switching speed, the greater the current flow, and the smaller the voltage drop. To do so, the internal electric field strength must be as uniform as possible and kept below the avalanche threshold electric field strength E _B. To make the field strength uniform, n ^-
The lower the impurity density N _D of the region 12, the more desirable. However, if the impurity density in the region 12 is too low, the region near the anode will be completely depleted at a low anode voltage. The hole injection suppression mechanism on the anode side becomes ineffective, and the maximum blocking voltage V _{Ba nax} decreases.

FIG. 2a is a plan view of the split gate structure of the SI thyristor of the present invention, and FIG. 2b is a cross-sectional view of one channel taken along line AA' in FIG. 2a. Second
Figures C and d are potential distributions between the gate and anode.

In order to make the internal electric field strength as uniform as possible and to prevent current from flowing up to a predetermined anode voltage, a structure as shown in FIG. 2a may be used. That is, most of the region between the gate and the anode is constituted by the ^n-- region 12 having an extremely low impurity density, and it is sufficient to provide the n-region 15 having a relatively high impurity density only in the vicinity of the anode.

The P ⁺ region 14 is a drive gate, and a drive gate electrode 14' for applying a potential to the drive gate is formed thereon. The other P ⁺ region 14'' is a region independent from the P ⁺ region 14, and a fixed potential including zero is applied to the electrode 14 in order to set the potential of the channel region.
More given. The P ⁺ region 14'' is called a fixed potential gate, and the electrode 14 is called a fixed potential gate electrode.The fixed potential gate region 14'' also serves as a hole sucking region, and 14 is directly connected to the cathode electrode 13'. Also good. The other areas are the first
It is exactly the same as Figure a.

FIG. 2d shows a potential diagram when the value of V _a is larger than that in FIG. 2c. The role of each area is the same as in FIG. A new n region 15 is provided adjacent to the anode. The maximum blocking voltage V _{Ba nax} is determined by the thickness of the ^n-- region 12, and the n-region 15 suppresses hole injection on the anode side.

The potential distribution in FIG. 2d corresponds to the situation where approximately the maximum blocking voltage is applied. The depletion layer extending from the gate enters into the n region 15 and almost reaches the anode region.
At that time, the maximum electric field _Enax at the junction surface of the gate region in the ^n-- region is set to a value slightly smaller than the threshold electric field value E _B for starting an avalanche (Fig. 2e), and no avalanche has started. In this voltage application state, it is desirable that the reverse bias applied to the gate is also designed to be close to the gate-cathode breakdown voltage. The closer the gate and cathode are provided, the shorter the flow in the direction of the anode of the gate, and the higher the voltage can be blocked, the smaller the forward voltage drop V _fd can be. If the thickness of the n-region 15 is too thick, a large amount of region that does not become a depletion layer remains in the n-region 15 even when the maximum blocking voltage is applied, resulting in a long portion where the potential is flat. That is, the gate opens and electrons flow into the n region 15.
Even if electrons accumulate and the anode side barrier disappears,
The injection efficiency of holes injected from the anode to the channel side decreases, and at the same time, the hole injection speed slows down, causing a deterioration in the switching speed and an increase in V _fd . Therefore, the thinner the n-region 15 is, the more desirable it is. In order to make the depletion layer almost reach the anode in a thin region and at a predetermined maximum blocking voltage, it is desirable that the impurity density of n region 15 be as high as possible. However, the higher the impurity density in the n-region 15, the greater the amount of electrons that must flow into that region in order to lower the hole potential barrier, resulting in a somewhat slower switching time.

If the impurity density of the n ^-- region 12 is N _D1 , the gate region 14 when the n ^-- region 12 is completely depleted
The difference in electric field strength between the edge and the area adjacent to the n-region 15 is
It is approximately given by N _D1ql2 /ε. q is unit charge, ε
is the induction factor. If l ₂ = 500 μm, N _D1 = 1
×10 ¹³ cm ^-3, the value of N _D1ql2 /ε is approximately 80 KV/cm. Electric field strength at gate edge
If E _nax is suppressed to 150KV/cm, l ₂ = 500μm
A blocking voltage of approximately 5500V is achieved. E _nax
If it is allowed to reach 180KV/cm, a blocking voltage of about 7000V can be achieved at l ₂ =500μm. N _D1 = 1×10 ¹² cm ^-3
Then, N _D1ql2 /ε becomes approximately 8KV/cm. At this time, the gate end electric field intensity E _nax is 150KV/
cm, and if l ₂ =500 μm, a blocking voltage of about 7200V is achieved. Let l ₂ be, for example, 50 μm. N _D1 =
When N D1 = 1 x 10 ¹³ cm ^-3 , the value of N _D1ql2 /ε is approximately 8 KV/cm, and when N _D1 = 1 x 10 ¹² cm ^-3 , N _D1ql2 / ε is approximately 0.8 KV/cm. cm.
By suppressing E _nax to 150 KV/cm, this SI thyristor achieves maximum forward blocking voltages of around 730 V and 750 V, respectively. N _D1 1×10 ¹³ cm
If the value is about ^-3 , for example, a blocking voltage of 400V can be achieved with l ₂ of 27 μm or less. n ^--area 12
The electric field strength at the boundary between and n region 15 is E _nax −
It is given by N _D1ql2 /ε. Therefore, the impurity density N _D2 and the thickness l ₃ of the n region 15 are determined so as to approximately satisfy the following relationship.

E _nax −N _D1ql2 /ε=N _D2ql3 /ε ...(1) If N _D2 = 1×10 ¹⁶ cm ^-3 , l ₃ of about 1 μm is sufficient, and N _D2 = 1×10 ¹⁷ cm ^-3 Then l ₃ is 0.1~
0.2 μm is sufficient. If N _D2 =1×10 ¹⁵ cm ⁻³ , l ₃ is about 10 μm or less. Maximum blocking voltage
V _{Ba nax} is approximately given by the following formula.

V _{Ba nax} ≒ (E _nax −N _D1ql2 /2ε)l ₂ +N _D2ql2 ² /2ε ...(2) In order to achieve this value, the withstand voltage between the cathode and gate must be high and the gate must be sufficiently reverse biased. This is only possible when the gate can create a sufficient potential barrier to prevent electron injection from the cathode side. E _nax may be determined in relation to the threshold voltage E _B for starting an avalanche. According to equation (2), it is found that in order to achieve a large blocking voltage with l ₂ as thin as possible, it is desirable that N _D1 be as small as possible.
That is, it is desirable that the region 12 be an intrinsic semiconductor or an i-region substantially close to an intrinsic semiconductor.
That is, it is sufficient to choose N _D1ql2 /2ε to be sufficiently small compared to E _B so that it can be ignored.

In this way, in the SI thyristor of the present invention, the potential barrier height of the specific gate on the cathode side and the potential barrier height on the anode side are adjusted so that the maximum forward blocking voltage V _{Ba nax} is achieved with a device thickness as thin as possible. Considerations are taken to ensure that the electric field strength at the junction surface of the gate region and the gate region does not exceed the avalanche threshold electric field E _B. Since the internal electric field strength is approximately uniform, the current value when the conductive state is established is large, and at the same time, the forward voltage drop is low. Furthermore, even when a reverse bias is applied to the gate to shut it off, a considerable amount of the carrier is drifting, so the switching time is short.

[Embodiments of the invention]

Other embodiments of the present invention will be described. In the following structure, only one channel will be shown.
In order to obtain a large current, a multi-channel structure in which many of these are arranged in parallel can be used.

Figure 3 shows the SI of the present invention with a buried gate type structure.
It is an example of the cross-sectional structure of a thyristor. A p ⁺ drive gate region 14 and a p ⁺ fixed potential gate region 14'', which are mutually independent divided gates, are embedded in the ^n-- region 12 in a mesh shape, stripe shape, etc. The cathode n ⁺ region 13 is a channel It protrudes toward the center. Also between the gate and cathode.
Although this area is the same as ^n-- area 12, it often changes depending on the manufacturing method. Since the high resistance region exists between the gate and the cathode, the breakdown voltage between the gate and the cathode is high and the capacitance thereof is small. Third
Although the figure shows a case in which the cathode n ⁺ region extends over the entire main surface, it may also have a structure in which it protrudes only near the center of the channel toward the center of the channel. Of course, there is no such protrusion,
The n ⁺ region 13 may be flat. This buried gate structure has the disadvantage that the gate resistance tends to be high and the switching speed is slow, so the gate stripes may be shortened and metal electrodes may be provided on the surface.

17 in FIG. 4 is an insulating layer. A p ⁺ drive gate region 14 is provided above the insulating layer.
In this structure, the main part of the gate region 14 does not need to be single crystal, and may be polycrystalline or porous crystal. Since the insulating layer 17 is provided at the bottom of the gate region, only a small amount of holes flowing from the anode flow into the drive gate, resulting in an SI thyristor with a large current gain (turn-off gain).

On the other hand, there is no insulating layer below the p ⁺ fixed potential gate region 14'', so that holes can be sucked out efficiently.

5 and 6 are examples of insulated gate type SI thyristors. Since the SI thyristor performs on/off control by controlling the potential of the channel with the gate, the gate structure is not limited to the junction type, and basically any structure may be used.

FIG. 5 shows a structure in which an insulated gate serving as a driving gate is provided on the main surface. The electrons in the cathode region are controlled by the drive insulated gate 14' and are directed laterally approximately along the main surface, starting with a channel surrounded by the insulated gate (hereinafter referred to as MOS gate) and the p-region 14'' of the fixed potential gate. FIG. 5b shows a cross-sectional structure of the cathode region of FIG. 5a in the direction perpendicular to the plane of the paper.
4 is provided. 14 may be given an independent potential or may be left in a floating state. Of course, it may be directly connected to the cathode electrode 13'. In this case, most of the holes injected from the anode flow into the p region 14'' and the holes injected from the anode flow into the electrode 14''.
4 to the cathode electrode 13',
The hole has good drainage and the operation speed is fast. Naturally, since it is a MOS gate, the current gain is extremely large. When the P region 14'' is in a floating state, due to the holes flowing into the P region 14'',
It behaves the same as a conventional thyristor, and may not be able to be shut off by a MOS gate. Most of them are operated by being directly connected to the cathode electrode or by applying an independent potential. Figure 5c is Figure 5a
This is an example of an improved version of . The fifth example is an example in which MOS gates are uniformly provided between adjacent cathode regions.
Figure a. This structure tends to create a reverse electric field for electrons that should originally flow toward the anode near the center, so in Figure 5c, the thickness of the insulating layer near the center is increased to prevent the appearance of a reverse electric field. I'm suppressing it. Figure 5: The thickness and impurity density of the p-fixed potential gate region are
It is sufficient to prevent current from directly flowing between the cathodes due to punching through. at the same time,
Since a current flows through the p-region 14'', the dimensions and impurity density may be selected so that the voltage drop caused by the flowing current is sufficiently small to be ignored.It is desirable that the impurity density is relatively high.

The drive gate in FIG. 5 may be a shot electrode.

FIG. 6 shows another embodiment of the SI thyristor of the present invention. Figure 6a shows an example of a split gate structure in which a p ⁺ drive gate region 14 and a p ⁺ fixed potential gate region 14'' are provided on the bottom surface of the cut region. An example in which p ⁺ regions 14 and 14'' are provided on the side surfaces and used as gate regions is shown in FIG. 6b. The structure reduces the capacitance between the gate and cathode and improves the withstand voltage between the gate and cathode. In the structure shown in FIG. 6a, in which the p ⁺ regions 14, 14'' are located on the entire bottom surface of the notch region, the current gain tends to be small because there are many holes flowing into the gate. In FIG. 6b, since the gate region is small, The current flowing into the gate is small and the current gain is large. Figs. 7 to 11 all show examples in which the fixed potential gate is directly connected to the cathode.

In FIG. 7, the p ⁺ region 14 is a drive gate, and the p ⁺ region 14'' is a fixed potential gate.Since the drive gate is reduced by half, the capacitance is reduced, the operating speed is increased, and at the same time the drive gate is The amount of holes flowing into the gate is reduced, increasing current gain.

FIG. 8 shows an example in which an insulating layer is provided on the bottom surface of the drive gate to further increase the current gain. In this example, the amount of holes flowing into the drive gate is much smaller, and the current gain is significantly improved.

One of the drawbacks of the split gate structure is that when a large reverse gate bias is applied to the drive gate to block large voltages, a punch-through current flows between the fixed potential gate and the drive gate. FIG. 9 shows an example in which the punching-through current between the gates, which can be said to be the only drawback of the split gate, is extremely reduced while taking advantage of the features of the split gate.
In FIG. 9, an insulating layer is provided on the side surface of the fixed potential gate along the channel. Some or many of the holes from the anode flow into the bottom of the fixed potential gate and become a current at the cathode electrode.

FIG. 10 shows an example of a split gate structure in which a MOS gate is used as the drive gate to increase current gain and improve hole drainage.

Although FIGS. 7 to 10 show an example in which the drive gate and the fixed potential gate are provided to almost the same depth, it is not necessary to do so. By providing the fixed potential gate deeper, hole extraction efficiency can be improved and large voltages can be more easily interrupted.

FIG. 11a shows an example of a planar gate structure corresponding to FIG. 2 in which the gate regions 14, 14'' have a wider area at a distance from the main surface.The breakdown voltage between the gate and cathode is large; The SI thyristor with the structure shown in FIG. 11a has a small capacitance and extremely high shutoff efficiency.

The structure in which the gate region has a wider area away from the main surface as shown in FIG. 11a can also be applied to the structures shown in FIGS.

A gate structure that widens toward the end as shown in FIG. 11a can be easily realized, for example, by using a technique of making silicon porous using an EF aqueous solution.

FIG. 11b shows a structure in which an insulating layer 16 is formed on the bottom surface of the p ⁺ drive gate region 14 to increase the current gain during cutoff. In the structure shown in FIG. 11b, the p ⁺ drive gate region 14 is made into porous silicon by anodization using an HF solution, the SiO ₂ insulating layer 16 is formed by oxygen ion implantation, and then B is diffused or It can be formed by ion implantation.

The distance W between the p ⁺ drive gate region 14 and the p ⁺ fixed potential gate region 14'' is preferably as small as possible in order to achieve a large forward blocking voltage with a small reverse gate bias. It is desirable that the gate and cathode be placed adjacent to each other and that W be small to the extent that the value does not drop below the value.
Naturally, if W is made too small, the resistance during conduction will increase.

Although the present invention has been described above with reference to specific examples, it goes without saying that the present invention is not limited to these specific examples. Of course, the conductivity type may be completely reversed. In this case, area 11 is
Although the region 11 is an n ⁺ region and a negative voltage is applied in the forward state, in the present invention, the region 11 is called an anode region regardless of whether the voltage is positive or negative. In short, it is a structure in which a thin layer with a high impurity density of the conductivity type opposite to that of the anode region is inserted adjacent to the anode on the cathode side, and the channel forming region up to the cathode region is made up of a region with as low impurity density as possible. Bye. By making the electric field strength in the low impurity density region as uniform as possible so as to increase the maximum blocking voltage as much as possible, operation can be performed up to the very edge of the avalanche initiation threshold electric field, and the blocking voltage due to carrier injection on the anode side can be increased. The decrease is suppressed in a thin layer region with relatively high impurity density. Since the thin layer region is made thin, the carrier injection efficiency from the anode is high, and the injected carriers are injected into the channel side very quickly, so the speed is fast, the voltage drop is small, and the current when conducting is large. It has the following characteristics. In order to increase the maximum blocking voltage, the region 12 may be made thicker. To increase the current, increase the number of channels.

Until now, the shortest possible cathode of the present invention
The explanation has focused on increasing the forward maximum blocking voltage by changing the anode spacing. Incidentally, in many cases, thyristors are required to have forward breakdown voltage as well as reverse breakdown voltage. The reverse breakdown voltage is, for example, from the anode to the cathode in Figure 2a.
p ⁺ nn ^-- Determined by the reverse characteristics of the n ⁺ diode structure. n ^-- Reverse voltage _{V a} when the impurity density of region 12 is so low that it can be substantially considered as an intrinsic region
The potential distribution and electric field distribution between the cathode and anode during application are shown in FIGS. 12a and 12b. Second
The maximum electric field strength at the anode junction in FIG. b is approximately given by E _nax ≈1/l ₁ +l ₃ {V _a +V _bi +N _D2ql3 /ε(l ₁ +l ₃ /2)} (3). When this electric field strength E _nax reaches the avalanche threshold electric field E _B , an avalanche current begins to flow. The reverse breakdown voltage V _{ar nax} is therefore given by the following equation.

V _{ar nax} ≒ E _B (l ₁ + l ₃ ) − V _bi −N _D2ql3 /ε (l ₁ + l ₃ /2) ……(4) For example, l ₁ = 500μm, N _D1 = 1×10 ¹² cm ^-3 , l ₃
= 1 μm, N _D2 = 1 × 10 ¹⁶ cm ^-3 , E _B =
Assuming 200KV/cm, V _{ar nax} will be approximately 2000V. Since the maximum forward breakdown voltage is 7000V or more, this level of reverse breakdown voltage is often insufficient. Equations (3) and (4) omit consideration of snap-through between the gate and anode. Therefore, in reality
Reverse breakdown voltage does not improve up to 2000V. With this device,
In order to operate with a reverse breakdown voltage comparable to that in the forward direction, a Si Schottky diode, for example, may be connected in series with this device as shown in FIG. _D1 is a shotgun diode,
_Q1 is the SI thyristor of the present invention. A Schottky diode has an n ⁺ region on one main surface of an n-type high-resistance region with a predetermined thickness, and a Schottky junction made of Al, Pd, Pt, Au, etc. or other metal on the other main surface. That's fine. The impurity density and thickness of the n-type high resistance region may be determined based on the required value of reverse breakdown voltage, forward voltage drop value, etc. Since many carriers flow through the shotgun diode, its switching speed is fast. A Schottky diode tends to have a somewhat large forward voltage drop, so in that case a p ⁺ in ⁺ diode or the like may be used.

In order to realize a predetermined reverse breakdown voltage using only the SI thyristor of the present invention, the impurity density and thickness of the ^n-- region 12 and the n-region 15 can be selected approximately as follows. The reverse breakdown voltage is determined when the maximum electric field at the p ⁺ (11) n (15) junction causes an avalanche threshold electric field E _B and an avalanche current begins to flow, or when the depletion layer extending from the anode completely reaches the p ⁺ region 14. This is due to the punching-through current or punch-through current starting to flow. Therefore, it is desirable to select various quantities such that both of these occur approximately at the same time.

E _nax ≒N _D1ql2 ／ε＋N _D2ql3 ／ε≒E _B ……(5) V _{ar nax} ＝N _D1ql2 ² ／2ε＋N _D2ql3 ² ／2ε ＋N _D1ql2l3 ／ε ……(6) That is, p ⁺ (11)n(15 ) The depletion layer from the anode may reach the gate region 14 when the electric field strength at the junction surface becomes approximately equal to the avalanche threshold electric field E _B. At that time, the reverse withstand voltage is approximately expressed by formula (6)
is given by N _D1 ≒1×10 ¹³ cm ^-3 , l ₂ ≒500μm,
If N _D2 ≒2×10 ¹⁵ cm ^-3 and l ₃ ≒3μm,
Reverse breakdown voltage of approximately 2000V is achieved. The maximum forward breakdown voltage at this time is approximately 6800V. The reverse pressure is
This is often determined by punching through the p ⁺ gate region 14.

As shown in FIG.
In a structure in which an insulating layer is provided on the bottom surface of the device, both forward blocking voltage and reverse breakdown voltage can be increased. In a structure in which no punching-through current flows from the gate when a reverse voltage is applied, if the region 12 is essentially an intrinsic region and the design is made to satisfy N _D2ql3 /ε≈E _B /2 (7), then Maximum forward blocking voltage,
Both reverse breakdown voltages have values close to E _Bl2 /2.

When the gate is made of a junction type, it is preferable to provide a thin layer region 18 with relatively high impurity density also at the bottom of the gate region, as shown in FIG. Figure 14a
In the example, the region 18 is provided only at the bottom of the gate, and in the example shown in b, the region 18 is provided surrounding the gate. However, the surface in contact with the channel is thinner than the bottom surface.

In order to increase the switch-off speed when shutting off, an appropriate amount of a substance having a killer effect may be added to the region 12 and the like. A typical example of Si is Au.
However, if the density of the killer is too high, the distribution of carriers injected from the cathode and anode within the channel becomes steep, leading to an increase in space charge resistance and an increase in voltage drop. The killer density may be increased within a range where the voltage drop is below a predetermined value.

For example, in a planar gate structure, l ₂ ≈400~500μ
m, l ₃ ≒1μm, N _D1 ≒10 ¹² cm ^-3 , N _D2 ≒1×10 ¹⁶ cm
^-3 , for example, a cathode stripe of 2 x 100 μm.
10 A device with about ⁶ channels doped with an appropriate amount of Au can achieve operation with a maximum blocking voltage of 5000 V or more, a current of about 2000 A during conduction, a switch-off time of several microseconds during cutoff, and a voltage drop of about 2 V or less.

Device design quantities such as l ₁ , l ₂ , l ₃ , N _D1 , and N _D2 are as follows:
It may be determined according to the required specifications.

〔Effect of the invention〕

In the static induction thyristor of the present invention, the drive gate is reduced by half compared to conventional static induction transistors, so the capacitance is smaller and the operating speed is faster, while at the same time the amount of holes flowing into the drive gate is reduced. As a result, the current gain increases.

Since the electrostatic induction thyristor of the present invention has a fixed potential gate region for sucking out holes, especially when the drive gate is a MOS gate, the holes can be drained easily and at high speed, which was impossible with conventional MOS gate thyristors. can be turned off.

The electrostatic induction thyristor of the present invention has a high blocking voltage, a large current when conducting, and a small voltage drop.
In addition, the switching speed is high, and its industrial value is extremely high, especially for large power control and switching applications.

[Brief explanation of drawings]

Figures 1a to 1g show conventional examples of SI thyristors, where a is an example of the cross-sectional structure of an SI thyristor, b is the potential distribution between gates, c and d are the potential distributions between the cathode and anode, and e to f are the potential distributions between the gate and anode. Potential distribution, g is a diagram showing the electric field distribution between the gate and anode, FIGS. , c and d are potential distributions between the gate and anode, e is a diagram showing the electric field distribution between the gate and anode, and FIGS. 3 to 11 a and b are cross-sectional structures of the electrostatic induction thyristor of the present invention. Example, Figures 12a and b are SI of the present invention.
Potential distribution and electric field distribution when reverse voltage is applied to the thyristor, FIG. 13 shows an example of use of the SI thyristor of the present invention, and FIG. 14 shows an example of the cross-sectional structure of the SI thyristor of the present invention.

Claims (1)

[Scope of Claims] 1. A cathode region 13 is provided on one main surface of the high-resistance semiconductor substrate region 12, and mutually independent first divided gate regions 14'' are provided near the cathode region.
and a second divided gate region 14, the first divided gate region is a fixed potential gate region, the second divided gate region is a driving gate region, an anode region 11 is provided on the other main surface, and the cathode region and an anode region are formed of high impurity density regions of mutually opposite conductivity types, and further, between the anode region and the high resistance semiconductor substrate region, a conductivity type opposite to the anode region, a thickness l ₃ and an impurity density N _D2.
a thin layer forming a pn junction with the anode region over substantially the entire high resistance semiconductor substrate region, and forming a high resistance between the first and second split gate regions and the thin layer. When the thickness of the resistor semiconductor substrate region is l ₂ and the impurity density is N _D3 ,
The electric field strength E _qs of the high resistance semiconductor substrate region near the first and second divided gate regions is the avalanche threshold electric field E _B
To satisfy the following, E _qs E _B ……(1) E _qs −N _D1ql2 /ε≒N _D2ql3 /ε ……(2) ε: Dielectric constant of high resistance semiconductor substrate q: To satisfy unit charge amount The thickness l ₃ and impurity density N _D3 of the thin layer are set, and the maximum forward blocking voltage V _{Ba nax} at this time is approximately V _{Ba nax} ≒ (E _qs −N _D1ql2 /2) l ₂ +N _D2ql3 ² / An electrostatic induction thyristor characterized by being given by 2ε...(3). 2. Both the first and second divided gate regions are of a planar junction gate type formed by diffusion from the same main surface as the main surface on which the cathode region is formed, and the first divided gate electrode is The electrostatic induction thyristor according to claim 1, wherein the electrostatic induction thyristor is connected in common with a cathode electrode. 3. The electrostatic capacitor according to claim 1, wherein the first and second divided gate regions are of a buried junction gate type embedded in a high-resistance semiconductor substrate near the cathode region. induction thyristor. 4. The electrostatic induction thyristor according to claim 1 or 2, characterized in that an insulating layer is interposed in a portion where the first and second divided gate regions and the cathode region face each other. 5. The electrostatic induction thyristor according to claim 2 or 4, characterized in that an insulating layer is provided directly under the bottom of the second divided gate region near the anode side. 6. The electrostatic capacitor according to claim 1, 2, 4, or 5, characterized in that an insulating layer is interposed on a side surface of the first divided gate region other than the bottom. induction thyristor. 7 Among the first and second divided gate regions,
The first divided gate region is formed by a junction gate formed by diffusion from the main surface where the cathode region is formed, and the first divided gate electrode is commonly connected to the cathode electrode, while the second divided gate The region has an insulated gate structure formed on the side wall portion of a groove cut from the main surface where the cathode region is formed, and an insulating layer is formed in the portion where the first and second divided gate regions and the cathode region face each other. 2. The electrostatic induction thyristor according to claim 1, further comprising an insulating layer interposed on the side surface portions other than the bottom of the first divided gate region. 8. The electrostatic induction thyristor according to any one of claims 1 to 7, wherein an appropriate amount of a substance having a killer effect is added to the high-resistance semiconductor substrate or the thin layer. . 9 Maximum reverse voltage between anode and cathode
V _{ar nax} is applied, and when the maximum electric field strength E _nax at the pn junction interface between the anode region and the thin layer becomes approximately equal to the avalanche threshold electric field strength E _B , the high-resistance semiconductor substrate is removed from the anode region side. In order for the depletion layer spreading inside to reach the vicinity of the junction gate region, the values of N _D1 and l ₂ and N _D2 and l ₃ are set so that E _nax =N _D1ql2 /ε+N _D2ql3 /εE _B ...(5) is satisfied. Claim 1, wherein the maximum reverse withstand voltage V _{ar nax} is given by V _{ar nax} ≈N _D1ql2 ² /2ε + N _D2ql3 ² /2ε + N _D1ql2l3 /ε (6) The electrostatic induction thyristor according to any one of items 8 to 8.