JPH02227851A - Synchronous driving method for reproducing device - Google Patents

Abstract

PURPOSE:To easily synchronously drive two devices at different frame cycles by reproducing a converted frame number from one device, and reading frame cycle converting data from the recording medium or the memory of the device. CONSTITUTION:In a VTR 1 and a DAT 2, etc., as respectively first and second devices, not only the frame number of a second time code but also a converting frame number corresponding to the frame number of a first time code are recorded in a recording medium 26 of the second device 2, and the frame cycle converting data are stored into the recording medium 26 or the memory beforehand. Based on them, the converting frame number corresponding to the frame number of the first device 1 is sent in the first cycle, the converting frame number is compared with the frame number of the first time code, frame synchronization is detected, and synchronized. Thus the first and second devices 1 and 2 at the different frame cycles can be easily synchronously driven.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to synchronous driving of a video tape recorder (VTR) and a digital audio tape recorder (DAT), or a similar synchronous driving method.

[Prior Art] It has already been proposed to write a time code (SMPTE time code) on a linear track in a diagonal scanning rotary head type VTR.

It has also been proposed to record time codes on DAT.

[Problem to be solved by the invention] By the way, the frame period of VTR is 33.3118
Since the frame period of R-DAT is 3QIIS, synchronization cannot be achieved using a frame synchronization signal.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method that allows two devices having different frame periods to be driven synchronously with relative ease.

To achieve the above object, the present invention reproduces or transmits a first information signal having a first frame period, and
a first device that reproduces or transmits a first time code signal accompanied by a frame number in the first frame period;
A second information signal recorded on a recording medium with a second frame period different from the first frame period is reproduced, and a frame having the second frame period is reproduced on the recording medium. In the method of driving synchronously with a second device for reproducing second time codes recorded in sequence, the first time code is recorded on the recording medium in addition to the frame number of the second time code. Write in advance a conversion frame number corresponding to the frame number of the time code, and frame period conversion data for generating the conversion frame number in synchronization with the frame number of the first time code in the recording medium or memory. When writing in advance and driving the first device and the second device synchronously, the first information signal and the first time code are reproduced from the first device, and the first information signal and the first time code are reproduced from the second device. The apparatus reproduces the second information signal, the second time code, and the converted frame number, reads the frame period conversion data from the recording medium or the memory, and reproduces the converted frame number and the frame. A frame period that is the same as the first frame period is created based on the period conversion data, the converted frame number is sent out according to this frame period, and the converted frame number and the first frame period are
This invention relates to a synchronous driving method for a playback device, which is characterized in that frame synchronization is detected by comparing the frame number of the time code of the present invention with the frame number of the time code of the present invention, and synchronization is established.

[Function] In the present invention, not only the frame number of the second time code but also the conversion frame number corresponding to the frame number of the first time code is recorded on the recording medium of the second device, and Since frame period conversion data is pre-recorded in the recording medium or memory, the conversion frame number corresponding to the frame number of the first device is set to the first device based on this data.
It becomes possible to send out the first and second equipment at the cycle of ! It becomes possible to obtain a signal corresponding to the frame difference. When a frame difference is detected, the first and/or second device is controlled to eliminate the difference.

[Example] Referring to FIGS. 1 to 7, VT according to an example of the present invention
The R-DAT synchronous operation system will be explained.

As shown in FIG. 1, this system is equipped with a VTRI as a first device, a DAT2 as a second device, and a first and second time code generation circuit 3.4. They are configured to operate synchronously.

The VTR 1 has a pair of video heads 6 that rotate together with a drum 5, a motor 7 for rotating the drum 5, and a first magnetic tape 8, similar to a general-purpose V)iS or Beta type small VTR. A capstan 9 for fast running, a pinch roller 10, a capstan motor 11, a glue motor 15, 16 for driving the pair of glue wheels 13, 14 of the tape cassette 12, and a pair of video heads 6. A fixed magnetic head 19 for recording and reproducing a time code is provided in a pond equipped with a recording/reproducing circuit 18 connected via a rotary transformer 17. It is connected to the first time code generation circuit 3 via the recording and reproducing circuit 20. Although the VTRI further includes various circuits, these are omitted.

As shown in FIG. 2, the first magnetic tape 8 includes three linear tracks 8b, 8c, 8 in addition to a diagonal track 8a for recording and reproducing a video signal as a first information signal.
It has d. The diagonal track 8a is scanned by the video head 6, the first linear track 8b is scanned by the time code recording/reproducing magnetic head 19, and the second linear track 8a is scanned by the time code recording/reproducing magnetic head 19.
C is scanned by an audio head (not shown), and the third linear track 8d is scanned by a control head (not shown).
is scanned.

The DAT 2 includes a pair of magnetic heads 22 that rotate together with a drum 21, a recording/reproducing circuit 24 connected to the pair of magnetic heads 22 via a rotary transformer 23, and a drum 21, like a general R-DAT. rotating motor 25
, a capstan 27 for running the second magnetic tape 26 at a constant speed, a pinch roller 28 , a capstan motor 29 , and a pair of reels 31 .
32 and a capstan servo circuit 35.

As shown in FIG. 3, the second magnetic tape 26 has diagonal tracks 26a for recording and reproducing PCM signals. The diagonal track 26a is provided with a PCM area subcode area B and an ATF area C according to the DAT track format, and the subcode area B has a second area according to the present invention.
time code is written. This second time code can be read in both normal scanning and fast forwarding.

The second time code generating circuit 4 for recording on the second magnetic tape 26 is connected to the recording/reproducing circuit 24 via the contact of the switch 36. The subcode extraction circuit 37 connected to the reproduction output line of the recording and reproduction circuit 24 extracts the data of the subcode area B, and obtains the second time code, conversion frame number, and delay time data therefrom. The time code conversion circuit 38 generates a converted time code having a new frame number (converted frame number) at a new cycle (first cycle) based on the data given from the subcode extraction circuit 37.

The first time code comparison circuit 39 is a circuit that compares the converted time code and the first time code obtained from the time code recording and reproducing circuit 20 of the VTRI, and detects a frame difference between the two time codes.

The second time code comparison circuit 40 compares the first time code obtained from the VTR1 and the second time code obtained from the DAT2 for more than a second, and executes various controls in response to the time difference. It is something.

The system control device 41 controls the capstan motor 29 and various other tape running devices and controls the signal system. During synchronous driving, the first and second time code comparison circuits 39 and 40 are selectively connected to this tape running external device 41 via Swiss wires S1 and S2. The first switch S1 is turned on when the second time code comparison circuit 40 detects that the time difference is one second or less, and the second switch S2 operates in the opposite manner to the first switch S1.

The system control circuit 41 has a built-in system clock, and is configured to be able to change the tape running speed by changing this clock. Note that a common clock generator 42 is connected to this control circuit 41 via a switch S3 when performing synchronized operation with v't'Ri. The VTR1 also has a built-in system control circuit, but it is omitted in FIG. Further, the synchronous control system shown in FIG. 1 is configured to operate according to the flowchart shown in FIG.

[Operation] During recording, a video signal is supplied to a pair of video heads 6 in the VTRI and recorded on the diagonal track 8a, and a digital signal (PCM signal) corresponding to an audio signal related to the video signal is diagonally recorded in the DAT 2. It is recorded on track 26a. Further, the first time code generating circuit 3 generates a first time code consisting of SMPTE time code.
A time code is generated and recorded on the linear track 8b by the magnetic head 19 in the VTRI, and a second time code is generated from the second time code generation circuit 4, and recorded on the diagonal track 26a by the magnetic head 22 in the DAT2. do.

The SMPTE time code is a well-known 80-bit representation of frames, seconds, minutes, and hours.

That is, the SMPTE time code of VTRI is shown in Figure 5 (
As shown in C), it is set to advance 1 second every 30 frames. Therefore, the frame period of VTRI is 33.3
3...ms.

In the subcode area B of the magnetic tape 26 of DAT2, D
In addition to recording the AT time code, the conversion frame number for synchronous driving is also recorded. The configuration of the DAT time code created by the second time code generation circuit 4 is SMPT.
It is essentially the same as E, but the frame numbers are different. Figure 5<A) shows the frame numbers to be written to the DAT time code.As is clear from this, if you write frame numbers from AO to A32 in the first section, you will write a time code indicating 1 second. BO on the next second section
~ After writing the frame number of B32, write a time code indicating 2 seconds, and in the next third section, write the frame number CO ~ C33, then write the time code indicating 3 seconds 0 Next AO not shown ~ Write a time code that indicates 4 seconds at the end of the A32 frame, that is, create a time code that advances 3 seconds in 100 frames. 33 to be exact...
- Since a frame is 1 second, the second unit of the DAT time code is approximately shown.

The magnetic tape 26 of the DAT2 according to this embodiment contains 100
In addition to the DAT time code, which advances 3 seconds for each frame, a conversion frame number for synchronous driving is recorded. FIG. 5(B) is a converted frame number, which corresponds to the DAT frame shown in FIG. 5(A) divided into 30 frames. That is, conversion frame numbers aO to a30 are written corresponding to DAT frame numbers AO- and -A29, and DA
Conversion frame numbers bo to b29 are written corresponding to T frame numbers A30 to B26, and DAT frame number 8
Conversion frame number CO~c29 corresponds to 27~823
is written. In addition, DAT frame number C24
The 3 converted frame numbers for which no converted frame numbers are written in the frames from C33 to C33 are written to the back (PACK) of the same time code together with the DAT frame number. In Fig. 5 (A) and (B), the frame number is A,
B, C, a, b, and c are attached, but these symbols are for explanatory purposes and are not actually attached.

In Figure 5 (A), 100 frames are 33 frames, 33
In FIG. 5B, 90 frames are divided into 30 frames each, which is inconvenient for understanding the relationship between the DAT frame and the converted frame of the present invention. Therefore, the converted frames according to the present invention will be explained with reference to FIG. 6, which shows 100 frames and 90 frames without being divided. FIG. 6(A) shows a state in which DAT frames are divided into blocks of 100 frames each. According to the present invention, a DAT frame sequence is divided into 10
When divided into 0 frames each, the time is divided into 3 seconds each. FIG. 6(B) is an enlarged view of the time axis of the unit block in FIG. 6(A), and shows the time axis from the first frame (IF) to the tenth (lth frame)・OF).In the present invention, the converted frame numbers for the 1st frame (IF) to the 90th frame (90F) in a unit block are shown as shown in FIG. 5(B). This conversion frame number is written on the back shown in Figure 7.
The th frame (91F> to the 100th frame (100F) are not used for time axis adjustment, DA
The conversion frame number and frame period conversion data recorded in the subcode area B along with the T time code are read by the rotating magnetic head 22 of the DAT2 in the playback mode, and sent to the subcode extraction time # through the recording/playback circuit 2'4. 1
37 and sent to a time code conversion circuit 38.

The time code conversion circuit 38 creates a new frame number (converted frame number) shown in FIG. 5(B), adds this to the part of the second time code indicating seconds or more, and outputs it. At this time, instead of simply replacing the DAT frame number shown in FIG. 5(A) with the converted frame number shown in FIG. 5(B), the frame period for transmitting the time code is converted. Figures 6 (A), (B), (C), and (D) show the conversion of the frame period. ) of the 100 frames are sequentially delayed by the unit delay time δ.As a result, the 90th frame (IF) to the 90th frame (90F) of the 100 frames of Frame (90F
), the 90th frame (90F) according to the new conversion frame period shown in FIG. 6(C) is delayed by 90δ. Although frame numbers are consecutively assigned from No. 1 to No. 90 in Fig. 6 <C>, in reality, the frames are shown in Fig. 6 (D) in correspondence with Fig. 5 (B). Like, a
Assign frame numbers such as O~a29, bO~b29, CO~c29.

A new frame period is obtained by adding the old frame period to the end of the previous frame and further adding the unit delay time δ. Note that unit delay time δ=
3.33.-IIs is obtained by counting 48 kHz tarok pulses 160 times by a counter.

If the DAT frame period is extended as shown in FIGS. 6(C) and 6(D), it will become the same as the VTR frame period shown in FIG. 5(C), and will have the same frame number.

The time code conversion circuit 38 in FIG. 1 converts the time code having a new frame number (converted frame number) into the
It is sent to the time code comparison circuit 39 of. Enter here 2
Since the frame periods of the two time codes are the same and the frame numbers are also assigned in the same format, it is possible to know the frame shift, that is, the phase difference (frame difference) by the difference between the two frame numbers input at the same time. can.

Data indicating the frame difference (phase difference) is sent to the system control circuit 41 via the switch S1, and control is performed to make the phase difference (frame difference) zero.

The synchronization control between the VTR1 and the DAT2 is performed according to the flow shown in FIG. ! When synchronous driving is started in block 51, it is determined in block 52 whether the difference between the first and second time codes is within 1 second. This determination is made by the second time code comparison circuit 40 shown in FIG. If the difference is greater than 1 second, block 53 controls the tape speed and tape running direction to bring the time difference within 1 second. At this time, change the frequency of the system clock according to the time difference,
When the time difference is large, the tape 26 is run at high speed to reduce the time difference to within 1 second. If within 1 second, block 5
As shown at 4, the tape running is controlled by the reference clock of a common reference clock generator 42, and the tape is run as a reference. At this time, the switch S2 is turned off and the switches S1 and S3 are turned on.The 0th order generates a converted time code in the time code conversion circuit 38 as shown in block 55.The phase difference is determined in block 56. frame difference) is zero. This determination is made by the first time code comparison circuit 39.
It will be held in If the frame numbers are different and there is a frame difference (phase difference), the system clock is changed to change the speed of the tape 26 as shown in block 57, and
Control the tape running direction to match frame numbers.

Note that during the control period of the first time code comparison circuit 39, the switch S3 is turned off to interrupt control using the reference clock. When it is determined in block 56 that the phase difference (frame difference) has become zero, switch S3 is turned on, and as shown in block 58, reference running is performed using the common reference clock of VTRI and DAT2. Even during the reference run, the phase difference (frame difference) is detected as shown in block 59.
It is determined whether or not the phase difference is zero, and if a phase difference occurs, phase matching is performed again in block 57. If the phases are the same, block 60
The synchronization operation ends as shown in .

[Modifications] The present invention is not limited to the above-described embodiments, and, for example, the following modifications are possible.

(1) Data for frame period conversion to subcode area B
Instead of writing in the frame number, it may be written in an external memory such as a ROM, and then read out using the frame number as an address signal.

(2) First time code comparison episode l! @39 may be configured to compare only frame numbers, and
The time code conversion circuit 38 may be configured to convert only frame numbers. When comparing only frame numbers, the frame number is extracted from the first time code and compared with the converted frame number.

(3) A linear track may be provided on the magnetic tape 26 of the DAT2, and an audio signal may be recorded in analog thereon, and this may be used to roughly align the position with the VTR.

(4) A block of 100 frames is first divided into a third section of 34 frames, then a first section of 33 frames,
It may be divided into a second section of 33 frames after the eel, or it may be divided in the order of 33 frames, 34 frames, and 33 frames.

<5) It is also possible to record the VTR time code on the diagonal track 8a.

(6) 29.97 frames per second, 25 frames,
It is also applicable to cases where signals are transmitted at a frame period of 24 frames or the like.

[Effects of the Invention] As described above, according to the present invention, it becomes possible to easily synchronize and drive the first and second devices having different frame periods.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a composite system of a VTR and DAT according to an embodiment of the present invention, FIG. 2 is a plan view showing a magnetic tape of a VTR, and FIG. 3 is a plan view showing a magnetic tape of a DAT. Figure 4 is a flowchart showing the synchronization method, Figure 5 is the DAT frame number, conversion frame number,
FIG. 6 is a diagram showing the arrangement of VTR frame numbers, FIG. 6 is a diagram for explaining a method of forming a converted frame synchronization signal based on DAT frames, and FIG. 7 is a diagram showing the configuration of a DAT time code. DESCRIPTION OF SYMBOLS 1...VTR12...DAT, 6...Video head, 8...First magnetic tape, 19...Magnetic head for time code recording and reproduction, 22...Magnetic head, 2
6... second magnetic tape, 27... capstan,
38... Time code conversion circuit, 39... First time code comparison circuit, 40... Second time code comparison circuit, 41... System control circuit.

Claims (1)

Claims: Reproducing or transmitting a first information signal having a first frame period, and reproducing or transmitting a first time code signal accompanied by a frame number in the first frame period. a first device that reproduces a second information signal recorded on a recording medium with a second frame period different from the first frame period; A method for synchronously driving a second time code that is recorded with a frame period and a frame number, and a second device that reproduces a second time code that is recorded with a frame number and a frame period, wherein the frame number of the second time code is recorded on the recording medium. In addition, frame period conversion data for writing in advance a conversion frame number corresponding to the frame number of the first time code, and generating this conversion frame number in synchronization with the frame number of the first time code. is written in the recording medium or memory in advance, and when driving the first device and the second device synchronously, the first information signal and the first
, the second information signal, the second time code, and the converted frame number from the second device, and the frame period conversion data is transferred to the recording medium or the memory. create a frame period that is the same as the first frame period based on the converted frame number and the frame period conversion data, send out the converted frame number according to this frame period, and convert the converted frame number and A synchronous drive method for a playback device, characterized in that frame synchronization is detected by comparing the frame number of the first time code and synchronization is achieved.