JPH02220536A - Demodulation circuit - Google Patents

Abstract

PURPOSE:To improve the error rate of code decision by deciding a threshold level for binary distribution while taking a signal voltage at a deciding point before and after the deciding point of a noticed signal into account. CONSTITUTION:An input signal (k) is fed to a discriminator 41 via analog delay elements 30-32 whose delay time is T. Moreover, the signal (k) is fed sequentially to digital delay lines 34-38 via a discriminator 33 having a threshold level whose level is between 1 and 0. The delay time T of the lines 34-38 is equal to the period of one bit data. The output state of the elements 34-38 is decided by a decoder 39 and an analog switch 40 is driven in response to the result of discrimination. The switch 40 selects any of plural threshold levels set in response to the fluctuation range of the input voltage in advance and gives the level to the discriminator 41. The discriminator 41 compares the output of the element 32 with the threshold level decided by a 2-bit data before and after the noticed signal from the switch 40 to decide the signal and to send a binary data.

Description

[Detailed description of the invention] (Technical field to which the invention pertains) The present invention relates to a reception demodulation circuit for a digital transmission system, and in particular to a signal waveform transmission system using a partial response transmission line code format that allows code amount interference. The present invention relates to a demodulation circuit applied to a receiving device.

(Prior art and its problems) Conventionally, in narrowband digital transmission, GMSK (Gaussian minimum) using frequency detection has been used.
Demodulation of the (um shiftkeying) signal involves frequency-converting the received signal, band-limiting it, and then amplitude-limiting amplification.
The signal discriminated by the frequency discriminator is divided into 2 by a certain fixed threshold.
This is done by determining the value.

This threshold value was fixed to a value intermediate between the output of the frequency discriminator indicating the IN of the code and the output of the frequency discriminator indicating the OLD of the code. However, although this setting method poses no problem when the received signal is a so-called full response signal, when it is a partial response signal, it causes the following problems.

In digital transmission, the data to be transmitted is waveform-shaped and modulated to suppress the spread of the frequency spectrum.
The reverse operation is performed to obtain a demodulated waveform, which is then determined and the received data is restored.

In this case, the waveform before modulation and the waveform after demodulation are the same in the absence of noise. There are two types of waveform shaping methods: full response and partial response. The former performs waveform shaping without code amount interference at data decision points, and the latter performs waveform shaping that allows code amount interference. . Comparing these two methods, the latter has a lower transmission efficiency due to code amount interference, but the latter is overall superior because it can reduce the required transmission bandwidth, and it can be used in various ways. Its use is expanding in the field.

An example of the signal waveform in the case of full response is shown in Figure 1, an eye pattern during demodulation is shown in Figure 2, and a signal waveform and eye pattern of partial response are shown in Figure 3.
and Fig. 4, respectively.

In FIGS. 1 to 4, the horizontal axis shows time, and the vertical axis shows signal amplitude (voltage). Further, upward arrows and numbers 1 to 5 and 11 to 15 shown at the bottom of each figure indicate decision points, that is, decision timings. The parts indicated by broken lines in Figures 1 and 3 are
The pulse waveform of the data to be transmitted before waveform shaping is shown, and the solid line shows the waveform of the data to be modulated after waveform shaping. A-j on the solid line indicates the value of the signal voltage at each determination point.

In the case of the full response signal waveform shown in FIG. 1, 1 to 5 are determination points, and the portion of interest is determination point 3, and the value at this time is C. In this signal waveform, the values of a, b, d, and e at decision points 1.2 and 4.5 other than the focused decision point 3 are zero, indicating that there is no code amount interference. Therefore, the waveform obtained by modulating and demodulating this signal is the eye pattern shown in FIG.

The eye pattern is obtained by superimposing waveforms shifted by the interval between determination points on the time axis. When determining this eye pattern and restoring the transmitted data, the determination is made at the position of the arrow in Figure 2. In this case, the eye pattern at the determination point is at the A position and the B position because there is no code amount interference. It is focused on the point. Therefore, the threshold for binary judgment is usually A and B.
The voltage is set to an intermediate value between the voltage values.

On the other hand, in the case of the partial response signal waveform in Figure 3, the value of the signal voltage at timing 13 of interest, which corresponds to the signal voltage value C in Figure 1, is h, and the pulse width of the data is widened due to the characteristics of the filter. Since the amplitude is small, timing 12 on both sides of timing 13 of interest
Even at 14 and 14, the amplitude of the signal waveform does not become zero, but becomes a finite value as shown by g and i. Therefore, it is obvious that code amount interference occurs when signal voltages appear at decision points 12 and 14. In addition, as can be easily seen by comparing the eye pattern shown in Figure 4 when this signal waveform is transmitted with the eye pattern at full response in Figure 2, in the partial response system, due to code amount interference, , the possible values of the signal waveform at the decision point are C, D, E,
There are six points as shown by points F, G, and H. Of these, C
, D, E indicate the sign rIJ, and F, G
, H indicates the sign rOJ. Therefore,
In order to identify these, for example, C and F, C and G
, C and H need to be separated. It is obvious that the threshold value for identifying these should be set midway between the two values to be determined. That is, in this case 3
A standard threshold must be set.

However, since the conventional threshold value is fixed at a value midway between 0 point and "0", which is almost close to the amplitude rlJ of the data pulse in Fig. 1, the threshold value is the maximum value of the partial response signal waveform. The difference from point h in FIG. 3 is small, and errors in judgment are likely to occur due to noise etc. (There was a problem that errors in demodulated data were large.

(Object of the Invention) An object of the present invention is to solve the above-mentioned problems in a partial response demodulation circuit that tolerates code amount interference by changing the threshold value for binary judgment based on the signal of interest. An object of the present invention is to provide a demodulation circuit that improves the error rate of code determination by determining signal voltage values in consideration of the signal voltage values at the decision points before and after the decision point.

(Structure and operation of the invention) In the following explanation, a typical GMSK signal will be described.
For the sake of simplicity, the code amount interference due to partial response waveform shaping will be explained using two bits before and after the bit of interest. The modulation and demodulation process will also be explained in terms of frequency modulation and two-frequency discriminator demodulation. These do not limit the scope of the present invention, and it goes without saying that it can be applied to all systems that perform partial response systems.

In a partial response system, which path the signal to be judged takes is determined from the data values before and after the judgment point.

Therefore, if the judgment threshold is controlled by the values before and after the data to be judged, the same threshold as the conventional full response, that is, the intermediate value between C1D, E and F, G, and H (this is It is obvious that the error rate can be improved compared to the case where the threshold value is set to an intermediate value of H, which is the same as the threshold value shown in FIG.

This method is performed as follows. As an example of a simple data signal, the code string "00000" and the code string rooloo
”. The signal waveform at this time is shown in FIG. In FIG. 5, 21.22.23.24.
25 is the decision point, and 23 is the decision point to focus on, that is, the latter code string corresponds to the "1" part. 0 1 and 0 shown on the left side of the figure are the levels when "l" is continuous. It shows the level when and r□ are continuous, and also shows X and Y shown on the right side of the figure.
represents a threshold value for determination, and X represents a conventional determination threshold value, which is fixed at a voltage value intermediate between level I and level O. In this figure, the signal waveform when the code string is '0OOOOJ' is shown by a solid line, and the code string is 'rooloo'.
The signal waveform at this time is shown by a broken line. Therefore,
When the signal voltage at the decision point 23 is greater than X, r
It is determined to be lJ, and when it is small, it is determined to be rOJ. However, if noise is superimposed on the signal waveform, a determination error may occur. It can be seen that this is likely to occur in the case of conventional determination because the difference in level between the maximum value M of the signal and the threshold value X is small. On the other hand, if the threshold value is set to Y, which is smaller than X, even if a noise voltage is superimposed on the signal maximum value M, the amplitude of the allowable noise increases, and the error rate can be improved.

FIG. 6 is a block diagram showing an example of the circuit configuration of the present invention. In FIG. 0, 30, 31, and 32 are analog delay elements (AD) with a delay time T, and 33 is a conventional type determiner. , the voltage has a threshold value between 1 and 0.

34 to 38 are digital delay lines (DD), each of which delays the digital data after the determination by a time T. Here, the delay time T is a value equal to the cycle of one visit data. 39 is a decoder, and delay elements 34.
35.37.38 and generates a signal for driving the analog switch 40. 40
is an analog switch, which uses the output of the decoder 39 to set a plurality of threshold values v in advance according to the fluctuation range of the input voltage.
One of yt to VTII is selected and output.

41 is a determiner, which outputs m of the analog delay line 32;
The analog switch 40 determines the signal by comparing the threshold value determined by the data of 2 bits before and after the signal of interest, that is, the output n of the analog switch 40, and
and 1 old) data output q is output. 42
is a timing synchronization circuit which extracts a clock component from the input signal k, creates various timing signals synchronized with the input signal k, and supplies them to each section.

FIG. 7 is a block diagram of a data transmission system using the circuit of the present invention. The binary data rxJ to be transmitted is waveform-shaped by a waveform shaper 51, and then modulated by a carrier wave by a modulator 52. This carrier wave passes through a transmission path 53 and is demodulated by a demodulator 54 to become a baseband signal, and this baseband signal is converted into binary data [↑1] by a demodulation circuit 55 and output. The proposed circuit corresponds to the demodulation circuit 55. Therefore, the output data [↑J is the output q in Figure 6
is the same as

FIG. 8 is a time chart showing signal waveforms of each part of the data transmission system of FIG. A is a code string of input data, and B is a data pulse waveform before waveform shaping, which is the input signal X in FIG. C is the waveform-shaped transmission waveform (output of the waveform shaper 51), which is also the received and demodulated baseband waveform (output of the demodulator 54), indicated by 1 and O above and below the transmission waveform C. The one-dot chain line indicates the level of the eye pattern when the data is "lJ" and "rOJ" continuously.D is the code string of the received data that determined the transmission waveform C (output E"52" of the demodulation circuit 55). Arrows 61 to 67 of E indicate the timing of determination, and the numbers are added for convenience of explanation.

In the case of this embodiment, the solid line of the transmission waveform C corresponds to the input signal in FIG. This data is not subjected to any modification (it is output as the output m of the analog delay element 32. Similarly, the data determined by the determiner 33 in FIG. 6 is sequentially taken into the digital delay elements 34 to 38. The output will be the waveform shown in Figure 8. In this case, the determination is that transmission waveform C is the maximum,
It is clear that it is most appropriate to perform this at the minimum timing. Further, the determination threshold at that time is fixed at the position of X shown on the right side of waveform C in FIG. P in Fig. 6 contains the data at timing 61 in Fig. 8, P4
has 62, P2 has 64, and P.

Data of 65 timings are output respectively.

This indicates the data of 2 bits before and after the timing of P, that is, timing 63 to be noticed. In this example, the data bit of interest is the data marked with a Δ of 10↑OIJ. This data can take a value of either 1 or O. Therefore, noise is superimposed on the data code string 110001J, resulting in 110101J There may be cases in which it is determined that ``rlooolJ'' is determined due to noise being superimposed on the data code string "1O101."

The noise is superimposed on the baseband waveform and distorts the received baseband waveform, which may cause the threshold to be exceeded in the opposite direction at the decision point, leading to erroneous data decisions. Therefore, it is most preferable for the determination threshold to be a voltage between the possible output waveforms in the above two cases. In the case of rtotot+, the solid line in C in Figure 8 shows the possible waveforms, and in the case of rioot+, the waveforms shown in C in Figure 8 are the possible waveforms, and S and S shown there are free of noise. The intermediate point is the value of Y shown on the right side of C in FIG. 8. This value Y is the output P of digital delay lines 34.35 and 37°38 in FIG.
+, Pg and P4. P% or rl.

The value "Ol" is input to the decoder 39, and the output from the decoder 39 causes the analog switch 40 to
Preset threshold ■↑ Selected from 1 to VTH,
It is input to the determiner 41 as the output n.

In this case, the value of the output n becomes Y in FIG.

Vt+ to vtn match the voltages of the values X and Y in FIG. 8, and these are selected and output.

As described above, it is possible to always select the optimal threshold value from the bits before and after the data bit of interest, and make a decision.
The error rate can be improved compared to the conventional fixed threshold.

(Effects of the Invention) As explained in detail above, by using the demodulation circuit according to the present invention, the bit error rate during reception demodulation in a digital transmission system that performs partial response waveform shaping is improved, and The effect is extremely large.

[Brief explanation of the drawing]

Figure 1 is a waveform diagram of a single data pulse that has undergone full response waveform shaping, Figure 2 is a time chart showing the eye pattern of the waveform in Figure 1, and Figure 3 is a waveform diagram of a single data pulse that has undergone partial response waveform shaping. Figure 4 is a time chart showing the eye pattern of the waveform in Figure 3. Figure 5 is a waveform diagram of one data pulse.
The figure is a partial response waveform diagram for explaining the determination method according to the present invention, FIG. 6 is a block diagram showing an example of a demodulation circuit configuration according to the present invention, and FIG. 7 is a block diagram of a data transmission system to which the present invention is applied. , FIG. 8 is a time chart showing signal waveforms for explaining the present invention. 1-5.11-15.21-25.61-67... Timing of judgment, 30.31.32... Analog delay element, 33, 4]... Judgment device, 34-38...
Digital delay line, 39... decoder, 40...
Analog switch, 42...timing synchronization circuit,
51... Waveform shaper, 52... Modulator, 53...
- Transmission line, 54... demodulator, 55... demodulation circuit. Figure 6 Figure 7

Claims (1)

[Scope of Claims] In a receiving and demodulating circuit for a digital transmission system in which partial response waveform shaping is performed and transmitted, there are first and 2nd and 3rd
an analog delay element, and "0" of a bit that focuses on the baseband input signal with a threshold value of 1/2 of the maximum level of the eye pattern of the signal.
or "1", and a first determiner connected in series that delays the output of the first determiner by a time equal to the 1-bit data period, respectively;
second, third, fourth, and fifth digital delay lines; a decoder that decodes the outputs of the first, second, fourth, and fifth digital delay lines; An analog switch selects and outputs a desired threshold value from among a plurality of stepwise set threshold values based on a combination of values of two bits before and after the bit of interest, and the third analog delay element outputs the desired threshold value. A demodulation circuit comprising: a second determiner that compares the output of the bit of interest with the desired threshold output from the analog switch and outputs demodulated data.