JPH02219241A - Manufacture of thin film transistor - Google Patents

Abstract

PURPOSE:To manufacture a thin film transistor(TFT) of short channel with superior reproducibility by a method wherein a low resistive non-single crystal semiconductor layer or a part constituting a source drain region composed of a low resistive non-single crystal semiconductor layer and metal is irradiated with laser light, thereby cutting the irradiated part. CONSTITUTION:After a molybdenum film is formed on the whole surface of a glass substrate 1, said film is etched into a specified pattern, thereby forming a gate electrode 2. A silicon nitride film as a gate insulating film 3 is formed on the gate electrode 2, and similarly etched into a specified pattern. Thereon, a non-single crystal silicon film 4 having N-type conductivity type is formed as a low resistive non-single crystal semiconductor layer. Next, the non-single crystal silicon film 4 is subjected to masking of a specified external form pattern of a source drain region and its leading-out electrode, and to dry etching. Next, the non-single crystal silicon film 4 is irradiated with excimer laser light 11, thereby dividing the film 4 into a source region 5 and a drain region 6. Further selective laser processing is performed. Next, an I-type non-single crystal silicon semiconductor film 7 is formed Thereby a TFT can be manufactured with superior reproducibility.

Description

DETAILED DESCRIPTION OF THE INVENTION INDUSTRIAL APPLICATION FIELD 1 The present invention relates to a thin film transistor (hereinafter also referred to as TPT) using a non-single crystal semiconductor thin film and a method for manufacturing the same, and in particular to a liquid crystal display.

The present invention relates to a thin film transistor with high-speed response that can be applied to image sensors and the like.

rPrior Art 1 Recently, thin film transistors using non-single crystal semiconductor thin films produced by chemical vapor deposition or the like have been attracting attention.

Since this thin film transistor is formed on an insulating substrate using a chemical vapor phase method as mentioned above, it can be formed at a low temperature of about 450°C at maximum, and it can be formed using inexpensive soda glass or borosilicate. Glass or the like can be used as the substrate.

This thin film transistor is a field effect type, so-called M
O3FI! It has the same function as T, but as mentioned above, it can be formed at low temperature on an inexpensive insulating substrate, and the maximum area that can be formed is limited only by the dimensions of the device that forms the thin film semiconductor. It had the advantage that transistors could be easily manufactured on large-area substrates. Therefore, it is extremely promising as a switching element for a liquid crystal display with a matrix structure having a large number of pixels, a one-dimensional or two-dimensional image sensor, and the like.

In addition, photolithography, which is an already established technique, can be applied to fabricate this thin film transistor, and so-called microfabrication is possible, and it is also possible to achieve integration in the same way as ICs and the like.

A typical structure of this conventionally known TPT is schematically shown in FIG.

I2 is an insulating substrate made of glass, (21) is a thin film semiconductor made of a non-single crystal semiconductor, (22), (
23) is the source/drain region, (24), (25
) is the source/drain electrode, (26) is the gate insulating film (
27) is the gate electrode.

A thin film transistor configured in this way has a gate electrode (
By applying a voltage to source-drain (27),
2) and (23) to adjust the current flowing between them.

At this time, the response speed of this thin film transistor is given by the following equation.

S-μ・V/L2 Here, L is the channel length and μ is the carrier mobility.

■ is the gate voltage.

The non-single-crystal semiconductor layer used in this thin-film transistor contains a large number of crystal grain boundaries, etc., and due to these, carrier mobility is extremely small compared to a single-crystal semiconductor, which can be seen from the above equation. The problem was that the response speed of the transistor was extremely slow. In particular, when an amorphous silicon semiconductor is used, its mobility is approximately 0.
．． About 1 to 1 (cm2/V-3ec), most T
It was to the extent that it could not function as a PT.

As is clear from the above equation, it is known that the solution to such problems is to shorten the channel length and increase carrier mobility, and various improvements have been made.

In particular, if the channel length is shortened, the response speed will be affected by the square of the length, so this is a very effective means.

However, when forming an element on a large-area substrate, which is a feature of TPT, using photolithography technology to reduce the distance between the source and drain (corresponding to the approximate channel length) to 10 μm or less requires processing accuracy of 1. It is clearly difficult in terms of yield, production cost, etc., and TP
As a means for shortening the channel length of T, a means that does not use photolithography technology is required.

As one answer, a TPT with a vertical channel structure as shown in FIG. 3 has been proposed. In this process, a non-single crystal semiconductor layer consisting of a source (30), an active region (31), and a drain (32) is laminated on a substrate, and then a gate insulating film (33) is formed.
, and has a gate electrode (34) thereon.

In this structure, the channel length is approximately equal to the active region (31
), the channel length could be easily varied by adjusting the thickness of the active region.

However, since TPT with this structure has multiple non-single-crystal semiconductor layers stacked, it has many interfaces in the direction in which current flows between the source and drain, resulting in a good TPT.
T characteristics cannot be obtained. Further, since the cross-sectional area in the direction of current flow is large, the problem of increased off-state current occurs, and the vertical TPT does not essentially solve the problem.

Purpose of the Invention The present invention solves the above-mentioned problems, and provides a method for manufacturing a TPT that operates at high speed compared to conventionally known TPTs without complicated processes and with good reproducibility. Its purpose is to

``Structure of the Invention'' When manufacturing an inverse coplanar thin film transistor, the present invention provides a method for forming an inverse coplanar thin film transistor in which a source/drain region consisting of a low-resistance non-single crystal semiconductor layer or a low-resistance non-single crystal semiconductor layer and a metal is concentrated. The method is characterized in that the non-single crystal semiconductor layer or the non-single crystal semiconductor layer and the metal are cut by irradiating the emitted laser light.

In other words, the width corresponding to this cut portion approximately corresponds to the channel length of this thin film transistor, and it is possible to fabricate a thin film transistor with a short channel similar to that during laser beam processing with good reproducibility and without going through complicated processes. there is.

The present invention will be explained in detail below using Examples.

rExample 1'' FIG. 1 shows a schematic manufacturing process of a thin film transistor corresponding to Example 1.

First, using soda glass as a glass substrate (1), a molybdenum film is formed on the entire surface of the soda glass (1) by a known sputtering method, and then etched into a predetermined pattern. ) was formed.

Thereafter, a silicon nitride film was formed as a gate insulating film (3) on this gate electrode (2) to a thickness of 300 mm using the CVD method, and was similarly etched into a predetermined pattern.

A non-single-crystal silicon film (4) having N-type conductivity is formed thereon as a low-resistance non-single-crystal semiconductor layer. The manufacturing conditions at this time were as follows.

Substrate temperature 220°C Reaction pressure 0. 05TorrRf power (13,56M1(,) 120W gas used
5iHn+PH:+film thickness
1,500 people This N-type non-single crystal silicon film (4) was exposed to H2 during its formation.
It is also possible to use a material in which a large amount of gas is introduced, the Rf power is increased, and the electrical resistance is lowered by microcrystallization.

Next, using a known photolithography technique, this non-single crystal silicon film (4) is masked into a predetermined external pattern of the source/drain region and its lead-out electrode, and the CF
Dry etching was performed using 4 gases, and the result was shown in Figure 1(a).
I got the status.

Next, excimer laser light 01) with a wavelength of 24B and 7 nm is focused on this non-single crystal silicon film (4) by an optical system so that a rectangular irradiation cross section with a width of 2 μm and a length of 10 mm is formed on the irradiated surface. is irradiated to the position relative to the gate electrode and gate insulating film, and the non-single crystal silicon film (4) is exposed to the source region (5
) and drain region (6) to obtain the state shown in FIG. 1(c).

The laser beam irradiation conditions at this time are power density IJ/cm"
, the pulse width is 20 μSec. In this example, this laser light was irradiated with two pulses to cut the non-single crystal silicon film (4). The number of irradiations and laser conditions vary depending on the workpiece, and in this example, preliminary experiments were conducted to determine the conditions described above, and those conditions were used.

The present invention also provides a method for manufacturing an inverse coplanar thin film transistor, in which a gate insulating film (3) is formed under the non-single crystal silicon film (4).
and the gate electrode (2), it is necessary to perform selective laser processing so as not to extend the laser processing to the underlying gate insulating film.

This selective processing was carried out by changing the wavelength of the laser light used and utilizing the difference in the absorption coefficient of the laser light. Particularly in this example, since the layer below the non-single crystal semiconductor (4) is silicon nitride, there is a big difference in ease of laser processing, and selective processing can be performed easily.

That is, since the depth processed by one laser beam irradiation is almost constant for the same material, the number of irradiations was set according to the thickness of the low resistance non-single crystal semiconductor layer to be processed.

Next, an I-type non-single crystal silicon semiconductor film (7) was formed on these to a thickness of about 5,000 wafers by a known plasma CVD method. The manufacturing conditions created are shown below.

Substrate temperature 220°C Reaction pressure 0.05Torr1? f power (13,56M11.) 80 W Gas used SiH4 In this way, the thin film transistor shown in FIG. 1(C) was completed.

In this way, since the area between the source and drain is not etched as in the conventional case,
It was possible to easily form the interval between the source and drain cut portions 02) of approximately 2.6 μm, and it was possible to fabricate a TPT with a short channel length with good reproducibility.

Furthermore, even if the laser cutting step between the source and drain is performed before the step of etching the external shape of the source and drain, the effects of the present invention will not be hindered.

rExample 2” FIG. 4 shows a schematic diagram of the manufacturing method of this example.

First, a molybdenum film is formed on the entire surface of the soda glass substrate (1) by a well-known sputtering method, and then etched into a predetermined pattern, and the gate electrode (
2) was formed.

In one step, a silicon nitride film was formed as a gate insulating film (3) on this gate electrode (2) to a thickness of 150 mm using the CVD method, and was similarly etched into a predetermined pattern.

After forming molybdenum metal 0ω to a thickness of 2000 nm on this, a non-single-crystal silicon film (4) having a P-type conductivity is formed thereon as a low-resistance non-single-crystal semiconductor layer. The manufacturing conditions at this time were as follows.

Substrate temperature 230°C Reaction pressure 0.05TorrRf power (
13,56MH,) 150W gas used
SiH4+B2■6 film thickness 20
In this case, unlike in Example 1, the film thickness was 200 people, and the purpose was only to make ohmic contact with the I-type semiconductor layer to be fabricated in a later process.

Next, these are etched into a predetermined pattern as shown in Figure 4 (
The state a) was obtained.

Next, this molybdenum film 0ω and a low resistance non-single crystal silicon film (
4), the wavelength of 1.06 nm is focused by the optical system so that the irradiation cross section is a circle with a diameter of 3 μm on the irradiated surface.
The coatings were cut into source regions (5) (8) and drain regions (6) (9) by irradiation with YAG laser light 03) to obtain the state shown in FIG. 4(b).

At this time, in this embodiment, the YAG laser beam was scanned by the width of the source and drain to cut the gap between the source and drain.

The laser beam conditions were 50 m'W/nun'', a Q-switched repetition frequency of 5 KHz, and a scanning speed of 50 mm/n.
By scanning once in Sec, it was possible to cut between the source and drain. This cutting part Q2 between the source and drain
The width of 1 was approximately 4.2 μm.

After patterning these into a predetermined pattern, an I-type non-single crystal silicon semiconductor film (7) was formed on them to a thickness of about 5000 nm by a known plasma CVD method. The manufacturing conditions created are shown below.

Substrate temperature 220°C Reaction pressure 0.05TorrRf power (13.56MH,) 80W Gas used
5tu4 Meeting In this way, the thin film transistor shown in Fig. 5 (C) was completed.

In this way, since the gap between the source and drain is not etched and processed as in the conventional method, it is possible to easily form a source-drain gap of 10 μm or less, approximately 4.0 μm in the case of this example, and to form a TPT with a short channel length. It could be manufactured with good reproducibility.

In the case of this embodiment, since the metal electrode is provided under the low-resistance semiconductor layer, the wiring resistance thereof is extremely low.

In particular, TPT is used as a switching element for large-area liquid crystal devices.
When using a short channel TPT, the wiring resistance is small, so the drive signal waveform does not become dull and a large amount of TPT can respond at high speed. It can be used more effectively.

In the above embodiments, excimer laser and YAG laser are used as laser beams, but the invention is not limited to these lasers. However, it is important that the focused laser light has enough energy to cut the semiconductor layer or metal layer.

Furthermore, since excimer laser light has a high amount of energy per unit area, it can be focused using an optical system on a rectangular irradiation cross section with a narrow width and a long length. In this case, when applied to the production of devices such as liquid crystal displays and image sensors in which TPTs are regularly arranged on a large-area substrate, a large number of TPTs formed on this large-area substrate can be processed in a single time. It plays a major role in reducing the cost of these devices.

In all of the embodiments described above, silicon semiconductor was used.

However, in the TPT manufacturing method of the present invention, the usable semiconductor is not limited to silicon, but other materials can be used as long as a TPT with a short channel length is required and it can be processed by laser. It is possible.

"Effects" According to the configuration of the present invention, the source-drain interval can be easily shortened compared to the conventional technology, and therefore, it has become possible to easily manufacture a TPT with a short channel length.

This has made it possible to use TPTs using non-single crystal semiconductors, which conventionally could not be used as switching elements in display devices, image sensors, etc. even if realized due to low carrier mobility.

In addition, since we used laser processing technology to shorten the channel length, there is no problem with processing accuracy even if the area is increased.
It has become very easy to form a large number of TPTs with good characteristics on a large substrate.

In addition, in areas where photolithography technology is applied, strict processing precision for mask alignment is not required, and TPT
It was possible to easily miniaturize and increase the integration of circuits.

In addition, since it is an inverted coplanar type, it is easy to selectively process the underlying gate insulating film and non-single crystal semiconductor during laser processing, increasing the degree of freedom in the process and making it suitable for a wide range of industrial applications. There is.

[Brief explanation of the drawing]

FIGS. 1(a)-(c) and FIGS. 4(a)-(c) are schematic diagrams showing the manufacturing process of TPT according to an embodiment of the present invention. FIGS. 2 and 3 show the cross-sectional structure of a conventional TPT. 1 ・ ・ ・ 2 ・ ・ ・ 3 ・ ・ 4 ・ ・ ・ 5 ・ ・ 6 ・ ・ 7 ・ ・ ・ 8 ・ ・ 9 ・ ・ ・ 12 ・ ・ ・ 11.13 Low resistance non-single crystal semiconductor layer Source region Drain region High resistance non-single crystal semiconductor layer Source electrode Drain electrode Cutting area between source and drain...Laser light

Claims (1)

[Claims] 1. A step of forming a gate electrode and a gate insulating film on a substrate having an insulating surface when manufacturing an inverted coplanar thin film transistor, and forming a source or drain region on the gate insulating film. forming a low-resistance non-single-crystal semiconductor layer, and irradiating the low-resistance non-single-crystal semiconductor layer at positions corresponding to the gate electrode and the gate insulating film with laser light; Cutting the semiconductor layer,
1. A method for manufacturing a thin film transistor, comprising the steps of dividing into a source region and a drain region, and forming a high-resistance non-single crystal semiconductor layer on the cut portion and the source/drain region. 2. In the method for manufacturing a thin film transistor according to claim 1, a metal electrode is formed under a low resistance non-single crystal semiconductor layer constituting the source or drain region, and A method for manufacturing a thin film transistor, characterized in that a laser beam irradiated to form a region also cuts a metal electrode under the non-single crystal semiconductor layer.