JPH02216667A - White peak inversion phenomenon compensating circuit - Google Patents

Abstract

PURPOSE:To compensate a white peak inversion phenomenon by providing a detecting circuit, which detects a pulse component not outputted to a first limiter, and a synthesizing circuit to which the output of the first limiter and the detection output of the detecting circuit are supplied. CONSTITUTION:A detecting circuit 4, which detects the pulse component which is not outputted though being inputted to first and second equalizing circuits 1A and 1B and a first limiter 2, and a synthesizing circuit 9 to which the output of the first limiter 2 and the detection output of the detecting circuit 4 are supplied are provided. The pulse component which is suppressed by the low band emphasizing effect of a magnetic tape and magnetic head system and is omitted by passing the first limiter 2 is detected by the detecting circuit 4 and is supplied to the synthesizing circuit 9 together with the output of the first limiter 2. Thus, a frequency modulated video signal where the white peak inversion phenomenon is compensated is obtained from the synthesizing circuit 9.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a white peak inversion phenomenon compensation circuit suitable for application to a reproduction system of a VTR.

[Summary of the invention]

The present invention provides a first equalization circuit having high frequency suppression characteristics and a second equalization circuit having high frequency emphasis characteristics, to which a reproduced frequency modulated video signal is supplied, and the first and second equalization circuits. first and second limiters to which the output of the circuit is supplied;
and a detection circuit that is supplied with the output of the second limiter and detects a pulse component that is input to the first limiter but is not output; and a detection circuit that is supplied with the output of the first limiter and the detection output of the detection circuit. By making it possible to obtain an output compensated for the white peak inversion phenomenon from the synthesis circuit, the circuit configuration is simplified and the white peak inversion phenomenon is compensated for without causing waveform deterioration. At the same time, it is possible to obtain a high S/N video signal.

[Conventional technology]

In conventional VTR playback systems, a frequency-modulated video signal played back by a rotating magnetic head is amplified and then supplied to an equalization circuit with high frequency suppression characteristics (upper side band suppression characteristics), and the output is sent to a limiter. By supplying the signal to the FM demodulator through the FM demodulator and demodulating it, a video signal with a high S/N ratio is obtained.

Therefore, in conventional playback systems, the instantaneous frequency of the frequency-modulated video signal becomes high in the part where the level of the video signal changes sharply from the black level to the white level, and in this part, the magnetic tape Due to the low-frequency emphasis effect of the magnetic head system, the amplitude of the frequency-modulated video signal decreases rapidly, and this small amplitude portion is lost by the limiter of the reproduction system.

To improve this, conventional VTR playback systems use a special high-frequency emphasis circuit called a playback HF circuit to suppress the deterioration of the S/N of the video signal. This H
The F circuit combines a soft limiter and a cosine equalization circuit to emphasize the high frequency range of the reproduced frequency modulated video signal, thereby reducing the amplitude difference between the low frequency range and the high frequency range of the reproduced frequency modulated video signal. This is to avoid omissions due to the limiter in the portion where the amplitude of the frequency modulated video signal suddenly decreases.

However, if this is done, the reproduced frequency modulated video signal has a poor C/N, so there is a drawback that the S/N of the demodulated video signal decreases.

Therefore, a playback device that improved this point was developed in JP-A-62-
It is disclosed in Japanese Patent No. 157370. This reproducing apparatus will be explained below with reference to FIG.

In FIG. 4, a frequency-modulated video signal Sv■ reproduced from an inclined track of a magnetic tape by a rotating magnetic head of a VTR has an upper sideband suppression characteristic (high frequency suppression characteristic) as shown in FIG. 5A. From the input terminal (31) to the equalization circuit (
32). The output Sv of this equalization circuit (32)
F□ is delayed by ΔTt in a delay circuit (34), multiplied by K (0≦≦1) in a level control circuit (36), and then supplied to an adder (38).

Also, the reproduced frequency modulated video signal SV, 1. l is
The signal is supplied from an input terminal (31) to an equalization circuit (33) with an upper sideband emphasis characteristic (high frequency emphasis characteristic) as shown in FIG. 5B. The output 5vrsz of this equalization circuit (33) is delayed by ΔT2 in the delay circuit (35), and is then sent to the level control circuit (35).
After being multiplied by (1-K) in step 7), it is supplied to the adder (38). Here, the delay time ΔT! is set so that the output 5VFNI of the equalization circuit (32) supplied to the adder (38) and the output SVrwt of the equalization circuit (33) coincide in time.

Further, the output of the adder (38) is supplied to an FM demodulator (40) via a limiter (39), and a demodulated video signal is output to an output terminal (41).

Further, the output SV of the equalization circuit (32) is sent to the multiplier (45) via the sub-limiter (42) and the absolute value circuit (43).
). Here, the gain of the sub-limiter (42) is set lower than that of the limiter (39) immediately before the FM demodulator (40), and when the output SvF□ does not cross zero or is about to cross zero, its output reaches the slice level. configured so that it does not reach.

That is, 2 points before and after the point where this output does not reach the slice level.
At points, the output SVFMI does not cross zero or is about to do so. Further, the output of the absolute value circuit (43) is delayed by ΔT3 in a delay circuit (44) and then supplied to a post-multiplier (45). I'm late here.

Further, the output signal SD of the multiplier (45) is sent to the control circuit (46).
This control circuit (46) controls the value of K of the level shift circuits (36) and (37). In this case, the value of K is controlled in accordance with the level of the output signal SD of the multiplier (45), with =1 being the maximum level and =O being being the minimum level, that is, O.

In the above configuration, consider a case where the level of the original video signal Sv0 changes rapidly, as shown in FIG. 6A, for example.

In this case, since the equalization circuit (32) is configured so that the frequency characteristic of the frequency modulated video signal has an upper side band suppression characteristic at its output side, the frequency modulated video signal SVFMI obtained at its output side is As shown in FIG. 6B, SVo does not cross zero at a portion where the level of the original video signal SVo changes rapidly. On the other hand, since the equalization circuit (33) is configured so that the frequency characteristic of the frequency modulated video signal at its output side becomes an upper side band emphasis characteristic, the frequency modulated video signal 5Vrnt obtained at its output side is as follows. As shown in FIG. 6C, zero crossings occur even in portions where the level of the original video signal Svo changes suddenly.

Also, from the delay circuits (34) and (35),
As shown in and ■, the frequency modulated video signal 5VFNI
and 5VrHz delayed by ΔT and ΔT2, respectively, are obtained, and this is the level shift circuit (36).

(37) to the adder (38).

When the equalization circuit (32) outputs the frequency modulated video signal SVFMI as shown in FIG. 6B, the sub-limiter (42) outputs a signal as shown in the same figure, and the absolute value circuit (43) outputs a signal as shown in the same figure, which is supplied to the multiplier (45). or,
The delay circuit (44) outputs a signal as shown in F in the figure, which is supplied to the multiplier (45). Therefore, the multiplier (45) outputs a signal SD as shown in G in the figure, which is supplied to the control circuit (46).

Since the value of K in the level shift circuits (36) and (37) is controlled by this control circuit (46) in accordance with the level of the output signal SD of the multiplier (45), ), a frequency modulated video signal Sv□ as shown in FIG. 6J is obtained. is output.

This frequency modulated video signal SV,M. As is clear from the figure, the portion of the frequency modulated video signal Sv□1 from the equalization circuit (32) that does not cross zero crosses zero. In the figure, the bold line portion represents the frequency modulated video signal Sv from the coilizer circuit (33). It is also mixed in with other normal periods of the zero-crossing part, but there is no problem because it is shifted from the zero-crossing timing.

Therefore, this frequency modulated video signal SVFM6 is supplied to the FM demodulator (40) via the limiter (39), so that the output terminal (41) receives the original video signal SV.

A demodulated video signal SV (shown in FIG. 6K) corresponding to the above is output.

According to this playback device, since the portions that do not cross zero are corrected so that they cross zero, overmodulation can be avoided, and the output terminal (41) receives the original video signal S
. A good demodulated video signal SV corresponding to the above can be obtained.

[Problem to be solved by the invention]

Such conventional playback devices have the disadvantage of having a complicated configuration.

In view of these points, the present invention provides a white peak inversion phenomenon compensation method that simplifies the circuit configuration, compensates for the white peak inversion phenomenon without causing waveform deterioration, and can obtain a high S/N video signal. This is an attempt to propose a circuit.

[Means to solve the problem]

The present invention provides a first equalization circuit (IA) having a high frequency suppression characteristic and a second equalization circuit (IB) having a high frequency emphasis characteristic, to which a reproduced frequency modulated video signal is supplied; and first and second limiters (2), (3) to which the outputs of the second equalization circuits (IA), (IB) are supplied; and the first and second limiters (2), (3). a detection circuit (4) to which the output of the first limiter (2) is supplied and detects a pulse component that was input to the first limiter (2) but not output; and an output and detection circuit (4) of the first limiter (2). and a combining circuit (9) to which the detection output of is supplied, and an output compensated for the white peak inversion phenomenon is obtained from the combining circuit (9).

[Effect]

According to this invention, the first
The missing pulse component is detected by passing through the limiter (2) of the first limiter (2), and is supplied to the synthesis circuit (9) together with the output of the first limiter (2). A frequency modulated video signal whose inversion phenomenon is compensated for is obtained.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to FIG. A frequency modulated video signal reproduced from an inclined track of a magnetic tape by a rotating magnetic head of a VTR is supplied from an input terminal (1a) to an equalization circuit (1).

This equalization circuit (1) includes a first equalization circuit (IA) having high frequency suppression characteristics (upper side band suppression characteristics) to which a reproduced frequency modulated video signal is supplied, and a first equalization circuit (IA) having high frequency emphasis characteristics (upper side band suppression characteristics). The second equalization circuit (IB) has an emphasis characteristic. Then, these first and second equalization circuits (IA), (
Each output of IB) is connected to a first and second limiter (2), respectively.
, (3).

Next, a configuration example of the equalization circuit (1) will be explained with reference to FIG. NPN type transistor (15) as an emitter follower with an input terminal (14) derived from the base
The emitter of the resistor (16) and the delay circuit (17) is connected to the base of the NPN transistor (19) as an emitter follower through a series circuit of the resistor (16) and the delay circuit (17). The midpoint of the connection is connected to the base of an NPN transistor (18) as an emitter follower. The emitter of the transistor (19) is connected to each non-inverting input terminal of the operational amplifier (21), (22). The emitter of the transistor (18) is
A movable contact of a potentiometer (20) connected to the inverting input terminal of the operational amplifier (22) and between the emitter of the transistor (18) and ground is connected to the inverting input terminal of the operational amplifier (21). . Output terminals (23) and (24) are derived from the output sides of the operational amplifiers (21) and (22), respectively.

Then, the resistor (16), the delay circuit (17), the transistor (19), the transistor (18), the potentiometer (20), and the operational amplifier (21) are used to form a first amplifier having high frequency suppression characteristics. A cosine equalizer as an equalization circuit (1^) is configured, and a potentiometer (20
) The higher the movable contact moves, the more the high frequency suppression characteristics are emphasized.

In addition, a second equalization circuit (22) with high-frequency emphasis is constructed by the resistor (16), the delay circuit (17), the ) transistor (19), the ) transistor (18), and the operational amplifier (22).
IB) is constructed.

Returning to FIG. 1 again, to explain the circuit of the embodiment, the first
The output sides of the second limiters (2) and (3) are provided with waveform-shaped signals a and b of a frequency-modulated video signal, a signal in which the high range is suppressed and a signal in which the high range is emphasized, respectively. (See Figures 3A and B) is output.

These signals a and b were input to the first limiter (2), but the pulse components (excluding the carrier) that were not output because they were suppressed by the low frequency emphasis effect of the magnetic tape/magnetic head system were removed. The signal is supplied to the exclusive OR circuit (5) of the detection circuit (4) for detection, and a signal C as shown in FIG. 3C is output. This signal C is directly connected to an AND gate (
7) and is also supplied to AN through the delay circuit (6).
It is supplied to the D gate (7).

Thus, on the output side of the AND gate (7), there is a pulse component d( Figure 3D) is output. Then, the signal a from the first limiter (2) is passed through the delay compensation circuit (8) to the exclusive OR circuit (
9), and the pulse component d from the detection circuit (4) is also supplied to the exclusive OR circuit (9), so that a white peak inversion occurs on the output side as shown in Figure 3. A frequency modulated video signal e whose phenomenon has been compensated for is output.

Then, the frequency modulated signal e whose white peak inversion phenomenon has been compensated for is supplied to a limiter (11) through a low-pass filter (10) that removes signals outside the required band, and its output is sent to an FM demodulator (12). ) and is demodulated, and a video signal is output to the output terminal (13).

According to the white peak inversion phenomenon compensation circuit described above, the system of the first equalization circuit (IA) and the first limiter (2), that is,
The video signal of the frequency modulated video signal on the main line is high S
/N, the detection circuit (4) detects the missing carrier in the frequency modulated video signal on the main line and compensates for it before the white peak inversion phenomenon occurs. This creates a high degree of margin.

Furthermore, according to the above-mentioned white peak inversion phenomenon compensation circuit, until carrier dropout occurs in the frequency modulated video signal on the main line, it does not have any effect on the frequency modulated video signal on the main line, so that the frequency modulated video signal on the main line is not affected at all. There is no risk of damaging the characteristics of the frequency modulated video frequency.

Further, according to the white peak inversion phenomenon compensation circuit described above, the white peak inversion phenomenon and the S of the video signal of the frequency modulated video signal are
/N, the degree of freedom in designing the high-frequency circuit of the VTR playback system increases, and since no waveform deterioration occurs, it is possible to improve the video system characteristics. In addition to this, there is an advantage that the circuit configuration becomes simple.

〔Effect of the invention〕

According to the present invention described above, there is provided a white peak inversion phenomenon compensation circuit that has a simple circuit configuration, can compensate for the white peak inversion phenomenon without causing waveform deterioration, and can obtain a high S/N video signal. This is something that can be obtained.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a circuit diagram showing a specific configuration of the equalization circuit, Fig. 3 is a timing chart for explaining the operation of the embodiment, and Fig. 4 is a conventional FIG. 5 is a block diagram showing an example, FIG. 5 is a characteristic diagram showing frequency characteristics of a conventional equalization circuit, and FIG. 6 is a timing chart for explaining the operation of the conventional example. (1), (IA) and (IB) are equalization circuits, (
2), (3) is a limiter, (4) is a detection circuit, (5)
is an exclusive OR circuit, (6) is a delay circuit, and (7) is an AN
D gate, (8) is a delay compensation circuit, (9) is an exclusive OR circuit as a synthesis circuit, (10) is a low-pass filter, (11) is a limiter, and (12) is an FM demodulator.

Claims (1)

[Scope of Claims] A first equalization circuit having high frequency suppression characteristics and a second equalization circuit having high frequency enhancement characteristics to which a reproduced frequency modulated video signal is supplied; first and second limiters to which the output of the equalization circuit is supplied; and pulse components to which the outputs of the first and second limiters are supplied and which are input to the first limiter but not output. It has a detection circuit for detecting, and a synthesis circuit to which the output of the first limiter and the detection output of the detection circuit are supplied, so that an output compensated for the white peak inversion phenomenon can be obtained from the synthesis circuit. A white peak inversion phenomenon compensation circuit characterized by: