JPH0221524A - Operating device of switch - Google Patents

Operating device of switch

Info

Publication number
JPH0221524A
JPH0221524A JP17231388A JP17231388A JPH0221524A JP H0221524 A JPH0221524 A JP H0221524A JP 17231388 A JP17231388 A JP 17231388A JP 17231388 A JP17231388 A JP 17231388A JP H0221524 A JPH0221524 A JP H0221524A
Authority
JP
Japan
Prior art keywords
switch
fet
closing coil
capacitor
series
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17231388A
Other languages
Japanese (ja)
Inventor
Shinji Kikuta
菊田 伸司
Eizo Kishii
岸井 英三
Yuusaku Oonishi
大西 有策
Akira Konemura
古根村 明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP17231388A priority Critical patent/JPH0221524A/en
Publication of JPH0221524A publication Critical patent/JPH0221524A/en
Pending legal-status Critical Current

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  • Driving Mechanisms And Operating Circuits Of Arc-Extinguishing High-Tension Switches (AREA)

Abstract

PURPOSE:To prevent the generation of high frequency waves by connecting in series a resistance and a capacitor in parallel to a series circuit of a changeover switch, a closing coil, and a field effect type transistor(FET). CONSTITUTION:In parallel to a series circuit of a changeover switch 3, a closing coil 4, and a field effect type transistor 5, a resistance 20 and a capacitor 21 are connected in series. And when the FET 5 is in the ON condition for a specific time T after the changeover switch 3 is closed, the making current flows to the closing coil 4 and a part of the current flows to the series circuit of the resistance 20 and the capacitor 21, to charge the capacitor 21. Moreover, when a maintenance current flows to the closing coil 4 to maintain the switch in a closed condition by the ON and OFF operation of the FET 5 after the switch is turned on, a temporary voltage drop is generated at the AC power source side following a starting delay of the secondary side inductive voltage of a transformer when the FET 6 is turned on, but this voltage drop is suppressed by supplying with the charged voltage of the capacitor 21. Consequently, a superposition of a high-frequency wave component to the secondary side voltage of the transformer can be prevented.

Description

【発明の詳細な説明】 [発明の目的] (産業上の利用分野) 本発明は交流電源出力を整流器により直流に変換してな
る直流電源回路に設けられた投入コイルを励磁して開閉
器を投入すると共に、該投入コイルに保持電流を供給し
て開閉器を投入状態に保持する開閉器の操作装置に関す
る。
[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention operates a switch by exciting a closing coil provided in a DC power supply circuit that converts AC power output into DC using a rectifier. The present invention relates to a switch operating device for closing the switch and supplying a holding current to the closing coil to maintain the switch in the closed state.

(従来の技術) 従来のこの種開閉器の操作装置としては、第2図に示す
ような構成のものがある。第2図において、1は交流電
源、2はこの交流電源1の出力を直流に変換する整流器
で、この整流器2の直流側には開閉スイッチ31図示し
ない開閉器の投入コイル4および詳細を後述するゲート
回路によりオン、オフ制御される電界効果形トランジス
タ(以下単にFETと称す)5が直列接続されている。
(Prior Art) A conventional operating device for this type of switch has a configuration as shown in FIG. In FIG. 2, 1 is an AC power supply, 2 is a rectifier that converts the output of this AC power supply 1 into DC, and on the DC side of this rectifier 2 there is a switch 31 and a closing coil 4 of a switch (not shown), the details of which will be described later. Field effect transistors (hereinafter simply referred to as FETs) 5 are connected in series, and are controlled on and off by a gate circuit.

また、開閉スイッチ3および投入コイル4の直列回路に
並列にフライホイールダイオード6が接続され、FET
5のソース−ドレイン間にはす−ジ保護用バリスタ7が
接続されている。
Further, a flywheel diode 6 is connected in parallel to the series circuit of the open/close switch 3 and the closing coil 4, and the FET
A surge protection varistor 7 is connected between the source and drain of the transistor 5.

一方、8はFET5にゲート信号を与えるゲート回路で
、このゲート回路8はFET5のゲートにダイオード8
−1を介して周期的にオン、オフする保持用ゲート信号
を与える非安定マルチバイブレーク8Aと、開閉スイッ
チ3が閉じるとFET5を一定時間オンさせる投入用ゲ
ート信号をダイオード8−4を介してFET5のゲート
に与える遅延回路8Bとを備えている。非安定マルチバ
イブレーク8AはCMOSインバータ8−14゜8−1
5.8−16、ダイオード8−2.8−3、コンデンサ
8−20、抵抗8−7および可変抵抗器8−13により
発振デユーティサイクル可変形に構成されている。また
、遅延回路8BはCMOSインバータ8−17.8−1
8.8−19、ゼナーダイオード8−6、ダイオード8
−5、コンデンサ8−21および抵抗8−9.8−10
.8−11.8−12から構成されている。
On the other hand, 8 is a gate circuit that provides a gate signal to FET 5, and this gate circuit 8 has a diode 8 connected to the gate of FET 5.
An unstable multi-by-break 8A provides a holding gate signal that is periodically turned on and off via diode 8-1, and a closing gate signal that turns on FET 5 for a certain period of time when the open/close switch 3 is closed is sent to FET 5 via diode 8-4. It is provided with a delay circuit 8B that provides a signal to the gate of the circuit. Unstable multi-by-break 8A is CMOS inverter 8-14°8-1
5.8-16, a diode 8-2.8-3, a capacitor 8-20, a resistor 8-7, and a variable resistor 8-13 to make the oscillation duty cycle variable. Furthermore, the delay circuit 8B is a CMOS inverter 8-17.8-1.
8.8-19, Zener diode 8-6, diode 8
-5, capacitor 8-21 and resistor 8-9.8-10
.. It is composed of 8-11.8-12.

この場合、遅延回路8Bは開閉スイッチ3が閉じると整
流器2の直流側電圧が抵抗8−11を介して入力される
ように接続されている。また、この遅延回路8Bは開閉
スイッチ3が開状態にあるとその出力信号はオンになっ
ており、開閉スイッチ3が閉じてから所定時間T経過す
るとその出力信号はオフとなる。なお、8−8はFET
5のゲート−ソース間に設けられた抵抗である。
In this case, the delay circuit 8B is connected so that when the on-off switch 3 is closed, the DC side voltage of the rectifier 2 is inputted via the resistor 8-11. Further, the output signal of this delay circuit 8B is on when the on-off switch 3 is in the open state, and the output signal is off when a predetermined time T has elapsed after the on-off switch 3 is closed. In addition, 8-8 is FET
This is a resistor provided between the gate and source of No. 5.

次にこのように構成された従来の開閉器の操作装置の作
用を第3図に示すタイムチャートを参照して説明する。
Next, the operation of the conventional switch operating device configured as described above will be explained with reference to the time chart shown in FIG.

開閉スイッチ3が開いている状態(区間a)では、FE
T5のゲート信号の如何にかかわらず、投入コイル4は
無通電状態にあり、したがって図示しない開閉器は開放
している。また、遅延回路8Bの出力信号はオン状態に
ある。
When the open/close switch 3 is open (section a), the FE
Regardless of the gate signal of T5, the closing coil 4 is in a non-energized state, and therefore the switch (not shown) is open. Further, the output signal of the delay circuit 8B is in an on state.

このような状態にあるときto時点で開閉スイッチ3を
閉じると、FET5は開閉スイッチ3が閉じてから一定
時間Tの間オン状態、つまり遅延回路8BからFET5
のゲートに加えられるゲート信号により区間すだけオン
となっているので、投入コイル4には開閉器を投入操作
するに必要な大きさの励磁電流(以下投入電流という)
が流れ、t1時点で開閉器が投入される。そして、t2
時点になると、つまり開閉スイッチ3が閉じてから一定
時間Tが経過すると、今度は非安定マルチブレーク8A
からFET5のゲートにオン、オフの保持用ゲート信号
が与えられ、投入コイル4にはFET5がオン、オフ動
作することにより断続電流が流れる。この場合、投入コ
イル3に流れる励磁電流は保持用ゲート信号のオン・オ
フデユーティ比で決まる投入電流の数分の1の保持電流
まで減少し、この保持電流で開閉器を閉状態に保持する
In such a state, when the on-off switch 3 is closed at time to, the FET 5 is in an on state for a certain period of time T after the on-off switch 3 is closed, that is, the FET 5 is turned on from the delay circuit 8B.
Since it is turned on for a period of time due to the gate signal applied to the gate of
flows, and the switch is closed at time t1. And t2
At this point, that is, when a certain period of time T has passed since the open/close switch 3 was closed, the unstable multi-break 8A is activated.
An on/off holding gate signal is applied to the gate of the FET 5, and an intermittent current flows through the closing coil 4 as the FET 5 turns on and off. In this case, the excitation current flowing through the closing coil 3 is reduced to a holding current that is a fraction of the closing current determined by the on/off duty ratio of the holding gate signal, and this holding current holds the switch in the closed state.

さらに、t3時点で開閉スイッチ3を開くと、投入コイ
ル4の励磁電流は零となり、最初の区間aの状態に戻る
Furthermore, when the open/close switch 3 is opened at time t3, the excitation current of the closing coil 4 becomes zero, and the state returns to the first section a.

このように開閉器の投入時にはFET5をゲート回路8
の遅延回路8Aでゲート制御し、また開閉器の投入後は
非安定マルチバイブレーク8Bでゲート制御して開閉器
の投入操作と投入状態を保持するようにしている。
In this way, when the switch is turned on, FET5 is connected to gate circuit 8.
Gate control is performed by a delay circuit 8A, and after the switch is closed, gate control is performed by an unstable multi-by-break 8B to maintain the closing operation and closed state of the switch.

(発明が解決しようとする課題) しかし、このような構成の開閉器の操作装置においては
、開閉器が保持状態になるとFETが非常に短い周期で
オン、オフ動作を繰返すため、交流電源側に小容量の変
圧器1例えば計器用変圧器を設置した場合、変圧器の二
次側出力の正弦波形に高周波成分が重畳した電圧波形歪
を生じる。
(Problem to be Solved by the Invention) However, in a switch operating device with such a configuration, when the switch is in the holding state, the FET repeats on and off operations in a very short cycle, so When a small-capacity transformer 1, such as a voltage transformer, is installed, a voltage waveform distortion occurs in which a high frequency component is superimposed on the sine waveform of the secondary output of the transformer.

この現象はFET5が非常に高速動作すると、FET5
がオンする際に変圧器二次側の誘起電圧の立上りが遅延
するためで、−時的な電圧降下を生じると共に、回復時
の過渡現象によりオーバシュートする。
This phenomenon occurs when FET5 operates at a very high speed.
This is because the rise of the induced voltage on the secondary side of the transformer is delayed when the transformer is turned on, resulting in a temporary voltage drop and an overshoot due to transient phenomena during recovery.

このため、変圧器の二次側の正弦波形に重畳する高周波
成分の振幅が大きいと、変圧器二次側の電圧波形のピー
ク値も大きくなり、従って波形全体の実行値が高くなる
ので、同一の変圧器の二次側に計器類が接続されている
場合には計器類の指示値に誤差が生じることがあり、ま
た高周波成分が誘導ノイズとなるため、この71!源に
他の要素の回路が共通に接続されている場合には誤動作
の原囚となる等の不具合があった。
For this reason, if the amplitude of the high frequency component superimposed on the sine waveform on the secondary side of the transformer is large, the peak value of the voltage waveform on the secondary side of the transformer will also be large, and therefore the effective value of the entire waveform will be high. If instruments are connected to the secondary side of the transformer, errors may occur in the indicated values of the instruments, and high frequency components become induced noise, so this 71! If the circuits of other elements are commonly connected to the source, there are problems such as malfunctions.

本発明は開閉器の保持状態時において、FETのオン、
オフ制御により生じる変圧器二次側の電圧降下を抑制し
、これに起因する高周波の発生を防止することができる
開閉器の操作装置を提供することを目的とする。
In the present invention, when the switch is in the holding state, the FET is turned on,
It is an object of the present invention to provide a switch operating device capable of suppressing a voltage drop on the secondary side of a transformer caused by off control and preventing the generation of high frequency waves caused by this.

[発明の構成コ (課題を解決するための手段) 本発明は上記の目的を達成するため、交流電源出力を直
流に変換する整流器の直流側に開閉スイッチを介して設
けられた開閉器の投入コイルと、この投入コイルに直列
に設けられた電界効果形トランジスタと、この電界効果
形トランジスタを前記開閉スイッチが閉路してから一定
時間オン制御して前記開閉器を投入するに必要な電流で
前記投入コイルを通電し、且つ前記開閉スイッチが閉路
してから一定時間経過すると前記電界効果形トランジス
タをオン、オフ制御して前記開閉器を保持状態にするに
必要な電流で前記投入コイルを通電するゲート回路とを
備えた開閉器の操作装置において、前記開閉スイッチ、
投入コイルおよび電界効果形トランジスタの直列回路に
並列に抵抗およびコンデンサを直列接続する構成とした
ものである。
[Structure of the Invention (Means for Solving the Problems)] In order to achieve the above object, the present invention provides a method for turning on a switch provided via a switch on the DC side of a rectifier that converts AC power output into DC. a coil, a field effect transistor provided in series with the closing coil, and controlling the field effect transistor to be turned on for a certain period of time after the opening/closing switch is closed to supply the current necessary to close the switch. The closing coil is energized, and after a certain period of time has elapsed since the opening/closing switch is closed, the closing coil is energized with a current necessary to turn on and off the field effect transistor and bring the switch into a holding state. In a switch operating device comprising a gate circuit, the opening/closing switch;
It has a configuration in which a resistor and a capacitor are connected in series in parallel to a series circuit of an input coil and a field effect transistor.

(作用) したがって、このような構成の開閉器の操作装置にあっ
ては、開閉器の保持状態時におけるFETのオン、オフ
制御の際に交流電源側に設置された変圧器の二次側が電
圧降下すると、開閉スイッチ、投入コイルおよび電界効
果形トランジスタの直列回路に並列に抵抗を介して接続
されたコンデンサの充電電圧によって電圧降下が抑制さ
れるので、変圧器二次側の電圧波形歪みを除去すること
が可能となる。
(Function) Therefore, in the switch operating device having such a configuration, when controlling the FET on and off when the switch is in the holding state, the secondary side of the transformer installed on the AC power supply side When the voltage drops, the voltage drop is suppressed by the charging voltage of the capacitor connected in parallel to the series circuit of the open/close switch, closing coil, and field effect transistor via a resistor, thereby eliminating voltage waveform distortion on the secondary side of the transformer. It becomes possible to do so.

(実施例) 以下本発明の一実施例を図面を参照して説明する。(Example) An embodiment of the present invention will be described below with reference to the drawings.

第1図は本発明による開閉器の操作装置の回路構成例を
示すもので、第2図と同一部分には同一記号を付して示
す。なお、ゲート回路の構成及びその動作は従来回路と
同一なため、その説明を省略する。第1図において、1
は交流電源で、この交流電源1には図示しない小容量の
変圧器が用いられ、その二次側には計器類や他の要素の
回路が接続される。2はこの交流電源1の出力を直流に
変換する整流器で、この整流器2の直流側には開閉スイ
ッチ31図示しない開閉器の投入コイル4および従来回
路と同様のゲート回路8によりオン。
FIG. 1 shows an example of the circuit configuration of a switch operating device according to the present invention, and the same parts as in FIG. 2 are shown with the same symbols. Note that the configuration and operation of the gate circuit are the same as those of the conventional circuit, so a description thereof will be omitted. In Figure 1, 1
is an alternating current power source, and a small capacity transformer (not shown) is used for this alternating current power source 1, and circuits for instruments and other elements are connected to the secondary side of the transformer. Reference numeral 2 denotes a rectifier that converts the output of the AC power supply 1 into DC. On the DC side of the rectifier 2, an on/off switch 31 is turned on by a closing coil 4 of a switch (not shown) and a gate circuit 8 similar to the conventional circuit.

オフ制御されるFET5が直列接続されている。FETs 5 which are turned off are connected in series.

また、開閉スイッチ3および投入コイル4の直列回路に
並列にフライホイールダイオード6が接続され、FET
5のソース−ドレイン間にはサージ保護用バリスタ7が
接続されている。
Further, a flywheel diode 6 is connected in parallel to the series circuit of the open/close switch 3 and the closing coil 4, and the FET
A surge protection varistor 7 is connected between the source and drain of the transistor 5.

本実施例ではこのような開閉器の操作装置において、開
閉スイッチ3.投入コイル4および電界効果形トランジ
スタ5の直列回路に並列に抵抗20およびコンデンサ2
1を直列接続する構成とするものである。
In this embodiment, in such a switch operating device, the on/off switch 3. A resistor 20 and a capacitor 2 are connected in parallel to the series circuit of the input coil 4 and the field effect transistor 5.
1 are connected in series.

このような構成の開閉器の操作装置において、開閉スイ
ッチ3が閉じてから一定時間Tの間FET5がオン状態
にあると、投入コイル4に投入電流が流れると共にその
電流の一部が抵抗20及びコンデンサ21の直列回路に
も流れ、コンデンサ21が充電される。そして、開閉器
の投入後にFET5がオン、オフ動作により投入コイル
4に保持電流が流れて開閉器が閉状態に保持されると、
FET5がオンした際に交流電源側の変圧器の二次側誘
起電圧の立上り遅延に伴って一次的な電圧降下を生じる
が、この電圧降下はコンデンサ21の充ffi?(を圧
で補充されることによって完全に抑制できるので、変圧
器二次側電圧に高周波成分が重畳するようなことがなく
なる。
In the switch operating device having such a configuration, when the FET 5 is in the ON state for a certain period of time T after the on/off switch 3 is closed, a closing current flows through the closing coil 4 and a portion of the current flows through the resistor 20 and It also flows through the series circuit of the capacitor 21, and the capacitor 21 is charged. After the switch is closed, the FET 5 turns on and off, causing a holding current to flow through the closing coil 4 and holding the switch in the closed state.
When the FET 5 is turned on, a primary voltage drop occurs due to the delay in the rise of the secondary side induced voltage of the transformer on the AC power supply side, but this voltage drop is caused by the charging of the capacitor 21? It can be completely suppressed by replenishing the voltage with voltage, so there is no possibility of high frequency components being superimposed on the secondary voltage of the transformer.

したがって、計器用変圧器等の二次側電圧波形にノイズ
が生じないため、計器類に指示される指示値に誤差が生
じるようなことがなく、また変圧器二次側に他の要素の
回路が接続される場合でも誘導ノイズによる誤動作を回
避することができる。
Therefore, noise does not occur in the voltage waveform on the secondary side of the instrument transformer, etc., so there is no error in the indicated value indicated by the instruments, and there is also no possibility that the secondary side of the transformer is connected to the circuits of other elements. Malfunctions due to inductive noise can be avoided even when the inductive noise is connected.

[発明の効果] 以上述べたように本発明によれば、開閉器の保持状態時
におけるFETのオン、オフ制御により生じる交流電源
の変圧器二次側の電圧降下を抑制し、これに起因する高
周波の発生を防止することができる開閉器の操作装置を
提供できる。
[Effects of the Invention] As described above, according to the present invention, the voltage drop on the secondary side of the transformer of the AC power supply caused by the on/off control of the FET when the switch is in the holding state is suppressed, and the voltage drop caused by this is suppressed. It is possible to provide a switch operating device that can prevent the generation of high frequency waves.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による開閉器の操作装置の回路構成図、
第2図は従来の開閉器の操作装置の回路構成図、第3図
は従来装置の作用を説明するためのタイムチャートを示
す図である。 1・・・・・・交流電源、2・・・・・・整流器、3・
・・・・・開閉スイッチ、4・・・・・・投入コイル、
5・・・・・・FET。 6・・・・・・フライホイールダイオード、7・・・・
・・サージ保護用バリスタ、8・・・・・・ゲート回路
、20・・・・・・抵抗、21・・・・・・コンデンサ
。 出願人代理人 弁理士 鈴江武彦
FIG. 1 is a circuit diagram of a switch operating device according to the present invention;
FIG. 2 is a circuit configuration diagram of a conventional switch operating device, and FIG. 3 is a diagram showing a time chart for explaining the operation of the conventional device. 1... AC power supply, 2... Rectifier, 3.
... Open/close switch, 4... Closing coil,
5...FET. 6...Flywheel diode, 7...
...Varistor for surge protection, 8...Gate circuit, 20...Resistor, 21...Capacitor. Applicant's agent Patent attorney Takehiko Suzue

Claims (1)

【特許請求の範囲】[Claims] 交流電源出力を直流に変換する整流器の直流側に開閉ス
イッチを介して設けられた開閉器の投入コイルと、この
投入コイルに直列に設けられた電界効果形トランジスタ
と、この電界効果形トランジスタを前記開閉スイッチが
閉路してから一定時間オン制御して前記開閉器を投入す
るに必要な電流で前記投入コイルを通電し、且つ前記開
閉スイッチが閉路してから一定時間経過すると前記電界
効果形トランジスタをオン、オフ制御して前記開閉器を
保持状態にするに必要な電流で前記投入コイルを通電す
るゲート回路とを備えた開閉器の操作装置において、前
記開閉スイッチ、投入コイルおよび電界効果形トランジ
スタの直列回路に並列に抵抗およびコンデンサを直列接
続する構成としたことを特徴とする開閉器の操作装置。
A closing coil of a switch is provided via an on/off switch on the DC side of a rectifier that converts an AC power output into DC, a field effect transistor is provided in series with this closing coil, and this field effect transistor is connected to the After the on-off switch is closed, the closing coil is energized with a current necessary to close the switch by performing on-control for a certain period of time after the on-off switch is closed, and when a certain period of time has elapsed after the on-off switch is closed, the field effect transistor is turned on. A switch operating device comprising: a gate circuit that energizes the closing coil with a current necessary to put the switch in a holding state through on/off control; A switch operating device characterized by having a configuration in which a resistor and a capacitor are connected in series in parallel to a series circuit.
JP17231388A 1988-07-11 1988-07-11 Operating device of switch Pending JPH0221524A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17231388A JPH0221524A (en) 1988-07-11 1988-07-11 Operating device of switch

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17231388A JPH0221524A (en) 1988-07-11 1988-07-11 Operating device of switch

Publications (1)

Publication Number Publication Date
JPH0221524A true JPH0221524A (en) 1990-01-24

Family

ID=15939600

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17231388A Pending JPH0221524A (en) 1988-07-11 1988-07-11 Operating device of switch

Country Status (1)

Country Link
JP (1) JPH0221524A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960042019A (en) * 1995-05-05 1996-12-19 케이스 스미스. Modular gas meter assemblies and associated manifolds,

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57185640A (en) * 1981-05-12 1982-11-15 Matsushita Electric Ind Co Ltd Relay driving circuit
JPS6139908B2 (en) * 1979-01-31 1986-09-06 Nippon Electric Co
JPS6244504U (en) * 1985-09-04 1987-03-18
JPS6298518A (en) * 1985-10-25 1987-05-08 株式会社東芝 Operating circuit for circuit breaker
JPS6355828A (en) * 1986-08-26 1988-03-10 松下電工株式会社 Driving circuit for polar relay
JPS6362305A (en) * 1986-09-03 1988-03-18 Hitachi Ltd Coil exciting circuit

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6139908B2 (en) * 1979-01-31 1986-09-06 Nippon Electric Co
JPS57185640A (en) * 1981-05-12 1982-11-15 Matsushita Electric Ind Co Ltd Relay driving circuit
JPS6244504U (en) * 1985-09-04 1987-03-18
JPS6298518A (en) * 1985-10-25 1987-05-08 株式会社東芝 Operating circuit for circuit breaker
JPS6355828A (en) * 1986-08-26 1988-03-10 松下電工株式会社 Driving circuit for polar relay
JPS6362305A (en) * 1986-09-03 1988-03-18 Hitachi Ltd Coil exciting circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR960042019A (en) * 1995-05-05 1996-12-19 케이스 스미스. Modular gas meter assemblies and associated manifolds,

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