JPH02214163A - Manufacture of thyristor - Google Patents

Manufacture of thyristor

Info

Publication number
JPH02214163A
JPH02214163A JP3542089A JP3542089A JPH02214163A JP H02214163 A JPH02214163 A JP H02214163A JP 3542089 A JP3542089 A JP 3542089A JP 3542089 A JP3542089 A JP 3542089A JP H02214163 A JPH02214163 A JP H02214163A
Authority
JP
Japan
Prior art keywords
phosphorus
oxide film
type semiconductor
lifetime
thyristor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3542089A
Other languages
Japanese (ja)
Inventor
Katsumi Sato
克己 佐藤
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP3542089A priority Critical patent/JPH02214163A/en
Publication of JPH02214163A publication Critical patent/JPH02214163A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To sufficiently recover a lifetime and to prevent an ON voltage from being increased by a method wherein an oxide film, on one face, to be used as a mask is removed selectively, also an oxide film on the other face is removed and phosphorus is deposited. CONSTITUTION:An oxide film 2 of a silicon wafer 1 of a P-n-P structure is formed again; a window is opened in an oxide film 2 on the side of one main face by using a photolithographic technique; an oxide film 2 on the side of the other main face is removed. In order to form N-type semiconductor regions in P-type semiconductor regions on the two main faces, phosphorus is diffused including a driving operation of the phosphorus in such a way that the phosphorus having surface concentration of 10<21>/cm<2> or higher is deposited and that the surface concentration after the driving operation is 10<21>/cm<2> or higher; in addition, a phosphorus diffusion layer on the side of the other main face is removed by a lapping operation or the like. Thereby, a lifetime of the silicon wafer 1 after the phosphorus has been driven is recovered to a level identical to an initial wafer; it is possible to prevent an ON voltage from being increased.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明はヂ′イリスタの製造方法に関し、特にシリコ
ンウェハのライフタイムの向上を図るものである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a method for manufacturing a diristor, and particularly to improving the lifetime of silicon wafers.

〔従来の技術〕[Conventional technology]

従来、一般に周知のサイリスタはP −n −P −n
の4m構造を有している。
Conventionally, the commonly known thyristor is P-n-P-n
It has a 4m structure.

この従来の4層構造をなすサイリスタの製造方法を第3
図に示す。まず目標の耐圧が得られるように、所定の比
抵抗と厚みを持つn型しリコンウエハlの両生面に、A
IまたはGaのP型ドーパントを所定の表面濃度と接合
深さを持つように拡散して、P −n −P構造とする
〔第31’3b )。次に、このシリコンウェハ1に酸
化膜2をつけ直しして、一方の主面側の酸化膜2に写真
型版技術により窓明けを行なう〔第3図C〕。次に、サ
イリスタのP −n −P −n 4層構造とするため
に、窓明けした酸化膜2及び他方の主面全面の酸化膜2
をマスクにして燐をデポジションを行なう。次に、マス
クとした酸化膜2を除去し、燐をドライブすることによ
って、燐拡散を行なう(第3図d)。このようにして、
サイリスタのP  n  P  n4M構造を製作して
いた。
The third method for manufacturing a thyristor with this conventional four-layer structure
As shown in the figure. First, in order to obtain the target breakdown voltage, A
A P-type dopant of I or Ga is diffused to have a predetermined surface concentration and junction depth to form a P-n-P structure [No. 31'3b]. Next, the oxide film 2 is reattached to the silicon wafer 1, and a window is opened in the oxide film 2 on one main surface side by photolithography (FIG. 3C). Next, in order to form a P-n-P-n four-layer structure of the thyristor, the oxide film 2 with the window opened and the oxide film 2 on the entire other main surface.
Deposit phosphorus using the mask as a mask. Next, the oxide film 2 used as a mask is removed and phosphorus is driven to diffuse phosphorus (FIG. 3d). In this way,
A PnPn4M thyristor structure was manufactured.

第2図はこの従来の製造方法を用いたときの工程毎のシ
リコンウェハのライフタイム変化の状態を示す曲線図で
ある(実線B)。燐ドライブ完了後のシリコンウェハの
ライフタイムは初期ウェハのレベルまで回復していない
FIG. 2 is a curve diagram (solid line B) showing the state of lifetime change of a silicon wafer in each process when this conventional manufacturing method is used. The lifetime of the silicon wafer after the phosphorus drive is completed has not recovered to the level of the initial wafer.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来のサイリスタの製造方法は以上のように構成されて
いたのでs G a等のP型ドーパントの拡散また酸化
膜の形成などにより、シリコンウェハのライフタイムの
低下を引き起こし、ゲッタリング効果を持つ燐デポジシ
ッンによ。てライフタイムは回復するもののこの方法で
は十分ではなく、ライフタイムと(1)式のような関係
にあるサイリスタ〔vT:サイリスタのオン雪圧、W:
サイリスタのnペース層の厚み、L:nペース層中のラ
イフタイム〕 のオン電圧vTは高くなるという問題点があった。
Conventional thyristor manufacturing methods have the above-mentioned structure, which causes a reduction in the lifetime of the silicon wafer due to the diffusion of P-type dopants such as sGa and the formation of oxide films. By deposit. Although the lifetime can be recovered by using this method, this method is not sufficient.
Thickness of n-paste layer of thyristor, L: lifetime in n-paste layer] There was a problem in that the on-voltage vT of the thyristor became high.

この発明は上記のまうな問題点を解消するためになされ
たもので、ライフタイムを十分に回復させ、オン電圧が
高(なるのを防止するサイリスタの製造方法を得ること
を目的とする。
This invention was made to solve the above-mentioned problems, and aims to provide a method for manufacturing a thyristor that sufficiently restores the lifetime and prevents the on-voltage from becoming high.

〔課題を解決するための手段〕[Means to solve the problem]

この発明に係るサイリスタの製造方法は、マスクとして
使用する一方の主面の酸化膜を選択的に除去するととも
に、他方の主面の酸化膜も除去し、燐デボジシ、ンを行
なうようにしたものである。
The method for manufacturing a thyristor according to the present invention is such that the oxide film on one main surface used as a mask is selectively removed, and the oxide film on the other main surface is also removed to perform phosphorus deposition. It is.

〔作用〕[Effect]

この発明におけるサイリスタの製造方法は両面に燐デポ
ジシッンをされるため、より効果的なゲッタリングがな
され、シリコンウェハのライフタイムの回復が十分なさ
れる。
In the method of manufacturing a thyristor according to the present invention, phosphorus is deposited on both sides, so that gettering is more effective and the lifetime of the silicon wafer is fully recovered.

〔実施例〕〔Example〕

以下、この発明の一実施例を閏について説明する。 Hereinafter, one embodiment of the present invention will be explained regarding a leap.

第1図はこの発明の一実施例によるサイリスタの製造方
法を示す断面図で、第1図(a)と(b)の工程までは
、第3図(a)と(b)に示す従来の製造工程と同一で
みろ。第1図(b)の工程後、このシリコンウェハ1の
酸化膜2をつけ直しして、一方の主面<1111の酸化
膜2に写真製版技術により窓明けを行なうと同時に、他
方の主面側の膜化膜2を除去する(第1図C)。次に、
シリコンウェハ1に燐デポジシッンを行なう。この際、
他方の主面側の酸化膜2が除去されており、シリコンウ
ェハlに燐デポジションされる面積が増大し、ゲッタリ
ング効果による不純物の吸い出し尋が効果的に行なわれ
、ライフタイムが十分回復する。次に、マスクとした・ 酸化膜2を除去したのち、燐をドライブすることによっ
て、燐拡散を行なう(第1図d)。さらに、P −n 
−P −n 4 m構造にするために、他方の主面側の
燐拡散層をラッピング等により除去する(第1図e)。
FIG. 1 is a sectional view showing a method for manufacturing a thyristor according to an embodiment of the present invention. Look at it the same way as the manufacturing process. After the process shown in FIG. 1(b), the oxide film 2 of this silicon wafer 1 is reattached, and a window is opened on the oxide film 2 of <1111 on one main surface by photolithography, and at the same time, the other main surface is The side film 2 is removed (FIG. 1C). next,
A silicon wafer 1 is subjected to phosphorus deposition. On this occasion,
The oxide film 2 on the other main surface side has been removed, increasing the area on which phosphorus is deposited on the silicon wafer 1, effectively sucking out impurities due to the gettering effect, and sufficiently recovering the lifetime. . Next, after removing the oxide film 2 used as a mask, phosphorus is diffused by driving phosphorus (FIG. 1d). Furthermore, P −n
In order to obtain a -P-n 4 m structure, the phosphorus diffusion layer on the other main surface side is removed by lapping or the like (FIG. 1e).

以上のようにして、サイリスタのP−n −P −n 
4周構造を製作する。
As described above, the thyristor P-n-P-n
Fabricate a four-circle structure.

第2図にこの実施例の製造方法を用いたときのシリコン
ウェハのライフタイム変動の状態を示す(破HA)。こ
の実施例の製造方法を用いた場合には燐ドライブ完了後
のシリコンウェハのライフタイムは初期ウェハと同等ま
で回復する。これにより、オンで圧が高くなるのを防止
することができる。
FIG. 2 shows the state of lifetime fluctuation of a silicon wafer when the manufacturing method of this embodiment is used (broken HA). When the manufacturing method of this embodiment is used, the lifetime of the silicon wafer after completion of the phosphorus drive is recovered to the same level as that of the initial wafer. This can prevent the pressure from increasing when the switch is on.

〔発明の効果〕〔Effect of the invention〕

以上のまうにこの発明にぼれば、燐デポジションによる
ゲッタリング効果を最大限に活用し、ライフタイムを初
期レベルまで回復させるようにしたので、このためオン
電圧を低く抑えることが可能となる。
According to the present invention, as described above, the gettering effect due to phosphorus deposition is utilized to the fullest and the lifetime is restored to the initial level, thereby making it possible to suppress the on-voltage to a low level.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例によるサイリスタの製造方
法を示す断面図、第2図は、従来およびこの発明共通の
サイリスタ製造工程によるシリコンウェハのライフタイ
ムの変動を示す曲線図、第3図は従来のサイリスタの製
造方法を示す断面図である。図において、lはシリコン
ウェハ、2は酸化膜である。 なお、図中、同一符号は同一 または相当部分を示す。
FIG. 1 is a cross-sectional view showing a method for manufacturing a thyristor according to an embodiment of the present invention, FIG. 2 is a curve diagram showing variations in the lifetime of a silicon wafer according to the thyristor manufacturing process common to the conventional method and the present invention, and FIG. 1 is a cross-sectional view showing a conventional method of manufacturing a thyristor. In the figure, l is a silicon wafer and 2 is an oxide film. In addition, the same symbols in the figures indicate the same or equivalent parts.

Claims (1)

【特許請求の範囲】[Claims]  N型半導体基板の相対向する2つの主面にP型不純物
を拡散してP型半導体領域を形成する工程と、同時に前
記2つの主面上のP型半導体領域中にN型半導体領域を
形成するための10^2^1/cm^3以上の表面濃度
を有しリンデポジションかつ、ドライブ後の表面濃度が
10^2^1/cm^3以上になる燐ドライブを含む燐
拡散工程と、一方の主面上の前記P型半導体領域中に拡
散された前記N型半導体領域を除去する工程を備えたこ
とを特徴とするサイリスタの製造方法。
Forming a P-type semiconductor region by diffusing P-type impurities into two opposing main surfaces of an N-type semiconductor substrate, and simultaneously forming an N-type semiconductor region in the P-type semiconductor regions on the two main surfaces. a phosphorus diffusion step including a phosphorus drive having a surface concentration of 10^2^1/cm^3 or more to achieve a phosphorus deposition and a phosphorus drive such that the surface concentration after driving becomes 10^2^1/cm^3 or more; A method for manufacturing a thyristor, comprising the step of removing the N-type semiconductor region diffused into the P-type semiconductor region on one main surface.
JP3542089A 1989-02-15 1989-02-15 Manufacture of thyristor Pending JPH02214163A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3542089A JPH02214163A (en) 1989-02-15 1989-02-15 Manufacture of thyristor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3542089A JPH02214163A (en) 1989-02-15 1989-02-15 Manufacture of thyristor

Publications (1)

Publication Number Publication Date
JPH02214163A true JPH02214163A (en) 1990-08-27

Family

ID=12441379

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3542089A Pending JPH02214163A (en) 1989-02-15 1989-02-15 Manufacture of thyristor

Country Status (1)

Country Link
JP (1) JPH02214163A (en)

Similar Documents

Publication Publication Date Title
US3966577A (en) Dielectrically isolated semiconductor devices
EP0323549B1 (en) Bipolar semiconductor device having a conductive recombination layer
KR910000020B1 (en) Manufacture of semiconductor device
JPH02214163A (en) Manufacture of thyristor
JPS58180018A (en) Manufacture of semiconductor substrate
JPH05102175A (en) Manufacture of semiconductor device
JPS6224617A (en) Epitaxial growth method
JPH0349236A (en) Manufacture of mos transistor
JPH06296016A (en) Semiconductor device
KR0161924B1 (en) Thin film transistor
JPS62108576A (en) Manufacture of semiconductor device
KR930009124B1 (en) Method of fabricating semiconductor device
JPS58122769A (en) Manufacture of semiconductor device
JPH01223765A (en) Manufacture of semiconductor device
JPH0410548A (en) Manufacture of semiconductor device
JPH02197136A (en) Manufacture of semiconductor device
JPH0423438A (en) Manufacture of semiconductor device
JPH0139225B2 (en)
JPS60254745A (en) Manufacture of complementary type dielectric isolating substrate
JPS62219666A (en) Manufacture of semiconductor device
JPS63257261A (en) Manufacture of semiconductor device
JPS6185867A (en) Manufacture of semiconductor device
JPH05243506A (en) Manufacture of cmosic
JPH05343416A (en) Manufacture of semiconductor device
JPH01196172A (en) Semiconductor device