JPH02214150A - Method of designing input protective circuit for semiconductor device and input protective circuit - Google Patents

Abstract

PURPOSE:To properly and easily set a circuit constant of an input protective circuit in a semiconductor device provided with a required protective voltage and a required input delay-time characteristic by a method wherein an electrical transient analysis and a thermal analysis regarding a polysilicon resistance and a diode are executed at the same time. CONSTITUTION:A protective characteristic such as a required protective voltage, a required input delay time or the like and a process limitation condition of a thin-film resistance are set; a resistance value of the thin-film resistance is set on the basis of an input capacity and the input delay time of a whole input protective circuit. Then, an area, a width and a length of the thin-film resistance are set on the basis of a temperature rise characteristic of the thin-film resistance obtained by solving a heating conduction equation on the basis of a transient analysis of a thermal energy applied to the thin-film resistance; a parasitic series resistance value of a diode and a diode voltage are set on the basis of a breakdown voltage of an internal circuit to be protected. A diode area is set on the basis of an electric-power density applied to the diode and of a failure temperature. Thereby, it is possible to design an input protective circuit provided with a required protective characteristic.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for designing an input protection circuit for a semiconductor device and an input protection circuit created by the design method.

[Conventional technology]

Conventionally, in semiconductor devices such as ICs and LSIs, input protection circuits have been used to protect internal circuits from excessive inputs loaded by static electricity, etc. The input protection elements that make up such input protection circuits are MOS , bipolar, bipolar/CMOS devices, etc. have become important functional elements for guaranteeing the reliability of semiconductor devices.

Various circuit configurations have been put into practical use as input protection circuits, but in particular recently, ``Measures against electrostatic damage that are becoming increasingly important'' (Dave Hughes, Nikkei Microdevices, November 1986, No. 131) p.), rM.

As introduced in papers such as "S Device Electrostatic Damage Evaluation Method" (Yasuhiro Fukuda et al., IEICE Journal R83-33),
It has become common to use input protection resistors and protection diodes formed from polysilicon layers.

As a more specific known technique, Japanese Patent Application Laid-Open No. 53-7667
In No. 9, a protection circuit is constructed with a thin film resistor formed on the substrate and a diode formed in the substrate, and the diode and internal circuit are protected by extremely suppressed current flowing against excessive input voltage. Something like this has been proposed.

Further, Japanese Patent Laid-Open No. 56-2664 proposes a protection circuit that uses a linear polysilicon resistor to prevent the polysilicon resistor from melting due to local heating at a bent portion. Furthermore, JP-A-57-24563 and JP-A-57-153461 disclose protection circuits using polysilicon resistors in which metal is placed in the bent portions, and the bent portions are used as low-resistance portions. Japanese Patent Publication No. 59-105369
The issue proposes a protection circuit using polysilicon resistors with a width-to-length ratio of 6.

[Problem to be solved by the invention]

However, it has been found that when an input protection circuit is simply formed using a polysilicon resistor and a diode using conventional known technology, the polysilicon resistor used as the input protection resistor is easily destroyed by heat. . In other words, in order to completely protect the internal circuit from excessive input, it is necessary to instantly dissipate the microjoule (μJ) order electrostatic energy stored in the human body in the form of thermal energy in polysilicon resistors and diodes. It has been found. Therefore, appropriate polysilicon resistors and protection diodes to be used in input protection circuits are determined by using electrical transient analysis and thermal analysis to examine the shape and size of these polysilicon resistors and protection diodes, as well as margins regarding withstand voltage. Must.

However, regarding thermal analysis, Wunsch-Bell
Thermal breakdown model for diodes (Wu
nsch, D, C0 and Be11. R, R,
'Determination of Threshho
ld Failure 1 level of Sen+1
conductor Diode and Transi
stor Due to Pulse Voltage
sIEEE Trans, Nucl, Sci;
N5-151968+ P244 to P256), and no proposal regarding thermal analysis of polysilicon resistance has been made yet, making it impossible.

Therefore, the methods proposed in the above-mentioned publications do not take any thermal analysis into consideration, and are only based on conceptual methods or empirical methods.

The present invention was made to solve the above-mentioned problems in conventional input protection circuits for semiconductor devices, and it is possible to set parameters by simultaneously performing electrical transient analysis and thermal analysis regarding polysilicon resistors and diodes. The object of the present invention is to provide a method for designing an input protection circuit that includes polysilicon and diodes and has necessary protection characteristics, and to provide the input protection circuit.

[Means and effects for solving the problems] In order to solve the above problems, the present invention includes a clamp circuit consisting of a thin film resistor whose one end is connected to an input pad and a diode connected to the other end of the thin film resistor. In a method for designing an input protection circuit for a semiconductor device, there are steps for setting protection characteristics such as required protection voltage and input delay time, and process limit conditions for thin film resistors, and steps for setting the input capacitance and input delay time of the entire input protection circuit. The step of setting the resistance value of the thin film resistor based on A step of setting the area 2 width and length, a step of setting the diode parasitic series resistance value and the diode voltage based on the breakdown voltage of the internal circuit to be protected, and a step based on the power density applied to the diode and the failure temperature. The input protection circuit is designed by the step of setting the diode area.

By designing in this way, it is possible to appropriately and easily set the circuit constants of the input protection circuit in a semiconductor device having the required protection voltage and input delay time characteristics.

Further, in the present invention, a film having a thickness of 0.3 to 0.5 μm formed on a base oxide film having a film thickness of 0.8 to 1.0 μm has a sheet resistance of 30 μm.
A polysilicon resistor doped with P-type or N-type impurity of ~100Ω/□ is used, and the resistance value is set to 400Ω to 1KΩ and the width is set to 1KΩ based on the design method of the input protection circuit of the semiconductor device.
A thin film resistor with an area of 5 to 30 μm and an area of 10000 pm” or more, and a parasitic series resistance of 30 Ω or less between the high potential side of the power supply and a diode area of 10 x 10 μm
Connect the P-type diode described above and connect an N-type diode with a parasitic series resistance of 30Ω or less and a diode area of 1O x 10μm or more between it and the low potential side of the power supply to determine the impedance seen from the input. The input protection circuit of the semiconductor device is composed of the clamp circuit and the symmetrical clamp circuit.

With this configuration, the input delay time can be reduced to 0.5
An input protection circuit having an electrostatic resistance of 300 ns or less can be easily provided.

〔Example〕

In the input protection circuit of a semiconductor device, conventionally, the size and shape parameters of the polysilicon resistor used as the input protection resistor, that is, the base oxide film thickness.

Polysilicon sheet resistance, polysilicon resistance W/L
(width and length), resistance value of polysilicon resistor.

Furthermore, it is not possible to directly and appropriately determine the area and parasitic series resistance of the diode formed together.
The design parameters of each of the above-mentioned protection elements were determined by prototyping various circuits with different layouts and evaluating them. However, depending on this method,
If requirements such as withstand voltage and input delay time change, it will not be possible to respond.

The present invention provides design parameters for each input protection element corresponding to required performance by performing electrical transient analysis and thermal analysis of polysilicon resistors and diodes. First, we will discuss electrical transient analysis of input protection circuits.

The first prisoner is shown an input protection circuit for a semiconductor device that is currently in common use. In the figure, 1 is an input pad,
2 is a polysilicon resistor, and 3.4 is a clamp circuit consisting of a diode and the like connected between the output side of the polysilicon resistor 2 and the power supply terminals vcC and G-N0, respectively. This input protection circuit converts electrostatic energy accumulated in the human body of approximately μJ1 into thermal energy using the polysilicon resistor 2 and the diode of the clamp circuit 3.
This is to suppress the voltage to V or less. Since this protection circuit is symmetrical with respect to Vcc and GND, the equivalent circuit is as shown in FIG. 1(B). The first prisoner.

In (2), (2) is an equivalent human body voltage of about 200 ■, and CP is an equivalent human body capacitance of 200 PF, and these values are based on those determined by EIAJ. Further, RP is the resistance value of the polysilicon resistor 2, and R8 is the series parasitic resistance of the diode D.

The voltage transient response in this input protection circuit is easily determined. That is, when 1=0 and voltage vo is applied to input pad 1, the response at point A (input pad position) and point B (internal circuit input position) is expressed by the following equation (1).

Vs(t)-V. . -L/? R8 V, D)=V.　　　　　　e-t/? Ten V.

Rs + Rp τ = CP (Rs + RP) ■D = diode voltage... (1) Here, the thermal energy applied to the polysilicon resistor Rp is P
P(t) and the thermal energy applied to the diode is PD
(t), the following formulas (2) and (3)% Formula% Also, the delay τ of the input signal due to the presence of the input protection circuit. teeth,
It is expressed by the following formula (4).

τ. −Σ(Cjn + CPoL ysi + Cp−
a)・RP・・・・・・(4) Here, C and I are the junction capacitance of the diode, CPoLy3
i is the capacitance of the polysilicon resistor, and C2 and C4 are the capacitances of the input pads.

Next, thermal analysis of polysilicon resistance will be explained.

FIG. 1 (0) shows the structure of a polysilicon resistor 2.

The polysilicon resistor 2 has a width W through a relatively thick (thickness d) Stow film 12 formed on a silicon substrate 11.

It is formed to have a length and a thickness t. This polysilicon resistor 2 easily reaches its melting point and is melted by several μJ of thermal energy. Therefore, thermal analysis of the temperature rise of the polysilicon resistor is required. Let T be the temperature of polysilicon resistor 2,
The basic equation of heat conduction shown by the following equation (5) is shown in Figure 1 (C
) and using Gauss's law, equation (6) is obtained.

=q(r, t) ・・・・・・(5) ρ・C・■2・d k'Ar τ −Cr(Rr+Rs) Mark τ τbe・・・・・・(6) Here, ρ is the density, C is the specific heat, ■ is the volume of the polysilicon resistor, k is the thermal conductivity coefficient of the 5ift film, AP is the area of the polysilicon resistor, and Q is Joule heat.

The equation shown by the above equation (6) is a linear-order differential equation and can be solved analytically, and the solution shown by the following equation (7) is obtained.

T(t)=Toe-"'(1e-""4)・-・-・・
(7)...(8) Equation (7) above shows the time dependence of the temperature of polysilicon resistance under certain conditions. This equation (7) is an exponential curve of two time constants τ〆 and ρ.
ia 1curνe), the first term is a heat radiation term, and the second term is a heat generation term. From this equation (7), the maximum temperature T can be determined.

and the time to reach the maximum temperature are also obtained by setting the differential value to 0, and are given by the following equations (9) and 00)2, respectively.

ts=T, a [4! n(1/Tg+1/rp)-1n
1/rml...(9) T,=Tael-"'τ〆(1-e-"1rp)
,...-GO) The maximum temperature T, must be lower than the recrystallization temperature of the polysilicon resistor, so the maximum value can be considered to be 1000°C. This maximum temperature T1 is
R,,V. external factors such as W, ρ, (sheet resistance), and L.

It is necessary to position and design as a function of shape parameters such as t and d.

Figure 2 shows an example of thermal analysis results for polysilicon resistors. Figure 2 shows W=20. Time and temperature T when changing resistance value R, with crm fixed and L variable
It is a figure showing the relationship with (t). Note that this analysis
O=300V, CP=200PF, Rs=3
The temperature T(t) of the polysilicon resistor reached the maximum temperature -1 and then the heat was dissipated. FIG. 2G) is a diagram showing the relationship between the maximum temperature T and the width W when the resistance value R7 of the polysilicon resistor is changed.

Next, thermal breakdown analysis of protection diodes will be explained.

Thermal analysis of protection diodes is performed using the conventional W method mentioned earlier.
The unsch-Bell model is used to calculate the power density P/A due to the pulse current per second, and the failure temperature T. The relationship is expressed by the following equation (11), where A is the diode area and T is the room temperature.

W7A, -17777th Street (T, o-Tt) t”
”...(11) The power applied to the diode is expressed by the following equation (11) by taking the average from 0 to mτ.

m Rs. ・・・・・・(12) Based on the conventional example, m=5 is empirically determined, which matches the actual measurements well.

In addition, T1 is estimated from the strength of the bonding surface, the uniformity of the Al-5i interface, and the precipitation state of AlSi, and assuming that 1/10 of the active region has reached the melting point, the power density P/
It is common to calculate using 1/10 as A. Figure 3 is a Wunsch-BellO thermal analysis diagram, where the power density P+++ reaches the melting point at 1/10 of the bonding surface.
It shows the relationship between t/A and the time constant τ.

Next, based on the above analysis theories, a design method for an input protection circuit according to the present invention will be explained with reference to the flowchart shown in FIG.

In the first step, the process limiting condition (t
, d, ρ3, etc.) and satisfactory protection characteristics (V@, CP, τj).

Next, in the second step, the input pad capacitance C□6.
Polysilicon resistance capacitance Crotyst, Al wiring capacitance Cat, diode capacitance CI! . -1, the input capacitance ΣC (Cpsm+ Cratysz+ cAL+ C
e5oa*). Next, in the third step, the resistance value R1 of the polysilicon resistor is determined from τ□≧ΣC-R, based on the range of the input delay time τi and the input capacitance ΣC. Formula (8
), (9), using 0@, T, -f(V., W.

R? ), determine the length and width W of the polysilicon resistor.

Next, in the fifth step, the maximum input voltage (2) passing through the polysilicon resistor is set to be below the breakdown voltage of the internal circuit, and the diode parasitic resistance value R8 and the diode voltage v
Determine tl. The diode voltage V becomes a forward voltage in the forward direction and a breakdown voltage in the reverse direction.

Next, in the sixth step, the area A of the diode is determined using equation (11) and the unsch-Bell analysis diagram shown in FIG. Next, in a seventh step, the input delay time τ8 is recalculated based on the final circuit constants obtained in each of the above steps. If the recalculation result matches the initially set target value, each obtained circuit constant is adopted as the design value. If the result of the recalculation of the input delay time τ does not reach the set target value, the process returns to the second step and repeats each step again to obtain an appropriate design value.

Next, FIG. 5 shows a specific configuration example of an input protection circuit created using the input protection circuit design method according to the present invention. v0 is 300v or more, input delay time τ5 is 0.5ns or less, and as a process limiting condition,
The sheet resistance ρ of the polysilicon resistor 2 doped with P-type or N-type impurities is 40Ω/□, and the thickness d of the SiOx film is
800Ωm.

The thickness t of the polysilicon resistor is 500Ωm, and C is 2
It was set to 00PF. The input pad is 100 x 100
um.

When the target is set in this way, in order to satisfy τt<0.5ns, RP-500Ω is determined. Also T,
Equations (8), (9), 0I under the condition of <1000°C
Solving the ID, AP > 11250 μm”, W-
30, cr m, L -375 μm.

On the other hand, regarding the diode constituting the clamp circuit, if the breakdown voltage of the internal circuit is 20V or less, the resistance value of the parasitic resistance is R5-30Ω, and the diode area A is W
From the unsch-Bell model diagram, All〉276μ
Therefore, it can be seen that 16 μm×16 μm is sufficient.

In the above configuration example, the process limit conditions are set as described above, but the process limit conditions include setting the sheet resistance ρ3 of the polysilicon resistor to 40 to 100 Ω/
□, the film thickness t of the polysilicon resistor is 0.35 to 0.5 t
t m, the thickness d of the SI Oz film is 0.8 to 1.0 μm
In this case, the resistance value R1 of the polysilicon resistor is 400Ω to IKΩ, and the width W is 1KΩ.
It is set in the range of 5 to 30 μm.

In addition, for diodes, we have shown settings based on the Wunsch-Bell model with a 10x margin in mind, but with current products it is no longer necessary to consider margins up to 10x, and about half of that is sufficient. ,
Therefore, it is sufficient that the diode area A is 10×10 μm or more.

The design theory according to the present invention, of course, includes several approximations. In particular, polysilicon resistance accompanied by temperature transient phenomena of polysilicon, thermal characteristics of polysilicon, etc. are ignored, and heat dissipation from the polysilicon surface through other resins etc. is also ignored.

Therefore, according to the present invention, it is considered that the design actually has a slightly stronger protective property.

Therefore, in order to confirm this point, we prototyped an actual input protection circuit and determined the parameters. As a result, it has been found that satisfactory protection characteristics can be obtained even at half the design value derived from the design theory of the present invention. In this case, the width W of the polysilicon resistor only needs to be 15 μm or more, and the length is determined by L-15XR, /ρ3 when W=15. The input delay time τ becomes smaller and improved by the smaller area.

FIG. 6 is a diagram showing another specific example of the configuration.

This configuration example uses two pn diodes Dr and DH as protection diodes. Protection diode Dr
, DH's parasitic series resistance R, is set to 30Ω. As a layout precaution, P
The type diode D is surrounded by a P-type GND layer collar,
Alternatively, it is necessary to surround it with a GND electrode pulling layer.

FIG. 7 is a diagram showing still another configuration example, and this configuration example is as follows:
This is a configuration in which the input protection function is desired to be completed even if the input delay time characteristics are degraded, and the second stage protection circuit 21 is placed after the first stage protection circuit.The circuit parameters in this case are as follows. is derived by the design method according to the present invention, and a more reliable input protection circuit can be obtained.

As described above, the protection characteristics τ positive and ■ that should be targeted using the design method according to the present invention. , C7, etc., each circuit constant is derived, so τ1. It is possible to freely set each circuit constant using V, CP, etc.

Therefore, τ5,■ is required for each input bin. By setting , a semiconductor device I can be obtained in which an optimal protection circuit is configured for each bin.

〔Effect of the invention〕

According to the invention, MOS, bipolar, bipolar C
Input protection circuits in semiconductor devices such as MOS devices have the necessary protection characteristics such as protection voltage and input delay time,
Appropriate design can be achieved by considering process limitations such as constituent device characteristics and process parameters, and input protection circuits with the necessary breakdown voltage and delay characteristics can be freely designed for each input bin. It becomes possible.

[Brief explanation of the drawing]

Figure 1^ is a diagram showing a general input protection circuit to which the present invention is applied, Figure 1(C) is a diagram showing its equivalent circuit, and Figure 1(C) is a diagram showing the structure of the polysilicon resistor part. Figure shown, second
Figure ^ is a diagram showing the relationship between time and temperature of the polysilicon resistor when the resistance value R of the polysilicon resistor is changed.
Figure 2 (B) is a diagram showing the relationship between the maximum temperature reached and the width of the polysilicon resistor, and Figure 3 is a diagram showing the relationship between power density and time for 1/1O of the junction surface of the diode to reach the melting point. , FIG. 4 is a flowchart showing a design method for an input protection circuit according to the present invention, FIG. 5 is a diagram showing a specific embodiment of the present invention, and FIG. 6 is a diagram showing another embodiment. FIG. 7 is a diagram showing still another embodiment. Patent applicant: Olympus Optical Industry Co., Ltd. Figure 2 (A) [ns] Figure 6 Figure 7

Claims (1)

[Claims] 1. A method for designing an input protection circuit for a semiconductor device having a thin film resistor having one end connected to an input pad and a clamp circuit comprising a diode connected to the other end of the thin film resistor,
A step of setting protection characteristics such as required protection voltage and input delay time, and process limit conditions for the thin film resistor, and setting the resistance value of the thin film resistor based on the input capacitance and input delay time of the entire input protection circuit. and setting the area, width, and length of the thin film resistor based on the temperature rise characteristics of the thin film resistor obtained by solving a heat conduction equation based on a transient analysis of thermal energy applied to the thin film resistor; The method comprises the steps of setting the parasitic series resistance value and diode voltage of the diode based on the breakdown voltage of the internal circuit to be protected, and setting the diode area based on the power density applied to the diode and the failure temperature. A method for designing an input protection circuit for a semiconductor device. 2. The method of designing an input protection circuit for a semiconductor device according to claim 1, wherein circuit constants of the input protection circuit are individually set for each input pad. 3. In an input protection circuit for a semiconductor device having a thin film resistor connected to one end of an input pad and a clamp circuit consisting of a diode connected to the other end of the thin film resistor, the film thickness is 0.
The thickness of the film formed on the base oxide film of 8 to 1.0 μm is 0.3 μm.
Using a polysilicon resistor doped with a P-type or N-type impurity having a sheet resistance of 5 to 0.5 μm and a sheet resistance of 30 to 100 Ω/□, the resistance value is determined based on the method for designing an input protection circuit for a semiconductor device according to claim 1. 400Ω~1KΩ, width 15~30
An input protection circuit for semiconductor devices equipped with a thin film resistor with an area of 10,000 μm^2 or more. 4. Connect a P-type diode with a parasitic series resistance of 30Ω or less and a diode area of 10 x 10 μm or more between the high potential side of the power supply, and a parasitic series resistance of 30Ω or less between the low potential side of the power supply. It has a resistor and the diode area is 10×10μ
4. The input protection circuit for a semiconductor device according to claim 3, further comprising a clamp circuit connected with an N-type diode having a diameter of m or more to provide impedance symmetry as seen from the input.