JPH0221375A - Picture processor - Google Patents

Abstract

PURPOSE:To obtain the advantages of a fixed wiring communication system and a polling system by holding the communication mode information in an address space controlled by each slave processing unit and controlling the communication between a master processing unit and the slave processing units by a communication system designated by the communication mode information. CONSTITUTION:A master processing unit 4 supplies the communication mode information to the address spacers 7-9 of the slave processing units 1-3 through an address space 6 by means of a communication means. These communication mode information held in the spaces 7-9 are rewritten by the command of the unit 4. Thus the unit 4 changes the communication mode information held in the spaces 7-9 in case the communication system so far used becomes inappropriate due to the change of the working environment of a picture processor. Hereafter the communication is carried out by an appropriate system. Thus it is possible to decrease the number of communication wirings without deteriorating the processing speed of the picture processor.

Description

[Detailed description of the invention]

[Industrial Application Field] The present invention relates to an image processing device, and in particular, a master processing unit that comprehensively manages and adjusts the operations of a plurality of slave processing units that respectively control a paper feed unit, a sorter, etc., and each slave processing unit. Regarding the communication method with the unit. [Prior Art] Conventionally, the functions of this type of image processing apparatus have been managed by a plurality of controllers, and a fixed wiring method has been adopted for communication between the controllers. In the fixed wiring method, the plurality of controllers are connected by dedicated wiring, and each controller uses the dedicated wiring to communicate with the controller with which it communicates. [Problems to be Solved by the Invention] In the conventional image processing device described above, each controller communicates with other controllers using dedicated wiring.
Although the advantage is that dedicated wiring can be used as soon as the need for communication arises, and the waiting time from the generation of a communication request to the sending of information is negligibly short, as the number of controllers increases, , the number of dedicated wires increases in proportion to the number of controllers, and additional circuits for adjusting the intake of information on each dedicated wire also increase, making the circuit of the image processing device complex and large-scale. There was a problem. In order to solve the problems of such conventional image processing devices,
It is also conceivable to apply a competition control method employed in the field of communications, such as the Ho'Nong method, to communication between multiple controllers of an image processing device. However, the multiple controllers installed to realize the functions of image processing devices vary in their communication capacity, and if a competitive control method is simply adopted, communication demands will be placed on the controller with the larger communication capacity/volume. There is a possibility that the waiting time from when the problem occurs until the communication line can be occupied becomes longer, resulting in a disadvantage that the processing speed of the image processing device decreases. Therefore, an object of the present invention is to reduce the number of communication wires without reducing the processing speed of an image processing apparatus. [Means for Solving the Problems] The gist of the present invention is that, as shown in FIG. 1, a plurality of slave processing units 1 each realizing a predetermined function
．． 2. 3 and the above slave processing unit) 1, 2.3
In an image processing apparatus, the image processing apparatus includes a master processing unit 4 that manages the slave processing unit L2+3, and a communication means 5 that connects the slave processing unit L2+3 and the master processing unit 4,
The master processing unit manages an address space 6 that holds communication mode information indicating whether the fixed wiring communication method or the polling method is used for communication with each of the slave processing units. Does each processing unit manage an address space? , 8
．． The communication mode information is held in a rewritable manner in accordance with commands from the master processing unit 4, and the master processing unit 4 and each of the slave processing units 1, 2 and 3 are specified by the communication mode information. It is to communicate in a specified manner. [Operation of the Invention] In the image processing apparatus having the above configuration, first, the master processing unit 4 transmits communication mode information from the address space 6 to each slave processing unit 1. 2.
3 address space? , 8. 9 respectively. When supplying this communication mode information, the address spaces of all slave processing units 1, 2 and 3 must be maintained. , 8
．． Communication mode information specifying the polling method can be supplied to the address space of some slave units, and communication mode information specifying the polling method is supplied to the address space of some slave units, and the address space of the remaining slave processing units is Communication mode information specifying a fixed wiring communication method can also be supplied to the space. When the designation of the communication mode information is completed in this manner, the master processing unit 4 and the slave processing units 1, 2, and 3 will thereafter communicate using the method specified by the communication mode information. As mentioned above, the address space of each slave processing unit) 1, 2.3? ,
8. The communication mode information held in the image processing unit 9 can be rewritten based on commands from the master processing unit 40, so if the previously adopted communication method becomes inappropriate as a result of changing the operating environment of the image processing device, the master processing unit 4 changes the communication mode information held in the address space of the slave processing unit, and can thereafter communicate using an appropriate communication method. [Effects of the Invention] As described above, according to the present invention, communication mode information is held in the address space under the control of each slave processing unit, and master processing is performed using the communication method specified by the communication mode information. Since the communication between the unit and the slave processing units is controlled, communication can be performed using the communication method that is most suitable for realizing the functions assigned to each slave processing unit. It is possible to achieve the effect of realizing a communication method that has both the advantages of the other methods. [Embodiment] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. One embodiment is an example in which the present invention is applied to a laser printer,
The present invention is applicable not only to laser printers but also to copying machines, especially digital copiers. In the following explanation,
First, the hardware configuration of one embodiment will be explained. FIG. 2 is a block diagram showing the macro system configuration of one embodiment, in which 21 is a printer controller (hereinafter referred to as MSC) as a master processing unit;
．． 24, 25, and 26 are slave processing units such as an operation unit controller, a printer engine controller, a paper feed unit controller, a sorter controller, and an image processing unit controller (these controllers are hereinafter referred to as SSC), respectively. It shows. Above 5
Among SC22 to SC26, 5SC22, 23, and 26 are controllers essential for the system configuration of the laser printer.
5SCs 24 and 25 are controllers that are added when a paper feeding mechanism and a sorter are added as options. The MSC 21 is connected to the operation unit 5SC 22, the printer engine 5SC 23, the paper feed unit 5SC 24, the sorter 5SC 25, and the image processing unit 5SC 26 via the macro system interface 27 as a communication means. , the user scans various operation switches to give instructions to the laser printer and detects the operation. 5SC23 for printer engine
(indicates multiple functional units such as a drive unit for a drum mechanism, an optical unit, etc. as a lower system) UNIT1 to UNI
The printer engine 5SC23 manages the operation of the T3, and therefore the printer engine 5SC23 is a unit that controls these multiple functional units.
It is connected to I to UNIT3 via a subsystem interface 29. Each functional unit) UNITI~UN
The IT3 has a mechanical configuration and a control unit under the control of the printer engine 5SC23, but the details will be omitted. Furthermore, the paper feed unit 5SC24, the sorter 5SC25, and the image processing section 5SC26 each have a paper feed mechanism, a sorter mechanism, and a display unit, but detailed explanations thereof will be omitted. Although not shown in detail in the figure, the laser printer of this embodiment constitutes a part of the upper user system, and the MSC
The operations of 21 are under the control of a supervisor 28 within the user system. Figure 3 shows each SSC.
It is a block diagram showing the logical address space of the memory accessed by the microprocessor 31 in the SC.
It is provided for each of the C25 and the 5SC26 for the image processing section. To be more specific, the logical address space managed by the microprocessor 31 includes a command register 32 (
CMD-REG) and status register (GSTAT
-REG), and a local mode map (LM-MAP) 34 divided into a plurality of (two in this embodiment) regions,
Global mode map (GM-MAP) 35, string area 36, and report register (REPO-R)
EG) 37 are defined, and these registers 3
2 to 37 temporarily hold data information, etc., which will be described in detail below. Note that when the microprocessor 31 accesses a specific address called a string window in the local mode map 34 and the global mode map 35, the microprocessor 31 accesses the local mode map 34 and the global mode map 35.
4 or the specific address of the global mode map 35, but the string area 36 corresponding to the specific address is accessed. Next, information etc. temporarily held in each of the registers 32 to 35 will be explained. From MSC21 to each 5SC22~
The processing commands and communication commands supplied to the 5SCs 26 and 26 are temporarily held in the command registers 32 of each of the 5SCs 22 to 26, and when the microprocessor 31 of each SSC becomes ready for command execution, the processing commands held in the command registers 32 are Alternatively, communication commands are supplied to the microprocessor 31. Each of the 5SCs 22 to 26 can at least independently realize a certain function, and has a standard mode of execution. In the standard mode, the MSC21 initialization subroutine program 5BI (see Figure 17, pg.
) (7) At execution time! The first 1tJI is set in ZMSC21. Each of the 5SCs 22 to 26 is switched to the standard mode by being supplied with a processing command specifying the standard mode from the MSC 21, and realizes a predetermined function specified in the standard mode. Further, each of the 5SCs 22 to 26 can realize functions other than those specified in the standard mode, and is provided with two mode maps 34 and 35 in order to realize the functions other than the standard mode. The global mode map 35 holds mode information common to all 5 SCs 22 to 26, whereas the local mode map 34 holds mode information unique to each SSC, and these are held in the global mode map 35. Functions other than those specified in the standard mode can be realized based on the mode information held in the local mode map 34 and the mode information held in the local mode map 34. The local mode map 34 holds mode information as described above, but
In addition, it holds status information of each SSC. As mentioned above, in this embodiment, the local mode map 34 is divided into two areas, so if each SSC manages multiple functional units, each mode information and status information is divided into two areas. will be managed accordingly. Note that these mode maps 34 and 35 are set to standard values at the time of initialization. As described above, the local mode map 34 holds various mode information and status information, and these status information etc. are summarized and held in the status register 33. Therefore, in order for the MSC21 to control the entire operation of the laser printer, each of the 5SC22-2
6, it is necessary to first access the summarized information in the status register 33, and then access the status information held in the local mode map 34 based on the summarized information. Determine whether or not there is. Therefore, the amount of information that the MSC 21 should access can be reduced, and processing speed can be increased. The report register 37 is a register that holds sequence report information formed in each 5SC22 to 26, and the sequence report information is stored in any 5SC2.
This is information indicating that an event that should be notified to the MSC has occurred in items 2 to 26. Figure 4 is a block diagram showing the relationship between the functional blocks of the MSC21 and the logical address space managed by the MSC21.The logical address space includes 5SC22 to 26. A command register 41 having a plurality of areas respectively dedicated to the 5SCs, a status register 42 and a report register 43 having a plurality of areas respectively dedicated to the 5SCs 22 to 26, and a global mode map 44 common to all 5SCs 22 to 26. And, as expected, each 5SC22-26
A local mode map 45 is defined having a plurality of areas dedicated to the local mode map 45. The command register 41 is provided to send processing commands and communication commands from the MSC 21 to the communication target 5SCs 22 to 26, and the above commands sent from the command register 41 are stored in the command registers 32 of each 5sC 22 to 26. It will be held. On the other hand, since the global mode map 44 holds mode information common to all 5SCs 22 to 26, the mode information sent from the global mode map 44 is common to the global mode map 35 of each 5SC 22 to 26. and will be retained. The report register 43 is a register that holds sequence report information supplied from each of the 5SCs 22 to 26, and the sequence report information is stored in any one of the 5SCs as described above.
This is information indicating that an event that should be notified to the MSC has occurred in the SCs 22 to 26. The a-cal mode map 45 set in the MSC 21 is provided to supply mode information to each 5SC 22 to 26 and to receive notification of status information from each 5SC 22 to 26.
The status information supplied from the local mode map 34 of ~26 is sent to the corresponding area in the local mode map 45, and the mode information sent from the corresponding area to each of the 5SCs 22 to 26 is sent to each of the 5SCs 22 to 26. The local mode map 34 of the local mode map 34 of FIG. In the figure, 46 is a reception register connected to the macro system interface 27, and sequence report information, status information, etc. sent from each of the 5SCs 22 to 26 via the macro system interface 27 are temporarily held in this reception register 41. It is then transferred to the receive buffer 47 and then written to the report register 43 or local mode map 45. On the other hand, commands or mode information held in the command register 41, global mode map 44, or local mode map 45 are held in the -H transmission buffer 48, then transferred to the transmission register 49, and then transferred to the macro system interface. Each 5SC22-26 via 27
, or to the corresponding registers of all five SCs 22-26. As mentioned above, the information held in the local mode map 45 includes what should be sent to each 5SC 22 to 26 and what should be sent to each 5SC 22 to 26.
Since the supplies from SC22 to SC26 are mixed,
Each piece of information held in the local mode map 45 defines its 14th and 15th bits as a reception notification flag RR and a transmission request flag TR. That is, in the case of information supplied from each 5SC22-26, the MS
C21 sets the 14th bit of the received information to "l" and then holds it in local mode map 45. The information for which the reception notification flag RR has been set in this way is reset to "0" again after undergoing processing that will be described in detail later. On the other hand, a transmission request flag TR is set in advance for information to be sent to each 5SC 22 to 26, and information for which the transmission request flag TR is set to "1" is sent to the target 5SC 22 to 26. . The information sent to the 5SCs 22 to 26 for this purpose is re-transmitted after sending it.
0”. All areas of the transmission request flag TR, reception notification flag RR, MSC, and SSC are also reset to "0". A polling control block 50 for communicating with each of the 5SCs 22 to 26 is implemented in the MSC 21.
21 is controlled by each 5SC by this polling control block 50.
A communication request is sent to the 5SCs 22 to 26, and the corresponding 5SCs 22 to 26 respond to the communication request to communicate information. FIG. 5 is a block diagram showing the communication network implemented in the laser printer, and includes an MSC 21 and each 5SC 22 to 26.
(Only the 5SC22 for the operation section, the 5SC23 for the printer engine, and the 5SC26 for the image processing section are shown in FIG. 5) are commonly connected by two serial communication lines SI and SO that realize the macro system interface 27. ing. The hardware configuration of the controllers (MSC and 5SC) that make up the network shown in Figure 5 is shown in Figure 6.
As shown in the figure. The MSC 21 and each of the 5SCs 22 to 26 include a microprocessor 61, a read-only memory (ROM) 62 that permanently stores a control program for controlling the operation of the microprocessor 61, and a microprocessor 6.
1, and a reception register (RX-R) connected to the serial communication line S1.
EG) 64, a transmission register (TX-REG) 65 connected to the serial communication line SO, and an interrupt timer 66 for providing timer interrupt timing to the microprocessor 61. Therefore, in the case of the MSC 21, upon receiving a command from the supervisor 28 of the above-mentioned upper user system, the microprocessor 61 executes the control program held in the ROM 62 and creates the logical address space set in the RAM 63. The communication command and processing command held in the logical address space can be output to each of the 5SCs 22 to 26 from the transmission register 65 to the serial communication line SO. On the other hand, each 5S
C22 to C26 temporarily hold the supplied ritual command and processing command in the receiving register 64, and then execute the control program to realize the function instructed by the command, and if status information etc. are requested, they are sent to the RA.
Reads the status information etc. held in the logical address space provided by M63 and sends it to the transmission register 65.
to the serial communication line Sl. In this way,
Status information etc. sent to serial communication line SI is M.
It is temporarily held in the reception register 64 of the SC21, and then
It is written to RAM63. In this way, the status information and the like written in the RAM 63 are read out and processed by the microprocessor 61. As mentioned above, in this example, there are MSC21 and 5SC22 each.
~26 basically refers to a communication request or designation (set) sent from the MSC21 as a control station.
Communication is carried out by a polling method in which each of the 5SCs 22 to 26 responds (answers) to the MSC 2. As shown in FIG.
Frame 71.73.74.76.77.79 can be sent from 1 to each 5SC22-26 at any timing, but the response from each 5SC22-26 to MSC21 is frame 72 sent from a different 5SC22-26. .7
This is done on a time-sharing basis to avoid 5.78 collisions. For example, as shown in FIG.
1, the operating unit 5SC 22 identifies the communication request for itself using the identification code included in the frame 71, and sends a frame 72 to the MSC 21 to transmit the requested information. On the other hand, when the MSC 21 detects the end of transmission from the 5SC 22 for the operation section, the MSC 21
SC1, for example, sends a communication request to 5SC23 for printer engine in frame 74, and
When the C23 responds with frame 75, it detects the end and sends a communication request in frame 77 to the image processing 5SC26.
Send to. The occurrence of such a communication request occurs at each 5SC22~
The communication request for 26 is conditional on the completion of the response to the preceding communication request and the elapse of the polling timing, and the fact that the polling timing has elapsed is because the increase in communication frequency means that the processing execution based on commands, etc. at each SSC will be delayed. This is to prevent the speed from decreasing. Note that the MSC 21 can transmit frames 73.76 to each of the 5SCs 22 to 26 regardless of communication from each of the 5SCs 22 to 26. 2nd se: shi

[Configuration As mentioned above, there is a port from MSC21 to each 5SC22-26.
Information is communicated using a ring method, but such communication
Sometimes information is transmitted in frames of variable length.
Ru. Each frame consists of a fixed length bit string called a character.
It consists of one or more pieces arranged in series, and the following explanation applies.
In Japanese, the first character of each frame is an ID character.
, the character following the ID character is a data character.
It is called ta. Therefore, it is composed of multiple characters.
The frame to be displayed is an ID character as shown in Figure 8.
character and a variable number of data following the ID character.
It will be composed of characters. Each character is
Indicates the beginning of the character, as shown in Figure 9.
The synchronization start bit STA and the synchronization start bit
The 8-bit data bO to b7 following the start STA and the corresponding
The parity bit PA following the data bit and the character
It consists of a synchronization stop beep (STO) indicating the end of the
ing. Therefore, the synchronization start bit STA, parity bit
Data excluding bit PA and synchronization stop bit STO
The information represented by tabbits bO to b7 is an ID character.
This will differ depending on the data character. That is, I
For D characters, b)b7 is set to "1".
This bit b7 set to “1” causes it to become “0”.
Identified from the data characters set. bit b
6 indicates whether a response of a predetermined frame is requested from the destination.
It is used as response request bit A to indicate whether the
) b2 to b5 are 4-bit identifiers that specify the destination of the information.
Functions as a code (SO to S3). remaining 2 bits
bl and bo are any area in the logical address space of the destination
A 2-bit area code (U
l, U2). Therefore, the ID character with the above bit configuration is the response
Request bit, identification code (So~S3) and area code
The values of the code (Ul, U2) are combined to represent various information.
combinations of these and subsequent data characters
Various frames can be constructed with first
, frames used in this embodiment will be explained. Scene command (Sent from MSC21) Requests the start of operation of each 5SC22 to 26 from MSC21
This is the frame that is output to the laser printer.
Used to control overall operation. MSC21?
Sequence commands supplied to each 5SC22-26
is held in the command register. these sequences
In this embodiment, the commands constitute the above processing commands. On the i-Nie site (Sent from MSC21) From MSC21 to all 5SC22-26, their operation modes are sent.
To change the code all at once or each 5SC22~26
The frame output to change the individual operation mode
The global mode map of 5SC22-26
mode information held in the local mode information, or local mode information.
Modify the mode information held in the tup. m-1 engineering (MSC21 transmission) MSC21 is the status register of each 5SC22 to 26
This is a frame sent when requesting information within. Na
In addition, in polling mode, each 5SC22 to 26 transmitter
Used for timing notification. In this example, the above communication
[52 that functions as a mando] Shishi intrusion top (MSC21 or each 5SC22-26 transmission) each 5SC
22 to 26 global mode maps and local modes
The frame output when requesting mode information in a map.
It is a system. The status of each 5SC22 to 26 and the above mode setting
Used to check whether the cut was correct or not.
I can stay. Gojigami 1noe (Each 5SC 22-26 transmission) From each 5SC 22-26 in response to the above mode request
This is the frame output as a response. For this response, the local module of each 5SC22-26
The mode information in the mode map is sent. Entering 52 Esu Enonami (Each 5SC 22-26 transmission) The above status list is sent from MSC21 to each 5SC 22-26.
When a quest or sequence command is supplied,
Frame output as a response from each 5SC22 to 26
It is mu. Therefore, in the status answer, each SSC
Information and commands held in the status register of
The command written in the register is sent. Sequence review (Each 5SC22-26 transmission) Should be notified to MSC21 under the control of each 5SC22-26
When an event occurs, a sequence record representing the occurrence of the event is
This is a frame that sends port information. The above sequence
Used in conjunction with commands to control laser printers
. respond. However, MSC21 outputs mode set.
In this case, each 5SC22-26 does not respond in particular,
On the other hand, each 5SC22-26 sends out a sequence report.
However, the MSC 21 does not respond. The responses that are combined to form each of the above frames
Request bit value, identification code value, and area code
The values are shown in the frame identification table below. (Left below) The frame explained above is for controlling the laser printer.
used in conjunction with each other. Indicates the relationship between the above frames.
Then, when N5C21 outputs a sequence command,
Each of the 5SCs 22-26 responds with a status of 4. Also, when MSC21 sends a status request,
, each 5SC22-26 responds with a status answer.
do. Similarly, MSC21 sends information in mode request.
If requested, each 5SC22-26 will be available on mode answer.
:Jdv Tanji! Next, the ID characters that constitute each frame mentioned above and
Detailing the bit structure with the data characters that follow it
do. MSC Shin frame Figure 11 (a) shows the keys and letters that make up the sequence command.
FIG. 2 is a format diagram showing the bit structure of a character. C
The Kens command consists of 3 characters, ID
The characters are as shown in the table above. ID character
(b
7) are each set to "0", and the data character
Bit b6 of vector 1 is read-in confirmation beep) (Q)
This capture confirmation bit (Q) is
It is used to synchronize the commands, and is used in combination with status answer.
In total, each 5SC22-26 is supplied from MSC21.
To check whether the command was successfully imported,
used for Bit b5 of data character l and
and data character 2 p)b6 will be used in future expansion.
Bits (x) used, in this example, each 5SC
22-26 ignore bit (X). Therefore, de
For data character 1, bits 0 (L, SB) to bits
4 is assigned the command code (Co-C4).
, in data character 2, bits 0 to 6 (PO to
P6) is assigned to the parameter. Figure 11(b) shows the cache that constitutes the status request.
FIG. 2 is a format diagram showing the bit structure of a character. Ste
The data request consists only of ID characters.
Ru. The bit structure of the ID character is described above, so for details
Omitted. Figure 11(C) shows the configuration of the word type mode set.
FIG. 2 is a format diagram showing the bit structure of a character
. The word type mode set consists of 4 characters.
and the data character l following the ID character.
Bits 0 to G are data keys to represent mode information.
Set across bits 0 to 6 of character 2.3.
of the memory to which the setting data D (Do to DD) should be written.
Map address M (MO~M) indicating the logical address space
6) Assigned. For example, if the identification code S is "0"
”, the setting data D is all 5SC22
~26 are written into the global mode map 35. On the other hand, if the identification code S is set to a value other than "0",
If so, the 5SC22 specified by the identification code S
Write setting data only to ~26. In this case, Eli
Depending on the value of Accord U, the writing destination is local mortematsu.
map 34 or global mode map 35. In addition, the map address M must be set to "r7FH".
As will be explained later, M=r7FH] is the final
This is because the end code indicates the end of the frame. Figure 11(d) shows how to configure a string type mode set.
A format diagram showing the bit structure of the characters that
be. In the word type mode set mentioned above, the l address is
One configuration data D is supplied for each
In a mode set of type
Word setting data D can be written. Besides that
data character l specifying the map address M.
After , indicates the number of words L (LO to L6) of the setting data.
Data character 2 follows. Therefore, the setting data D is
represented by data character 3 to data character n
It turns out. Furthermore, for the same reason as mentioned above, the data cache
In vector 1, the map address is set to r7FHJ.
It won't happen. Figure 11(e) shows the characters that make up the mode request.
FIG. 3 is a format diagram showing the bit configuration of data. moderi
The quest consists of two characters, following the ID character.
Data character bit bO (LSB) ~ b)
6 indicates the map address M that is requested to be read.
ing. Also in case of mode request, map address
M is never set to 7FHJ. SSC 9 books REM Figure 11 (f) shows the characters that make up the status answer.
This is a format diagram showing the bit configuration of the stator.
The answer is an ID character followed by two data keys.
It consists of a total of 3 gear characters. day
Pip) b6 of the data character 1 is the import confirmation pin mentioned above.
) Q, and the capture confirmation bit Q is set to “1”.
commands supplied from the MSC21 remain unchanged.
has not been confirmed and new commands must not be issued.
It shows that there is no. bit b of data character 1
O(LSB) to bit b5 are stored in the command register 32.
Assigned to the code (CO-C4) representing the held command.
This is the code supplied from MSC21.
Was the command correctly captured by the destination 5SC22-26?
This is for the MSC 21 to check whether or not it is. Take the above
The input confirmation bit Q is reset to “0” after executing the command.
The frame with Q=0 is output from 5SC22 to 26.
command code C is cleared after the Bit b6 of data character 2 is the frame from SSC.
frame continuation bit N indicating that frame transmission continues;
In MSC21, each 5SC22 to 26
Used to detect the break between frames sent from
be done. Bit bo of data character 2 (LSB)
~Bit b5 is held in status register 33
It is assigned to a code that represents information. Each of the above 5S
The information held in C22 to C26 is one frame.
If the message cannot be sent in the system, operate the continuation bit N above.
The data is transmitted across multiple frames. Figure 11 (g) shows the characters that make up the sequence report.
This is a format diagram showing the bit configuration of the vector.
The performance report consists of three characters. data
Bit bO (LSB) to bit b4 of character 1 are
Report code R (
RO to R4), and the data character
Bits bO to bits 5 of 2 are parameters P (PO to P5
) is assigned to. Figure 11(h) shows the configuration of a word type mode answer.
is a format diagram showing the bit structure of a character.
, in the word type mode answer, the ID character
Later, the data character assigned to map address M
assigned to configuration data D representing the vector and mode information.
A combination of two data characters can be repeated up to 4 times.
be done. Each setting data D is 1 word = 14 bits (Do to DD)
The data assigned to these setting data D is
assigned to the exit code after the specified data character.
The data character n appears and ends. As mentioned above
The exit code has a value of r7FHJ and therefore
, map address M and setting data are r7FHJ values.
I never take it. Figure 11(i) shows the construction of a string type mode answer.
A format diagram showing the bit structure of the characters that
Yes, and corresponds to the mode set of the string type above.
. For string type mode answers, the ID character
Data character 1 following the data is assigned to the map address.
The data character 2 that follows is set
Represents data length. Data character 3 ~ Data character
Tan n-1 is assigned to the 1st word to the Lth word.
Each word consists of 14 bits (Do-DD).
There is. The string type mode answer also has an exit code (
7FH) and ends with a data character n representing However,
Therefore, the map address M and setting data have the value "7FH".
"I can't get it. As mentioned above, MSC21 and each 5SC22 to 26 are
Information is exchanged in frame units, and 5SC22-2
6 sends frames only when requested by MSC21.
belief is possible. When sending from 5SC22 to 26
should not send multiple frames if there is a large amount of information to be sent.
When transmitting such multiple frames, MSC2
1 is the end of the call from 5SC22-26 (SSC area)
If the disconnection detection) is not detected, a communication request is sent to another SSC.
I can't put it out. For such SSC break detection
Multiple frames sent from 5SC22-26 to provide
The frame contains information indicating the continuation of the frame.
Irregular frames containing information representing the continuation of such frames
The format is summarized in FIG. In addition, Figure 12
(1) is a status update that does not continue with a sequence report.
The sequence shown in Figure 12 (2)
Shown for comparison with the status answers that follow in the report.
It is. As is clear from Figure 12 (2) to (4)
, when frames are continued, frames other than the last frame are
The frame continuation bit N is set to “1” and the final
The frame bit is set to ``0'' for SSC break detection.
” or with exit code r7FH. Sl: As mentioned above, this laser printer is under the control of MSC21.
Machines to which multiple 5SC22 to 26 are respectively assigned
MSC21 has multiple 5SC22
Each 5SC22-26 to organically combine ~26
It is necessary to understand the status of Such SSC
The status of each detailed step is shown in the local mode map 34.
It is maintained as status information. However, MSC2
As the number of SSCs under the control of 1 increases, these details
When I try to read out all detailed status, MSC21's
The load increases and processing efficiency cannot be improved.
stomach. Therefore, each 5SC22 to 26 in this laser printer
are held within each local mode map 34.
Summary status information by summarizing detailed status information
and send the summary status information to each 5SC22-26.
It is held in the status register 33 in the. Assigned to each bit of status register 33
As shown in Figure 13, the information on G5 is
, summary status information indicating that the SSC is initializing is displayed.
Since then, the ``NOT READYJ bit'' has been
It is called ``to''. rNOTREADYJ bit set
The SSC that has the sequence command and mote set
reception is possible, and the rNOT READYJ bit is
It will be reset after the initial period is completed. Next, bit G4 is
r represents the execution status of SSC due to commands and mode changes
It is assigned to the B U S YJ bit, and the above implementation
Reset at the end of the row state. Beep) G3 and GO
are unused bits and are assigned to certain summary status information.
Not assigned. Bit G2 is an unrecoverable trouble
rFATAL indicates that processing was interrupted due to the occurrence of a file.
J bit, rFATALJ bit
The port cannot be reset even with MSC21, and the service
The process cannot be resumed unless it is dealt with by Suman.
Can not. Bit G1 indicates that a recoverable trouble has occurred.
rERRORJ bit indicating that processing was interrupted due to
and the rERRoR” bit is set.
The user should take predetermined actions even if the
It is possible to restart the process. rERRORJ bit
will be notified by SSC when the user performs the above predetermined action.
can be reset. As explained above, the above summary status information is local
Detailed status information held in the mode map 34
It is formed by summarizing the information. These detailed status information
A part of the local mode map 34 held in S
It is called the SC standard mode map.
Detailed steps assigned to the logical address space of the domain map.
Figure 14 shows the status information. address r05H”,
"06H", "08H", r09H" are respectively "E
RRORJ bit, “FATAL” bit, “BU
SYJ bit, rNOT READYJ bit
Status registers 3 and 3 are respectively provided.
Detailed status information about the summary status information maintained in 3.
Retains status information. These can be used as error registers,
Ital register, busy register, not register
It is called a register. Note that the address rOcHJ is the report model detailed below.
Used for reference to switch between mode and polling mode.
assigned to report mode information. Next, we will explain report mode and polling mode.
I will clarify. For polling mode, see Figures 5 to 7.
As explained above, N5C21 has multiple 5SC22
~26 is connected with the common signal line 5O9SI, and the system
Although the stem p wiring is simplified, MSC21 and 5SC
Communication with 22-26 shall be in the form of a response to a communication request.
The disadvantage is that the communication processing speed is low. child
For this, MSC21 and 5SC22 to 26 are individually
In the connection method (hereinafter referred to as the report method), the communication network
Although it becomes more complicated, processing speed can be improved.
There is an advantage. Therefore, the laser printer according to this example is
The printer's SSC has a report mode in the standard mode map.
Allows you to retain information and report within the standard mode map.
If the default mode information is written, the relevant SSC
Communicate with SC in report mode, and conversely communicate report mode information.
If no information has been written, the above-mentioned policy
This means that communication will be done using a communication method. In this way, MSC and
The communication method with the SSC can be selected for each SSC, so for example
For example, as shown in FIG. 15, 5SC1501-15
03 is M via the buffer art multiplexer 1504
Connect to SC1505, connect SSC1501 to 1503 and M
Communicate with SC1505 using polling method, and use SSCI
506.1507 and MSCI 505 are reporting methods
It can also be configured to communicate with in this way,
By mixing reporting and polling methods,
Even if the number of SSCs connected to the MSC increases, the communication processing
It is possible to prevent the processing time from increasing. In particular, laser
Among the SSCs in the printer, those that require high-speed communication processing
If there is no data, set it to polling method and require high-speed communication.
If you use a report method for what you want to do, you can easily
A system with high communication efficiency can be created by making the communication network slightly more complicated.
It can be made into a Furthermore, as shown in Figure 15,
Even when mixing polling and reporting methods
, during initialization performed after power-on, all 5SCs
1501, 1502, 1503, 1506, 1507
Frame collisions are avoided by communicating using the polling method.
It is possible to prevent bumps. (The following is a blank space) - and par - The following is a description of the software executed by the laser printer according to one embodiment.
software, but do not explain the software first.
Stand and explain the main parameters and flags
. The system executes the job, such as JABACT niblint operation.
This is a flag that indicates whether or not the process is in progress, and is set to "0".
If it is, the entire laser printer system is on standby.
. In contrast, if it is set to "1"
If any SSc under the management of MSC21
Instructs units under its control to perform an action, but the action is incomplete.
It shows that it has been completed. 5YSWAIT: The entire laser printer system is in its initial stage.
This is a flag indicating whether initialization is being executed or not.
It is set to “1” by
will be reset. LOOPF: MSC executes job in main routine.
Timing to execute processing (main loop timing)
This is a flag indicating whether or not the limit has been reached, and job processing is executed.
When the desired timing is reached, "Lr" is set and this
If the flag is reset to "0", job processing will not be executed.
Not performed. MS IFS: Multiple SSs under the management of MSC21
is a parameter representing the initial stage for C,
One of the values from "0" to "5" as initialization progresses.
is set to UN I TF: Folder indicating the connection status of the external paper feed unit.
lag, and an external paper feed unit (in the embodiment shown in Figure 2, the feed
) is under the control of the paper unit controller 24.
is detected as connected as part of the printer.
When connected, it is set to “1”, and when it is not connected, it is reset to “0”.
will be played. UNI TS: Sorter (In the embodiment shown in Fig. 2, the sorter code is
controller 25) is one of the laser printers.
Set to “1” when it is detected that the
It is reset to “0” when not connected. ENBF: External paper feed unit selection permission flag,
Can be selected when set to “l”, reset to “0”
If it is marked, it means that it cannot be selected. ENBS: Mode specification permission flag for sorter.
When set to ``1'', specified permission is set to ``θ''.
If it is reset, it indicates that the specification is not permitted. PANS: Status answer reception flag;
When a data answer is received, it is set to "1". PCYCLE: Indicates the number of times communication requests were sent to all SSCs.
This is management data. PEND: Flag indicating SSC break detection;
Check that N (frame continuation beep) is set to “0”.
or when the exit code "7FHI" is detected.
It is set to rlJ when PT IMrNG: Polling timing (t in Figure 7)
This is a flag indicating the occurrence of pl to tp4). CCNT: Counts the number of characters when receiving a frame.
counter value, and the received character is the value of that frame.
Indicates the number of the character. IDS: Identification within the ID character of a received frame
This data corresponds to code S and is the subject of communication.
This is a code that identifies the SSC that is present. IDU: An error in the ID character of a received frame.
This data corresponds to rear code U and is not subject to communication.
The logical address space to be accessed in the SSC that is
show. FLEN: Supplied from the SSC that is the target of communication.
This is count data that indicates the number of characters in the frame.
and steps are taken each time the receive buffer receives a new character.
proceed. LENTBL: Separately maintain FLEN for all SSCs
This is the management data that
will be updated once the configuration is complete. pssc: Management data that specifies the SSC to poll.
It is ta. T RML: Characters that make up the frame being transmitted
is a flag indicating whether or not is in the transmission register 49,
The character is transferred from the transmit buffer 48 to the transmit register 49.
When it is transferred, it is set to "1" and the transmission register 49
All bits are sent to the macro system interface 27.
When issued, it is reset to "0". LMTF: Number of information that can be sent for one transmission request
This is management data that indicates the maximum value of the limit counter.
will be played. 5TRNG: The received mode answer is string type.
A flag indicating that Figure 16 shows the overall structure of the program executed by the MSC21.
MSC21 is the main
In addition to routine programs, there are three types of interrupt routine programs.
Execute the program. First, the main routine program
To explain the outline, the power switch of the laser printer is
is turned on and a power switch-on event (EVI) occurs.
Then, the microprocessor 61 (hereinafter referred to as
When explaining the MSC program, it is simply a micro program.
processor 61) is the MSC initialization subroutine program.
Run RAM (SBI). Next, the microprocessor
The server 61 connects the macro system interface 27 and the interface.
to detect the connection status with the SSC that can be connected to the interface.
MSIF processing subroutine program (including processing for
SBII) and the judgment step to determine its completion (P 1
02) Iteratively executes the loop consisting of
Wait until P102 becomes YES. MSIF processing sub
In the routine program 5BII, the macro system interface
Interrupt handling and main processing that will be mentioned later regarding phase 27
synchronized with the macro system as described above.
Connection regarding SSC that can be connected to system interface 27
The presence or absence of is checked. MS IF processing subroutine
When the program 5BII is completed, step P102
Since the judgment result is YES, the microprocessor 6
1 checks the flag LOOPF and is in the main routine
When to execute job processing (hereinafter referred to as main run)
Determine whether or not the loop timing (referred to as loop timing) has arrived (
P 103). °If the main loop timing is not reached
If so, the judgment result in step P103 will be no.
The microprocessor 61 is a subroutine program.
Return to 5BII and MSIF processing subroutine program
will be executed again, and eventually the main loop timing will be reached.
Since the judgment result in step P103 is yes,
The microprocessor 61 is a job processing subroutine program.
Execute the ram (SB12). Job processing subroutine
At the end of the program (SB12), the microprocessor
The processor 61 returns to the subroutine program 5BII and performs the following steps.
After that, it consists of subroutine programs 5BII to 5B12.
Executes the loop iteratively. Consists of subroutine programs 5BII to 5B12
The interrupt timer 66 of the MSC 21 is
interrupts the microprocessor 61, the timer
An interrupt event (EV2) occurs and the microcontroller
Processor 61 is the main loop timer processing subroutine
Program (5B21) and polling control timer processing
The subroutine program (SB22) is executed sequentially.
, the subroutine in the main routine program after execution is completed.
Return to the loop consisting of Chin programs 5BII to 5B12.
Turn. From the above subroutine programs 5BII to 5BI2.
During the execution of the loop that
frame is sent to the MSC21, and the reception register of the MSC21
The first character (I
D character) is latched, a receive interrupt event occurs.
(EV3), the microprocessor 61 receives
Execute the buffer processing subroutine program 5B31.
The received frame is temporarily stored in the reception buffer 47.
After holding the subroutine program 5B11-5B12
Return to the loop consisting of. On the other hand, the data stored in the transmission register 49 of the MSC 21
The first character is sent from transmit register 49 onto MSCIF.
A transmission interrupt event (EV4) is generated when
The transmission buffer processing routine 41 is executed and the transmission buffer is
The data held in the file 48 is sequentially transferred to the macro system.
After sending to the interface 27, the subroutine program
The program returns to the loop consisting of grams 5Bll to 5B12. As mentioned above, the microprocessor 61 of the MSC21
After executing the MSC initialization subroutine SBI, the subroutine
Repeat the loop consisting of program 5BII to 5B12.
While executing, timer interrupt event) EV2, reception interrupt
Interrupt event) EV3 and transmission interrupt event) EV
4 will be dealt with. Figure 17 shows the main routine program executed on the MSC21.
FIG.
As mentioned above, the main routine program
caused by EVI. Power on event E
■By the occurrence of 1, the microprocessor 61 of MSC21
Step P170 executes initialization of its own internal circuit.
1), then global mode map 4 of MSC21
Initialize standard mode to 4 (step P1702)
. After initial setting of global mode map 44, micro
The processor 61 executes the MSC2 in step P1703.
1 local mode map 45, command register 41
, status register 42, string area and register
Clear port register 43'. Next, the microprocessor 61 reads the status of the MSC 21.
“NOT READ” is set in bit G5 of the task register 42.
Set the SYJ bit. This “NOT READ”
YJ bit is SSC and macro system interface
It is used to detect the presence or absence of connection with 27. Also, MSC
Regarding 21, the initialization subroutine program SBI is executed.
It will be displayed that it is in progress. Next, MSC21's My
The processor 61 sets the 5YSWAIT flag to "1".
The entire system of the laser printer is being initialized after being configured.
, and also initialize rlJ in pssc.
(Step P1705). Therefore, MSC21 is
First, a communication request will be sent to SSC1. Subsequently, the microprocessor 61 executes step P1706.
Among the flags etc. mentioned above, in step P1705
Set all to "0" except for those that are initially set to "1".
Ru. Therefore, execution of MSIF processing subroutine 5BII
The parameter MSIFS referenced in this step is
It will be set to "0". The microprocessor 61 then runs the step P1707.
Go to and set the interrupt timer 66 of the MSC21.
In the next step P1708, an event (EV2.EV3.
EV4) Enable interrupts when they occur and execute the main loop.
Start a line. The main loop is about the macro system interface.
Hand 111 (SB171 to 5B174) and job control
It consists of steps to execute (P1709 to 5BI76).
These two types of moves 11 [1, macroshi
Procedures between system interfaces are executed constantly.
The procedure for controlling jobs is a macro system installer.
5YSWAIT when the interface preparation is completed
is reset to 0, it becomes executable (step
P1709). MSIF monitoring subroutine program S
B 171, the microprocessor 61 is Macrosys
initialization of the system interface 27 and the macro system
Regarding all SSCs that can be connected to the system interface 27
Check for connectivity individually. Subsequent received data processing
In the subroutine program 5B172, each 5SC22~
26 to the reception buffer 47 of the MSC 21.
executes the frame analysis and executes the transmission request processing subroutine program.
In Gram 5B173, MSC21 global mode
Map 44, local mode map 45 and commands
Among the information held in the register 41, 5SC22~
26, converts the information to be transmitted into a frame and stores it in the transmission buffer.
48. Frames held in the transmission buffer 48
The system is used for timer interrupt processing and transmission interrupt processing.
Send to macro system interface 27 by execution
do. Continued polling control subroutine program 5B174
Now, according to the polling method described above, each 5SC22
~26 to send a communication request to MSC21 and each 5SC22
~26 is realized. In this communication request, the MSC21 requests status
is sent to the target SSC, and in response to this communication request,
The targeted SSC responds with a status answer and sends
Output the required data. On the other hand, the procedure for controlling job execution is 5YSWAIT
is reset to “0” (step P1709
job processing timing L
OOPF is determined to be “1” (in step P1710
If the answer is yes), the process will begin. This way
When the time comes to process the job, the microprocessor
In preparation for future job execution control, the processor 61 immediately
Reset LOOPF to "o" in step P1711.
Ru. Therefore, job execution control (SBI75.5B
176) will be executed at a predetermined timing. Also,
Procedures that control job execution require multiple job processing subsubs.
Routines (JOBI to JOBn) are executed sequentially
become. The main loop procedure outlined above is explained in detail below.
I will clarify. Figures 18A to 18B are MSIF monitoring subroutines.
This is a flowchart diagram showing the steps of the program.
MSIF monitoring subroutine program 5 using PI301
When B171 is started, the microprocessor 61
Check the parameter MSIFS and check the parameter MSIFS.
Check whether FS is set to “0” (step
P1802). This subroutine program 5B171
Immediately after the start of the main routine program (Figure 17)
Since it is initially set to "0" in step P1706,
, the microprocessor 61 is an essential controller 5SC
22, 23, 26 and macro system interface 2
Check the connection with 7. i.e. microprocessor
61 is the stage from 5SC22 in step P1803.
The reception notification flag RR indicates whether or not the task answer has been received.
Check again. MSIF monitoring subroutine program
Immediately after starting execution of 5B171, the transmission request subroutine is still running.
Since the program 5B173 has not been executed, of course,
Passed by the received data processing subroutine program 5B172.
The resolution of the received frame from the SSC that is the target of the communication request.
No analysis has been performed, and the judgment in step P1802 is
-(N). If the judgment in step P1802 is no
If so, the microprocessor 61 executes step P1803.
～Proceed to step P1811 without executing P1810
move on. As already explained, the parameter MSIFS is
0", so step P1811
The judgment is also no, and steps P1812 to P1814 are executed.
The process proceeds to step P1815 without executing the process. Described later
, the microprocessor 61 increases the reference value.
Check the parameter MSIFS repeatedly while
However, as mentioned above, the parameter MSIFS is set to “0”.
The initial settings remain, so any subsequent steps (
The judgment in P1819, 1822) was also no, and the
Proceed to step P1831. The microprocessor 61
At step P1831, the flag JOBACT is "0"
, but the flag JOBACT is
, is "0" except during job processing, so step P18
The judgment result of 31 is yes, and the microprocessor 6
1, flag 5YSWAIT is set in step P1832.
Check whether it is rOJ. Flag 5YSWAIT is
Since it is set to "1" in step P1705,
Opening the MSIF monitoring subroutine program SB 171
Immediately after the start, the flag is 5YSWAIT=rlJ, and the microphone
The processor 61 is an optional connection checker routine.
SSC scan without running program 5B182.
Status check subroutine program 5B183
Execute and return to the main routine program. In this way, you can return to the main routine program.
Repeating MSIF monitoring subroutine program 5B
171 repeatedly and install the required controller (SSC
22, 23, 26) and macro system interface
Check the connection with 27. to status request
In response, the status answer from 5SC22 to 26 is
The reception notification flag RR indicating that the service has been received is “1”
If it detects that the microprocessor is set to
The processor 61 performs the steps P1803 to P1805.
Judging as yes, these 5SC22, 23, 26
are all connected to the macro system interface 27.
It is confirmed that In this way, the essential controllers 5SC22, 5S
Macro system interface for C23, 5SC26
Once the connection with the interface 27 is confirmed, the microprocessor
The server 61 proceeds to step P1806 and flags UNITF.
is set to a value other than "0", i.e. "1"
Determine whether or not. Flag UN ITF is the main route
reset to “0” in step P1706 of the program.
MS IF monitoring subroutine program
At the beginning of execution of RAM 5B171, step P1806
The result of the judgment is no. Therefore, the microprocessor
61 is a step without executing step P1807.
If the flag UNITS is set to a value other than "0" in P1805,
Determine whether or not it has been written. MSIF monitoring subable
At the beginning of execution of program SB 171, the step
Since the judgment result of step P1808 is no, the microprocessor
The processor 61 proceeds to step pieio and sets the parameter MS.
Step the IFS to "1" and connect the required controller
Parameter PCY to control the time interval to check
Set CLE to "0". The above flags UNITF and U
What is NITS? Option connection check subroutine 58
In 1B2, 5SC24 and 25 are macro system inputs.
until it is confirmed that it is connected to interface 27.
maintains "0", so the above 5SC24,2
Responses from 5SC24 and 25 are not received until the connection confirmation of 5 is completed.
Step P1807. P1809 without judgment
Proceed to step P1810. In this way, the first initialization
Finish the stage. After step P18] 0 is completed, the microprocessor 61
sets the parameter MSIFS in step P1811.
Check to confirm completion of the first stage of initialization. if
, if the determination result in step P1811 is no, S
SC status check subroutine program SB
After completing step 183, return to the main routine program.
, then step P1802 and step P again.
Check the value of parameter MSIFS at 1811
. Connection of essential controller 5SC22, 23, 26
In the confirmed state, the parameter MSIFS is set to "1".
Since it is set, the judgment result of step P1811
is normally YES, and the microprocessor 61
Limit the value of parameter PCYCLE in step P1812.
Compare with value n. This limit value n is the required controller 5
Communication necessary to confirm the connection of SC22, 23, 26
The value is set to the number of requests plus a predetermined margin number of times.
(Step P 1812). Essential controller 5SC
When the connection was confirmed for 22, 23, and 26, the status
Since the judgment result of step P1812 is no, micro
The processor 61 performs step P1815. P1819. P
1822. , P1831, subroutine program 5B
The program returns to the main routine program via step 183. Up
The limit value n is determined by the polling control subroutine described in detail later.
In program 5B174, it advances by "1", so
, Eventually, the judgment result of step P1812 becomes YES.
The microprocessor 61 then proceeds to step P1813.
and sends a reset command to the connected SSC.
To do this, reset the command register 41 of the MSC21.
Set the reset command RESET. Connection confirmed
Sending the reset command RESET to the SSC is
communication request processing subroutine program SB173 and
Executed in the communication buffer processing routine program 5B41.
SS is executed and the reset command RESET is supplied.
The functions realized by C are executed by SSC, which will be described later.
This will be explained in the program. Reset like this
The reset command RESET confirms the connection in step P1813.
MSC21 command register for recognized SSCs
When set to the controller 41, the microprocessor 61
Step the parameter MSIFS to “2” and end the second stage.
Complete. In the following step P1815, the microprocessor
61, the parameter MSIFS has the value "2"
Determine whether or not. The judgment result of step P1815 is
, the SSC status check subroutine
After executing SB 183, -1 main routine program
Return to step P1802. After P1811, the screen returns to
Check the value of parameter MSIFS in step P1815.
Tsuku. However, the parameter MSIFS is
When the stage is completed, the value is already set to "2" in step P1814.
Since the determination result in step P1815 is
The result is always YES, and the microprocessor 61 confirms the connection.
All SSCs that have been reset hold the reset command RESET.
(Step P 1816) to determine whether the
If the result is no, -dan main routine program
After returning to step P1802. P1811. P1
The determination in step P1816 is repeated through step P815. In contrast, the transmission of the reset command RESET is completed.
completed, and the judgment result in step P1816 was YES.
If so, the microprocessor 61 is in its global mode.
Standard mode held in the map 44 (step P1
702) for all SSCs that have been confirmed to be connected.
Set the transmission request flag TR to "1" to supply the
(Step P 1817). After this, micropro
The processor 61 sets the parameter MSIFS to "3",
Finish stage 3. After the completion of the third stage, the microprocessor 61
Check whether the value of data MSIFS is "3".
If the judgment result is no, the SSC status
After executing the check subroutine program 58183,
- Return to the main routine program and step P.1
802. Step P18 via P1811 and P4O10
At step 19, the parameter MSIFS is checked again. para
The meter MSIFS is set to the value “3” in step P1818.
Since the determination in step P1819 is normally
The microprocessor 61 is
With the judgment result, proceed to step PI320, and issue a transmission request.
Determine whether flag TR has been reset to "0"
. Regarding standard mode where the transmission request flag is set to “1”
The information to be sent is sent in the same way as the reset command above.
Processing subroutine program 5B173 and transmission buffer processing
to execute the physical subroutine program 5B41.
It is sent to the SSC that is the target of supply, and then
The transmission request flag TR is reset to "0". However,
So, the judgment result at step P1820 is no.
However, information regarding the standard mode is still provided to the SSC to be supplied.
The microprocessor
61 is the SSC status check subroutine program
After execution of program 58183, the main routine program
After that, the process returns to step P1802. P1811,
Step P1820 after P4O10 and P1819
Repeated refusal. Eventually, information will be provided for standard mode.
Sent to the target SSC and attached with information about standard mode.
All transmission request flags TR that had been set are reset to "0"
When the microprocessor 61 inputs the parameter MSI
Set FS to "4" Step P1821), 4th stage
Finish floor. After the completion of the fourth stage, the microprocessor 61
Check whether the value of data MSIFS is set to "4" or not.
If the judgment result is no, the SSC stage
End of task check subroutine program S8183
After that, return to the main routine program, and then
, steps P1802, P1811. P1815. P1
The determination in step P1B22 is repeated through step 819. pa
The parameter MSIFS is set to “4” in step P1821.
Since the determination result in step P1822 is
The answer is yes, and the microprocessor 61
Step with a yes result for P1822
Proceed to P1823. In step P1823,
The microprocessor 61 receives the frames sent from the 5SC22.
Determine whether the reception status of the system has stabilized. This reception
The status is determined by the polling control subroutine program described later.
Based on count data information FLEN in Gram 5B174
Based on the value of management data information LENTBL formed based on
be judged. Count data information FLEN is received data
Received in processing subroutine program SB 172
It represents the data length of the transmitted frame.
If the SSC targeted for communication is
amount of status information sent from 5SC22)
represents. Therefore, the MSC21 micropro
The processor 61 has a constant value of management data information LENTBLO.
If the following occurs, the reception from the SSC that is the target of communication will be
It is determined that the trust is stable. microprocessor
While the judgment result in step P1823 is NO, the sensor 61
SC status check subroutine program 5B1
83, return to the main routine program and step
P1802, P1811. P1815. P1819゜
After passing through P4O10, the judgment in step P1823 is repeated again.
Repeatedly, the judgment result of step P1 B23 is YES.
wait for it to happen. The judgment result of step P1823 is YES
Then, the microprocessor 61 executes step P182.
Proceed to step 4 and check whether the reception status from 5SC23 has stabilized or not.
is determined in the same manner as in step P1823. this
In this way, the microprocessor 61 is an essential controller.
The reception status of each controller 5SC22, 23, and 26
Please check step P1823. P1824. P1
B25), all required controllers 5SC22,23
, 26 becomes stable, step P1B2
Proceed to step 6 and if the flag UNI TF is other than "0", that is
Then, it is determined whether or not it is set to "1". Described later
Option connection check subroutine program S8
1 If B2 is not running, flag UNI
TF, UNITS are “0” in step PIToe
Since it is still set to , the judgment result in step P1826 is
The result is a notebook, MicroPro, and Sessa 61 are steps.
Check the reception status from 5SC24 on P1B27
Proceed to step P182B and set the flag UNIT.
Determine whether the value of S is set to a value other than "0"
do. The flag UNITS also has an optional connection chip.
After executing the EX subroutine program SB182,
In the previous example, the initial setting value is rOJ, so the microprocessor 6
1 is step P without executing step P1B29.
Proceed to step P1830. However, as in this example
, 5SC24, 25 are macro system interfaces
27, check the option connection.
As a result of executing subroutine program 5BI82, the file
The lags UNITF and UNITS are each set to “1”.
As a result, step P1826. P1B28's
The judgment result is YES, and the microprocessor 61
Step P1B27. P1B29 respectively S S C2
4. Check the reception status of 25. Step P182
7. If the judgment result of P1829 becomes yes,
The microprocessor 61 proceeds to step P1830,
Set parameter MSIFS to "5", flag 5YSWAI
Set T to "0", respectively. Next, micropro
The processor 61 is the system update subroutine program 58
181 (Fig. 19) and execute the command from MSC21.
Determine the SSC that supplies the code, etc. However, the first
As shown in FIG. 9, step P1902. P1
Check the flags UNITF and UNITS at 905.
If none of these are set to 1, then directly
Later, in the MSIF monitoring subroutine program 5B171.
Return. What are these flags UNITF and UNITS?
Execute option connection check subroutine program
As a result, 5sC24 and 25 are macro system interface
When it is confirmed that it is connected to the interface 27, it becomes "1".
The system update subroutine program
For detailed instructions on system SB 181, see the optional connection checker.
After explaining the procedure of routine program 5B182
explain. The microprocessor 61 executes the system update subroutine
MS IF monitoring subroutine from program S8181
When returning to program 5B171, step P183
Go to step 1 and check if the flag JOBACT is set to rOJ.
If the judgment result is no, S
SC status check subroutine program 581
After executing step 83, the program returns to the main routine program. The flag JOBACT is set to "0" in step P1706.
Therefore, at this stage, normally step P1832 is performed.
The judgment result is yes, and the microprocessor 61 is turned off.
Option connection check subroutine program 5818
Execute 2. Option connection check subroutine program 5B1
Regarding 82, the detailed procedure is shown in Fig. 20,
In step P2O01, the microprocessor 61
When the procedure starts, the flag UNITF is set to "0".
is set, and the result of that judgment is
, step P2O03 to step P2O0
Proceed to step P2O06 without executing step 5 and execute the flag.
Determine if UNITS is set to “0”.
Ru. However, the flags UNITF and UNITS are 5
Macro system interface 27 of SC24, 25
When the connection with is confirmed, steps P2O04 and
Since it is set to “1” in P2O08, the optional connection
When the continuation check subroutine program is executed for the first time
should be set to "0" for each, and
Therefore, the judgment result of step P2O02 is YES.
Ru. As a result, the microprocessor 61 has the above-mentioned essential functions.
Connection check of controller 5SC22, 23, 26
Macro system interface 27 and
Check the connection with 5SC24 (step P2O0
3). If the judgment result of step P2O03 is no,
For example, 5SC24 is macro system interface 27
Since it is not connected to the microprocessor 61
without executing steps P2O04 and P2O05
Proceed to step P2O06 and flag UN■TS is "0"
Determine whether it is set to . On the other hand, as in this embodiment, the 5SC24 is a macro system
If connected to interface 27, step P
The decision in 2003 should be yes, and Mike
Processor 61 answers yes to step P2O03.
Proceed to step P2O04 with the judgment result of 5SC
Set the flag UNITF to "1" to indicate connection confirmation of 24.
Set. The microprocessor 61 again runs the program described above.
In order to repeat the sequence, the parameter MS representing the initialization stage is
Set IFS to the initial value "0" and flag 5YSWAIT to "1".
” respectively. After that, the stator of MSC21
The thread related to 5SC24 held in the thread register 42
Reception notification flag R attached to each status information
Reset R to "0" (step P2O05). In this way, the connection check and connection confirmation between 5SC24
When the post-authentication processing is completed, the microprocessor 61
Perform the same confirmation procedure as for 5SC24 regarding 5SC25.
The process advances to step P2006 to execute the flag UNI
Determine whether the TSO value is "0" or not. Already flag UN
If ITS is set to “1”, the 5SC25 connection
Since the connection has been confirmed, the microprocessor 61
MS without executing steps P2O07 to P2O09
Return to IF monitoring subroutine program 5B171
do. However, as mentioned above, the first
Connection connection check subroutine program SB 18
When executing step 2, the connection of 5SC25 is unconfirmed, and the
The lag UNITS should be set to "0". Therefore, the microprocessor 61 performs step P2O
Judge 06 as yes, proceed to step P2O07, and proceed to step P2O07.
Confirm the connection of controllers 5SC22, 23, and 26, which must be recorded.
Macrosystem for 5SC25 using the same procedure as the verification procedure.
Check the connection with the system interface 27. If, 5
If SC25 is not connected, the microprocessor
61 is to execute step P2008゜P2O09.
Instead, leave the flag UNITS set to "0" and run the MS.
Return to IF monitoring subroutine program 5B171
Ru. However, as in this embodiment, the 5SC25 is
If connected to stem interface 27,
The judgment result of step P2O07 should be yes.
, the microprocessor 61 uses the result of this judgment to
Proceed to step P2O08 and set flag UNITS to "1"
Set to indicate connection confirmation of 5SC25. microprocessor
The sensor 61 further explained during step P2O04.
For the same reason as above, set the parameter MSIFS to "0" and set the
Lag 5ysWATT is set to "1", respectively. deer
After the microprocessor 61 performs step P2O09
, and the information is stored in the status register 42 of the MSC21.
Receipt notification flag attached to status information
Reset RR to "0". In this way, flags
When the operation is finished, the microprocessor 61
Return to F monitoring subroutine program SB171
Ru. MS IF monitoring subroutine program 5B171
The recovered microprocessor 61 has the SSC status
Check subroutine program 5B183 was executed.
Later, it returns further to the main routine program and changes the parameters.
The above program is performed while sequentially advancing the data MSIFS from rOJ.
Run the ram again. In this example, when re-executing, the optional connection
By executing the EX subroutine program SB 182,
Both flags UNITF and UNITS are set to “1”.
Therefore, the judgment in steps P1806 and P180B is
The result of each decision is yes. Therefore, micropro
In steps P1807 and P1O09, the processor 61
5SC24゜25 and macro system interface 2
Check whether there is any change in the connection status with 7.
. In these steps P1807 and P1O09, the above 5S
C24, 25 and macro system interface 27
When the connection is reconfirmed, the microprocessor 61
5SC24,2 in step P1813 of the 2nd stage
Also set the reset command RESET for 5.
Not only 5SC22, 23゜26 but also 5SC24, 25
also supplies a reset command RESET. Also, the third
When the microprocessor 61 reaches the global module
Re-supplying information about the standard mode in the map 44
Since the transmission request flag TR is set to "1" in order to
It is also standard in global mode map 35 of 5SC24,25.
The semi-mode will be set. Next stage 5
, the judgment results of steps P1826 and P1O28 are
Since each answer is yes, the microprocessor 61
Also check frame reception stability for 5SC24 and 25.
(Steps P1B27.P1B29). In this way, the microprocessor 61 becomes the target
I have already explained that SSC was extended to 5SC24 and 25.
Re-execute the procedure and change the parameters in step P1830.
Set the data MSIFS to “5” and set the flag 5YSWAIT to “0.”
” respectively. After this, microprocessor 6
1 is the system update subroutine program 5B181.
Start execution. Option connection check subroutine
Before running programs SB1 and B2,
As explained above, the system update subroutine program 5B
181 effectively runs the MSIF monitoring sub
Returns to routine program 5B171, but when re-executing
All option check subroutine connections
Gram SB 182 is executed and flags UNITF, U
NITS are each set to “1” (step
P2O04, P2O0B). Therefore, system update
In the subroutine program 5B181, step P
Since the judgment result of 1902 is yes, micropro
The processor 61 proceeds to step P1903 and uses the external paper feed unit.
Set the knit selection permission flag ENBF to "1". child
After that, the microprocessor 61 performs a grid regarding the paper feed mechanism.
Update information held in global mode map 44
(Step P1904). In this example, the software
Since the data is also provided, the decision result in step P1905 is
The result is yes, and the microprocessor 61 takes the step.
In PI906, the sorter selection permission flag ENBS is also set to “
"l". After this, the microprocessor 61
It is held in the global mode map 44 of MSC2.l.
Update the information regarding the sorter (step P19).
07), -MSIF monitoring subroutine program 5B1
Returns to 71. In this way, the MSC21 of the laser printer according to this embodiment
is the required controller after its power-on event occurs.
Check the connection for 5SC22, 23, 26
At the same time, the optional connection check subroutine program
From the configuration of the laser printer in Gram 5B182
is the presence of connection for 5SC24, 25 which is not necessarily required.
Check for nothing. This optional connection checkable
Processing program SB] 82 is the system of the laser printer.
The entire system is on standby (JOBACT=rOJ),
And if flag 5YSWAIT is "o", it will always be executed
. Therefore, during initialization after the above power-on event,
Even if the system is on standby, the 5SC22-26 connection
The printing is repeated, and after the laser printer starts up, the paper feeder
Check the connection even if additional structures or sorters are connected.
The system can be expanded freely.
Wear. As already explained in Figure 17, MSIF monitoring
After the subroutine program 5B171, the received data
data processing subroutine program 58172, then send
Request processing subroutine program 5B173, continued
The polling control subroutine program SB174
are executed sequentially, but below we will consider the operation order of the MSC21.
The main loop timer processing subroutine program
Ram 5B21. Polling control timer processing subroutine
Program S B 22. Polling control subroutine
Program SB 174, transmission request processing subroutine
Program 5B173, received data processing subroutine
The detailed procedures for each program will be explained in the order of program 5B172.
Ru. Main loop timer processing subroutine program 5B
21 and polling control timer processing subroutine program
Ram 5B22 is a timer interrupt event as mentioned above.
) is started every time EV2 occurs and the microprocessor
61 is a series of job processing services of the main routine program.
The execution cycle of Blue 1 program JOBI~JOBn
To control, increment the count value of the loop timer (
Step P2101), then the incremented count value
A job process that indicates when the job process should be executed.
Determine whether the execution timing value has been reached (step
P2102). The judgment result in step P2102 is no.
In this case, step P2103 is not executed.
Proceed to step P2104. On the other hand, step P21
If the judgment result in step P210 is YES, step P210
Proceed to step 3, set the flag LOOPF to "1" and
, reset the loop timer to the initial value "o". Therefore, the loop timer has to be restarted.
Ru. In this way, the flag LOOPF is set to "1"
, the step will be executed the next time the main routine program is executed.
The judgment result of step P1710 is YES, and the job processing
Bluechin programs JOBI to JOBn are executed.
. Next, the microprocessor 61 starts the trouble timer.
The count value is incremented (step P2104), and the step
The reception flag PANS is set to “0” in step P2105.
Determine whether or not the Step P2105
If the judgment result is no, steps P2106 to P2
The process advances to step P2108 without executing step P107. On the other hand, if the judgment result in step P2105 is yes,
In this case, the MSC21 determines that the status answer has not been received and
Proceed to step P2106 and count the trouble timer.
Determine whether the value reaches the response error timing value
. The response error timing value is passed from MSC21 to SSC.
maximum time allowed from sending a request frame to receiving a response.
The count value of the trouble timer is
If this response error timing value is exceeded, the microprocessor
Sessa 61 decides yes regarding step P2106
and sets the flag PEND to "1" (step P2
10? ). In this way, the flag PEND is set in rlJ.
After that, the microprocessor 61 immediately communicates with the SSC.
It is determined that the connection is poor and subsequent polling processing is forcibly stopped.
Polling error processing subroutine program 5
Execute B211. On the other hand, the determination result in step P2106 is no.
In this case, the MSC21 and the SSC from which the communication request was made
Since the communication status is normal, execute step P2107.
The process immediately proceeds to step P2108. In step P2108, the microprocessor 61
increments the count value of the polling timer and
The count value of the switching timer indicates that a communication request is made to the SSC.
Determine whether the desired polling timing has been reached (
Step P2109). Judgment result of step P2109
is no, the microprocessor 61 steps
Start without executing steps P2110 to P2112.
Proceed to step P2113. On the other hand, step P2
If the judgment result of 109 is yes, microprocessor 6
1, the flag PTIMING is set in step P2110.
Determine whether the value is "0". If the judgment result in step P2110 is no, the port has already been
The ring timing has arrived, so the microprocessor
The processor 61 performs steps P2111 and P2112.
The process proceeds to step P2113 without executing the process. Against this
Then, if the judgment result in step P2110 is YES, the port
This is the first time that the occurrence of ring timing has been detected.
Therefore, the microprocessor 61 goes to step P2111.
Go ahead and set the flag PTIMING to “1” and run
Proceed to step P2112 and check the next polling timing.
Reset the polling timer to “0” to detect
to restart the polling timer. Next, the microprocessor 61 performs transmission request processing, which will be described later.
The flag T is set in preparation for execution of the processing subroutine SB173.
Step P2113) Determine whether RML is “0” or not.
, flag TRML is set to other than “0”, that is, set to “1”.
If so, there are characters being sent, so the
The judgment result of step P2113 is no, and the microprop
Processor 61 steps P2114 to P211
Timer interrupt event immediately without running 5
Return to the program that was running at the time of occurrence. to this
On the other hand, if the judgment result in step P2113 is yes
The characters are held in the transmission buffer 48 of the MSC21.
Step P2114)
If the judgment result of step P2114 is no, the microprocessor
The processor 61 immediately executes step P2115.
timer interrupt event) is executed when EV2 occurs.
Return to the program you were in. On the other hand, step P
If the determination result of 2114 is yes, the transmit buffer
Transfer the characters in 48 to the transmission register 49 and
Set TRML to "1" (step P2115)
). After the end of step P2115, the control of the MSC21 is
Timer interrupt event) In the program when EV2 occurs
Return. Next, polling error handling routine program 5B2
The detailed procedure of step 11 will be explained with reference to FIG. Poli
The error processing subroutine program is at step P2.
Once started at 201, the microprocessor 61
is whether flag 5YSWAIT is set to “0” or not.
Step P2202), Step P220
If 2 is no, the laser printer is initializing, so proceed as follows.
Immediately interrupts subsequent processing and returns to the polling control subroutine.
Return to program SB174. Step P220
If the judgment result in step 2 is yes, the microprocessor 61
Execute steps P2203 to P2205 in sequence.
The SSC that caused the response error is 5SC22, 23, 2.
6. If a response error occurs,
The selected SSC is either 5SC22, 23, or 26.
If so, any of steps P2203 to P2205
Since the judgment result is yes in either case, the microprocessor
The server 61 proceeds to step P2209 and performs predetermined error processing.
Run polling control timer processing subroutine pro
Return to Gram SB2.2. For this, the response error is
Whether the caused SSC is 5SC22, 23, or 2B
If not, the microprocessor 61 sets the flag U.
Check NI TF and 5SC24 is macro system
Determine whether or not it is connected to interface 27.
(Step P2206). 5SC24 is macro system
If connected to system interface 27,
Since the judgment result of P2206 is YES, micro
The processor 61 proceeds to step P2207 and detects the response error.
5S024 is the one that caused the problem. If the judgment result in step P2207 is YES, the micro
Processor 61 checks the flag JOBACT and
Determine whether the laser printer is running a job
(Step P2208). Judgment in step P2208
If the result is no, the microprocessor 61 performs step P.
Proceeds to step 2209, executes predetermined error handling, and returns polling.
to the control timer processing subroutine program 5B22.
return. On the other hand, the determination result of step P2208 is
If yes, the degree macro system interface 27
response while waiting even though connection is confirmed
Since an error has occurred, the microprocessor 61
Set the flags UNITF and ENBF to “0”.
, 5SC24 is macro system interface 27?
Treat it as if it were separated from the After this, micro
The processor 61 sets the parameter MSIFS to "0" and sets the parameter MSIFS to "0".
Set Lag 5YSWAIT to "1" and step
P2211), followed by the status register of MSC21.
Reception attached to status information held in data 42
Reset the notification flag RR to "0" (step P2
212). Such a series of treatments (step P2210
~ step P2212), the MSC21
Execute the monitoring subroutine program 5B171 again.
Therefore, check the connection of 5S024.25 etc. again.
will be done. On the other hand, step P2206.
If any of the judgment results in step P2207 is
-, the microprocessor 61 executes step P221.
Proceed to 3 and check the flag UNITS, 5SC25 is
Connected to macro system interface 27
It is determined whether or not (step P2213). 5SC25
is connected to the macro system interface 27.
If so, the judgment result of step P2213 is YES.
Therefore, the microprocessor 61 goes to step P2214.
Proceed to check whether it is 5SC25 that caused the response error.
to judge. The judgment result of step P2214 is YES
If so, the microprocessor 61 sets the flag JOBACT to
Check to see if the laser printer is running a job.
It is determined whether or not (step P2215). Step P
If the judgment result of 2215 is no, the microprocessor 6
1 proceeds to step P2216 and executes predetermined error handling.
and polling control timer processing subroutine program
Return to Ram 5B22. On the other hand, step P221
If the judgment result in step 5 is yes, 5SC25 will run the macro program once.
Connection with stem interface 27 has been confirmed.
Despite this, a response error occurs while waiting.
, the microprocessor 61 sets the flags UNITS, ENB.
Set each S to "0" and 5SC25 is Macrosys.
as separated from the system interface 27.
Treat. After this, the microprocessor 61
Set the data MSIFS to “0” and set the flag 5YSWAIT to “1.”
” in step P2211), then M
The status register 42 of the SC21
The reception notification flags R and R attached to the status information are set to rOJ.
(Step P2212). One like this
Continuous treatment (Step P221?, Step P221
1 to step P2212), the MSC21
Execute the F monitoring subroutine program 5B171 again.
Therefore, check the connections of 5SC24, 25, etc.
This will result in being blocked. (Left below) Next, polling control subroutine, Chin program 5B1
The detailed procedure of step 74 will be explained with reference to FIG. Polling control subroutine program 5BI74 starts
When started in step P2301, the microprocessor
The processor 61 has the flag PTIMING set to “1”.
Step P2302)
If the judgment result of step P2302 is no, polling time is reached.
The microphone has not yet arrived (see Figure 7).
The processor 61 is a polling control subroutine program.
Immediately interrupts RAM SB 174 and restarts the main routine program.
Return to Gram. In contrast, the polling control timer processing service described above
Step P2111 of routine program 5B22
The flag PTIMING is set to "1" in
, the judgment result in step P2302 is YES, and the
The microprocessor 61 proceeds to step P2303.
Determine whether flag PEND is set to "1"
do. The microprocessor 61 processes received data, which will be described later.
The received frame is constructed in the processing subroutine SB1?2.
The frame continuation bit N of the character is “0”.
or when the exit code (7FH) is detected.
The cut detection is recognized and the flag PEND is set to “1”.
It will be done. Therefore, the flag PEND is set to "1".
If it is, all characters that make up the frame being received are M.
It will be taken into SC21 and communicated to other SSCs.
It becomes possible to implement the request. However, if the flag PEND is "0", it means that
frame has untransmitted characters, so the frame
In step P2303, the microprocessor 61
It is determined that the polling control subroutine 5B174 is
Immediately terminate and return to the main routine program
. On the other hand, the judgment result in step P2303 is negative.
If so, the microprocessor 61 performs step P2304.
Proceed to step 1 and determine whether there is free space in the transmission buffer 48.
, if there is no free space in the transmission buffer 48, the subsequent steps
Stops execution of the step and immediately returns to the main routine program.
return to the program. In this way, in this embodiment, in order to execute a transmission request,
, the polling timing has arrived and the previous transmission
The response to the request is complete and the send buffer is
There must be space in 48. If all the above conditions are met, the microprocessor
61 proceeds to step P2305 and sets the flag PTIMIN.
Reset G, PEND, and PANS to “0”.
, followed by the data that constituted the response to the previous communication request.
Transfer and manage the value of count data FLEN that represents the data length.
Update data LENTBL (step P2306)
. In this way, when the management data LENTBL is updated,
, the microprocessor 61 outputs the count data FLEN.
Clear and end post-processing related to the previous communication request.
. After this, the microprocessor 61 executes the communication request.
Send status request to MSC21 buffer
The data is sent to the buffer 48 and held there (step P230B). After that, the microprocessor 61 sends the communication letter to the SSC.
Start a trouble timer to monitor the situation (
Step "P2309). In this way, communication requests are
When the preparation is completed, the microprocessor 61 performs step
In P2310, the SSC to which the communication request is sent is
Advances the specified management data pssc and performs the next poll.
In preparation for execution of the processing control subroutine program 5B174.
I can do it. In step P230B above, the transmission buffer 4
A status request held at 8 is sent by a transmit interrupt
Ben) Transmit buffer processing service executed after EV4 occurs
The target of communication in routine program 5B41.
is sent to the SSC that is currently in use. When the processing related to this communication request is completed in this way,
Microprocessor 61 is macro interface 27
Sequentially sends communication requests to all SSCs connected to
Step P2311) to determine whether or not the
If the judgment result of P2311 is no, -dan main routine
The program returns and the judgment result of step P2311 is
If YES, proceed to step P2312 and complete the communication request.
Then set the SSC to "22" and start again from 5SC22.
Prepare to send communication requests sequentially. In addition, the microprocessor 61 also uses the parameter PCYCL.
Manage the number of times communication requests are repeated by advancing E by "]".
, return to the main routine program. Next, the transmission request processing subroutine program 5B173
The detailed procedure will be explained with reference to FIG. Send request processing
The physical subroutine program 5BI73 executes step P24.
01, the microprocessor 61
Steps to set the management data LMTF in the limit counter.
P2402), whether there is space in the transmission buffer 48 or not.
(Step P2403). If the send buffer
If there is no vacancy in space 4, the judgment result of step P2403
is no, so the microprocessor 61 issues a transmission request.
It was determined that the main routine program could not be handled immediately.
Return to Ram. On the other hand, the judgment result in step P2403 is YES.
Then, the microprocessor 61 proceeds to step P2404.
Global mode map 44 and local mode map
Search for map 45 and send on these maps 44.45
To discover information, etc. whose request flag TR is set to "1"
I will try. If the transmission request flag TR is set to “1”,
If no information is found, proceed to step P2405.
The judgment result is no, and the microprocessor 61
Do not execute steps P2406 to P2409.
The process then proceeds to step P2410. In contrast, step
If the result of P2405 is yes, the microprocessor
The server 61 resets the discovered transmission request flag TR to "0".
(step P2406), and sets the transmission request flag T.
Convert the information marked with R into a frame and send it to the buffer
on the 4th day (step P240?). After this, ma
The microprocessor 61 controls the control in step P2409.
The limit counter is decremented by 1, and then the value of the limit counter is
It is determined whether or not the value has reached "0" (step P240).
9). If the judgment result in step P2409 is YES, the
The microprocessor 61 interrupts further processing and immediately
The in-routine program returns, and on the contrary, step P
If the judgment result in 2409 is no, proceed to step P2410.
So local mode map 34 and global mode map 34
The search is completed for all information held in the
judge whether it has been completed or not. Judgment result of step P2410
If the result is no, the microprocessor 61 performs step P24.
Return to 03 and check if there is free space in the sending buffer on day 4.
The transmission buffer 48 is unable to hold the frame from then on.
Local mode map 34 and global
The search for all information on Lumode Map 35 ends.
It consists of steps P2403 to P2410.
Repeat the loop. In this way, in this example, the restriction is
One-time transmission request processing subroutine program using a counter
limits the number of characters sent out during program execution.
Therefore, MSC21 can perform 5 steps without sacrificing other processing.
Can communicate with SC22-26, 5SC22-2
Even on the 6 side, there is no delay in responding to the transmission request. Eventually, the judgment result of step P2410 becomes YES.
, the microprocessor 61 proceeds to step P2411.
It is determined whether there is free space in the transmission buffer 48, and the step
If the result of step P2411 is yes, use the command
Request to send all commands held in the register 41
If the flag TR is searched (step P2412), if
A command with the communication request flag TR set to “1” is issued.
If not, the judgment result in step P2413 is NO.
Therefore, the microprocessor 61 executes step P2414.
~Step P2 without executing step P2418
Proceed to 418. In contrast, the determination result of step P2413 described above
is yes, the microprocessor 61
The communication request flag TR is reset to "0" (step P
2414), reset transmission request flag TR attached
Converts the previously sent commands to frames and then sends them to the transmit buffer.
It is sent to the buffer 48 (step P2415). After this
, the microprocessor 61 performs the process in step P2416.
decrements the limit counter by 1, and then
It is determined whether the value of the data has reached "O" (step P
2417). The judgment result of step P2417 is YES.
, the microprocessor 61 interrupts subsequent processing and immediately
immediately return to the main routine program and step
If the judgment result in step P2417 is no, step P2418
All the command registers 32 are
Determine whether the search for information is complete. Step
If the judgment result of P2418 is no, the microprocessor
61 returns to step P2411 and stores the transmission buffer on the 4th day.
Check whether there is space or not, and then use the sending buffer 48.
is no longer able to hold new frames, or the command register
Step 32 until the search is completed for all the information on the star 32.
Loop consisting of steps P2411 to P2418
repeat. Eventually, the judgment result of step P2418 will be
When it becomes S, the microprocessor 61 sends a transmission request subable.
Exit the main routine program and return to the main routine program.
to return to. In this way, steps P2407 and
The file held in the transmission buffer 48 in step P2415
The frame is a transmit interrupt event).
Passed by executing the buffer processing routine program 5B41.
It is sent to the SSC that is the target of the communication. In this embodiment, execution of the transmission request subroutine program
, the microprocessor 61 first enters the local mode.
Search the domain map 45 and the global mode map 44.
, sends the information to be transmitted to the transmission buffer 48. deer
If there is more space in the transmit buffer 48 after the
The command is sent to the sending buffer 48. Therefore, each
The SSC uses local mode prior to supplying commands.
stored in the map 45 and the global mode map 44.
information that is needed to execute the command.
The supply of necessary information is guaranteed. Next, we will explain the received data processing subroutine program.
I will clarify. This received data processing subroutine program S
B172 is received when receive interrupt event EV3 occurs.
by the communication buffer processing subroutine program 5B31.
, the character latched in the receive register 46 is
It is executed after being transferred to the buffer 47, and the detailed procedure is as follows.
It is shown in FIG. In step P2501, this received data processing subroutine
When program SB172 is started, the microprocessor
The processor 61 first checks the reception buffer 47 of the MSC 21.
The character is latched in the receive buffer 47.
It is determined whether or not it has been set (step P2502). If characters are held in the receive buffer 47,
If not, the determination result of step P2501 will be no.
Therefore, the microprocessor 61 immediately returns to the main routine.
Return to program. On the other hand, step P25
If the judgment result of 02 is yes, the microprocessor
The server 61 proceeds to step P2503, and the count data C
Determine whether CNT is "0" or not. Already in the flag category
As mentioned in the explanation below, the count data CCNT is
Indicates the number of characters already received when receiving a frame.
Therefore, it is set to "0" immediately after receiving a frame.
, therefore, the microprocessor 61 performs step P2
The process proceeds to step 504, where the received character is an ID character.
Determine whether or not. As mentioned above, for each frame
The first character is an ID character, so it is a count date.
The received character despite the fact that CCNT is "0"
If the character is not an ID character, there is a reception error or
ID cache that has already been processed in the received data processing subroutine.
Since the microprocessor 61 is considered to be a
Interrupts subsequent processing and immediately returns to the main routine program.
Return. In contrast, the received character
If it is a character, the judgment result in step P2504 is YES.
Then, the microprocessor 61 reads the received ID card.
Data ID is the identification code S and area code U of the tractor.
S and IDU in the RAM 62 of the MSC 21, respectively.
Transfer to the work area (step P2505). After this
, the microprocessor 61 proceeds to step P2506.
, set the count data CCNT to "2". Furthermore, this
In the program, as count data CCNT
"1" is not used. Then the microprocessor 6
1 returns to the main routine program. The microprocessor 61 runs the main routine program.
Repeatedly execute a series of subroutine programs
when the second character is in receive buffer 4.
7, the reception data processing subroutine SB
The judgment in step P2503 of 1?2 is no, and my
[6] proceeds to step P2507 and receives
Determines whether the specified character is a data character.
cut off The received character is an ID character
, the judgment result in step P2507 is no, so
The microprocessor 61 proceeds to step P2505.
, the identification code S and area code of the received ID character.
RAM62 as data IDS and IDtJ
Keep it in your work area. After that, count data CC
Set NT to "2" (step P2506) and main
Return to routine program. On the other hand, the received cache
If the character is a data character, step P25
Since the judgment result of 07 is yes, the microprocessor
The sensor 61 increments the count data FLEN by "1".
(Step P2508), and then receive it in Step P2509.
The area code U of the ID character of the frame being transmitted is
command register or status register.
Determine whether or not. Area code U is command register
If specifying a data or status register, the status
Since the judgment result of step P2509 is YES, micro
Processor 61 is a status/report analysis subroutine
Execute program 5B251. On the other hand, if the judgment result in step P2509 is no, the
The microprocessor 61 is a mode analysis subroutine 5B2
Execute 52. First, the judgment result of step P2509
is YES and status/report analysis subroutine
The program was started in step P2601.
The case will be explained with reference to FIG. 26. This stay
In the task/report analysis subroutine program, the l key
Processing is executed for each character. Area code IDU
Microprocessor 61 when set to "3"
to the status/report analysis subroutine program.
As it is clear from the frame identification table above,
In addition, the status/report analysis subroutine program
Analyzing the status answer or sequence report
is executed. The microprocessor 61 first
Check count data CCNT in step P2602.
and check whether the count data CCNT is “3” or not.
Check. For data character 1, step
In step P2506, count data CCNT is “2”
Since the judgment result of step P26°02 is
The result is no, and the microprocessor 61 executes step P.
Proceed to 2603 and write the received data character 1
held in a temporary register in the microprocessor 61 (step
P2603). After this, the microprocessor 61
The count data CCNT is incremented by rlJ and the received data
Data processing subroutine SB 172, and main routine
Return to program. As is clear from Figure 11 (f) and (g) above,
, status answer and sequence report are both 3 keys.
Since it is composed of Yarakuta, it is the target of communication.
Data character 2 is eventually supplied from the SSC,
It will be latched into the reception buffer 47. data key
Executed after character 2 is latched into the receive buffer 47
In the receive data processing subroutine program that is
As with the data character l, the status/report interpretation
The analysis subroutine program is executed, and this time the step
Since the judgment result of P2602 is YES, micro
The processor 61 proceeds to step P2605 and inputs the data key.
Character 2 is set as a temporary register in the microprocessor 61.
Hold at 2. Next, the microprocessor 61 receives
The received frame is determined by the contents of data characters 1 and 2.
Determine whether the system is a status answer (step
P260B). If the received frame is
If it is a report, the microprocessor 61 performs step P.
2606, it is determined as no, and the process proceeds to step P2607.
Proceed to - and read the data keys held in registers 1 and 2.
Transfer characters 1 and 2 to the report register 37, and
After that, you will receive a response from the SSC that is the target of the communication.
are attached to these data characters 1 and 2 to indicate that
Set the received notification flag RR to "1" (step
P260B). The sequence received in this way
The report is a job processing subroutine program described later.
used in the system. In contrast, the received frame is a status answer.
If so, the judgment result in step P2606 is YES,
The microprocessor 61 proceeds to step P2609.
, First, stop the trouble timer. And the flag
Set PANS to "1". In this way, troubleshooting
The timer is stopped and the flag PANS is set to “1”.
Then, the polling control timer processing subroutine program
Response at step P2106 (Figure 21) of Ram 5B22
It will not be considered an error. After this, micropro
The processor 61 proceeds to step P2610 and registers the command register.
The data key is waiting for confirmation after being sent to the star 41.
Is there a command where the 7th bit Q of character 1 is 1?
Check the information passed during this command and the received status answer.
The last command supplied to the SSC being communicated
(See Figure 11(f))
). If the judgment result in step P2610 is no, the microphone
The processor 61 executes steps P2611 and P2612.
Proceeds to step P2613 without executing it, but
If the judgment result of P2610 is YES, the microprocessor
The processor 61 attaches the received frame to step P2611.
SSC where the included command is the target of communication
matches the last command sent to
to decide. If these commands do not match
, the judgment result in step P2611 is no, so the
The microprocessor 61 proceeds to step P2612 and
The last command supplied to the SSC being communicated
Set the communication request flag TR to "1" and issue the command.
Prepare to resend. On the other hand, step P26
If the judgment result in step 11 is yes, the microprocessor 61
is the data character held in temporary registers 1 and 2.
command register 32 and status register 1 and 2 respectively.
The data is transferred to the register 33 and held (step P26).
13). After this, the microprocessor 61 performs communication pairing.
To indicate that there was a response from the SSC in question
, received information attached to received data characters 1 and 2
Set the notification flag RR to "1" (step P26
14). The microprocessor 61 then processes the received data.
Check the frame continuation bit N of the data character.
, determine whether the frame continues further (step
P2615). If the frame continues, step P2
Since the judgment result of 615 is no, the microprocessor
The server 61 steps without executing step P2616.
The process advances to step P2617, and the judgment result of step P2615 is
If yes, microprocessor 61 is SSC break test
PEND indicating output is set to "1" (step P26).
16), initialize the count data CCNT to “O”.
to prepare for next frame reception (step P261?)
. After this, the microprocessor 61 starts the main routine.
Return to program. The next received frame is the data that constitutes the mode answer.
The case where it is a character is explained with reference to Figure 27.
I will clarify. The mode answer is shown in Figure 11 (h) and (i).
Word types and string ties as explained in
There are two types, each with a different frame structure. Therefore, mode analysis subroutine program 5B252
is started in step P2701, the microprocessor
The processor 61 checks the count data CCNT and receives it.
whether the received character is data character 5 or not.
A judgment is made (step P2702). ID character reception
Later, data character 1 is received, so count
Data CCNT should be set to "2" (
(See step P2506 in FIG. 25), step P27
The judgment result of 02 is no. Therefore, the microprocessor
The sensor 61 proceeds to step P2703 and stores the count data.
It is determined whether CCNT is "2" or not. as mentioned above
After starting frame reception, the mode analysis subroutine is first executed.
Program 5B252 is executed using data characters.
This is when count data CCNT is received.
It is "2". Therefore, the judgment result of step P2703 is
The result is yes, and the microprocessor 61 takes the step.
Proceeds to P2704 and displays the received data character (map).
It is determined whether address M) is 7FH. 11th
As explained in Figure (h), map address M and
The prohibited value is the exit code (7FH).
Therefore, in step P2704, the end code is
(7FH) is detected, the microprocessor 61
Proceeds to step P2705 and indicates SSC break detection
The flag PEND is reset to “0”, and then the counter
reset data CCNT to "0" (step P
2706). On the other hand, if the judgment result in step P2704 is
If S, the microprocessor 61 sets flag 5TRNG.
Step P2707), the counter should be reset to "0".
Set the received data CCNT to "4" and
data character 1 to the address of microprocessor 61.
transfer to the storage register (step P2708). After this
, the microprocessor 61 stores the information in the address register.
Matupua represented by data character 1 held
Analyzing the address M, the map address M is determined as a string element.
Determine whether rear is specified (step P27)
09). If map address M is string area
If specified, the judgment result of step P2709 is
Since it is S, the microprocessor 61 executes step P27.
Proceed to step 10 and set flag 5TRNG to "1". After that, the microprocessor 61 receives the count data.
Reset CCNT to "3" in step P2711.
), received data processing subroutine program 5B172
to return to. In contrast, the judgment in step P2709
If the result is no, the mode answer being received is of word type.
Therefore, the microprocessor 61 performs step P2710.
．． Received data without executing step P2711.
data processing, return to processing subroutine program SB1?2
. Eventually, when the third character is received, the micro
The processor 61 again runs the mode analysis subroutine program.
Starts execution of program 5B252. This time, the judgment result in step P2703 will be no.
, the microprocessor 61 proceeds to step P2712.
It is determined whether the count data is "3". mentioned above
If the mode answer is a string type, the counter
The word data CCNT is set to "3", but the word
If it is a type, it is set to "4", so the micropro
For the processor 61, the judgment result in step P2712 is YES.
data character 2 representing the data length received from the microphone.
The data is transferred to the data counter in the processor 61 and held.
(step P2713), the judgment result of step P2712
If the result is no, the data key representing the first byte of configuration data D is
Character 2 is set as a temporary register in the microprocessor 61.
1 and held (step P2714). these
No matter which process you perform, the microprocessor
The processor 61 steps the count data CCNT by "1".
(Step P2715), and the received data processing sub-table
The process returns to the process program SB172. If the mode answer is a string type, the micro
Processor 61 for received data character 3
Step P2702, Step P2703, Step P
2712, execute step P2714 and save the setting data.
Transfer the data character 3 that represents it to temporary register 1 and save it.
hold Then subsequent data characters are received and again the mode
Assume that the execution of the analysis subroutine program has started.
. This time, the judgment result in step P2702 is YES.
Therefore, the microprocessor 61 goes to step P2718.
advances and stores the received data character in temporary register 1.
This retained data character, along with the lid, can be transferred to the local model.
in the word map 45 (word type) or string area.
Transfer and retain. Next, the microprocessor 61
Check flag 5TRNG to cancel mode during reception.
It is determined whether or not the character is a word type (step P271).
? ). If the mode answer being received is word type
, the judgment result in step P2717 is YES, so
The microprocessor 61 processes the received data characters.
Set the reception notification flag RR to notify the mode change.
Step P2718), the count data CCNT is
2” (step P2719). On the contrary
, if the judgment result in step P2717 is no, the micro
The processor 61 does not execute step P2718.
The process then proceeds to step P2719. After that, the microprocessor 61 again sets the flag 5T.
Check the RNG and check if the mode answer being received is
It is determined whether the current type is the same type (step P2720). vinegar
The judgment result of step P2720 is YES (string tie).
), the microprocessor 61 outputs the count data C
Set CNT to "4" again (step P2721),
Data held in the data counter at step P2713
The length is decreased by rlj (step P2722). Furthermore,
The microprocessor 61 determines whether the received data character is
Step P2 to determine whether the end code is indicated or not.
723), and if the judgment result is no, the received data is immediately
The process returns to the data processing subroutine program SB1?2. In this way, the mode answer being received is
If the data character is
Each time a data is received, step P2702 and step P
2703. Step P271 via step P2712
4 temporarily holds the data character in register 1,
After that, the data cache received in step P2716 is
Data characters temporarily stored in the register
String area of 1 word (2 bytes) along with the vector
to hold. In contrast, the received mode answer
In the case of a board type, the microprocessor 61 is
P 2702. Step P2703, step
P2707 to step P2709, further step P27
12 and received in step P2714
Temporarily hold the data in register 1, and then write one word in P2716.
The data is transferred and held in the local mode map 45 one by one. or
When all the data has been received, the data counter will start counting.
Step P2722), Step P2
Since the judgment result of 723 is YES, the microprocessor
The sensor 61 sets the count data CCNT to "2",
Set the reception notification flag RR (Step P2724)
, then the exit code (address 7) received after that.
FH) is detected in step P2704, and step P27
05. Reception accompanying reception of mode answer via P2706
Ends execution of the data processing subroutine program. Next, run the SSC status check subroutine program.
The detailed procedure of the program 58183 will be explained with reference to FIG.
. In this embodiment, the MSC21 periodically registers the status register.
Read the summary status information of each SSC from the data controller 42,
If the summary status information indicates an abnormality in the SSC,
In order to understand further details, send a mode request to the relevant SS.
C and the detailed scan from its local mode map 34.
Read status information. For this purpose, MSC21
SS during SIF monitoring subroutine program 5BI71
CSS status check subroutine program 1
It has 83. Below is the SSC status checker
Describe the detailed steps of a routine program. SSC status check subroutine program 5B
183 is started in step P2801, the micro
The processor 61 selects 5 as the SSC to be checked.
Specify SC22 (step P2802), and
A summary of the SSC that is subject to a detailed check.
Whether the reception notification flag RR of the status information is “1” or not
is checked (step P2803). If the received notification
If the knowledge flag RR is "0", the judgment result of step P2803
The result is no, and the microprocessor 61 executes step P.
Proceed to 2809, change the ssC to be checked, and check all S
Check for summary status information about SC has finished.
It is determined whether or not (step P2810). MSC21
has finished checking summary status information for all SSCs.
If not, the determination result of step P2810 is NO.
-, and the microprocessor 61 executes step P280.
Return to step 3 and perform steps P2803 to P2810.
The loop to be constructed is
Repeat until you get an error. If step P2
If the judgment result of 803 is yes, microprocessor 6
1 is the summary status information for the SSC to be checked
Reset the reception notification flag RR attached to "0"
Step P2804), the ssC to be checked
GL (ERROR)
bit) is set (step
P2805). The judgment result of step P2805 is YES
If so, the unit under the control of the SSC to be checked.
If there is a relatively minor problem that can be handled by the user,
This indicates that an occurrence has occurred, and the microprocessor 61
Local mode of SSC to be checked
Details related to ERROR bit detected from step 34
Sends a mode request to read status information.
and set it in the communication buffer (step P2806). this
On the other hand, if the judgment result in step P2805 is no,
The above minor trouble has not occurred, so the microprop
Processor 61 does not execute step P280B.
Proceed to step P2807 and check if the
Bit G2 (F
ATAL bit). If FATAL
If the cut is "1", the SS is the target of the check.
An unrecoverable problem has occurred in a unit under the control of C.
Therefore, the microprocessor 61 is FA
in the local mode map 34 related to the TAL bit.
Mode request to access detailed status information
set in the transmission buffer 48 (step P28)
09). In contrast, the determination result in step P2807
If no, the microprocessor 61 executes step P28.
Proceed to step P2809 without executing step 08, and check
Change the SSC to be searched. In this way, all S
Checking of summary status information regarding SC is finished.
So, the judgment result of step 22810 is YES.
, the microprocessor 61 runs the MSIF monitoring subroutine.
Return to program 5B171. In this way, the microprocessor 61
bit, or detailed status related to the FATAL bit.
Preparation to read out task information from local mode map 34
do. The mode thus held in the transmission buffer 48
The request is executed by the above-mentioned transmission request processing subroutine program.
System SB 173 and transmit buffer processing subroutine
Trouble occurs when executing program 5B41
sent to the SC and sent to the module from the SSC where the problem has occurred.
When a code answer arrives, the receive buffer processing subroutine
Program SB31 and received data processing subroutine
Run the program to capture detailed status information. Detailed status information imported into MSC21 in this way
is the trouble check processing subroutine program described later.
System 5B291 analyzes the information and takes necessary action.
. As explained in Figure 17, the main loop
MSIF monitoring subroutine program SB 171~
Polling control subroutine program 5B174 ends.
Once completed, the microprocessor 61 sets the flag 5YSWA.
Check IT to see if the laser printer is processing a job.
, determine whether it is on standby. If on standby, flag 5YS
Since WAIT is set to "1", step P1
The judgment result of 709 is no, and the microprocessor 6
1 executes the MS IF monitoring subroutine program.
Return to 5B171 to On the other hand, flag 5YS
If WAIT is “O”, job processing is possible.
In order to run the program, first set the flag LOOP.
Check whether F is set to "1" (step
Step P1710). Main loop timer processing subroutine program
As explained above, the microprocessor 61
The flag LOOPF is set to "1" for each interval.
Therefore, the judgment in step P1710 is also made if the judgment is YES at regular time intervals.
microprocessor with such positive determination.
The processor 61 flags LOO in step P1711.
Reset PF to "0" and process the job as described below.
After the execution of the subroutine program is completed,
The job processing subroutine program continues until the interval elapses.
prevent the system from running. As shown in Figure 29, the job processing subroutine program
In the RAM, first, the flag JOBACT is "1".
It is determined whether or not there is a flag JOBACT.
It is set to "1" in chip P2908, so it is normally
Immediately after starting the job processing subroutine, step P2902
The result of the judgment is no. Judgment result of step P2902
If the answer is no, the microprocessor 61 performs step P.
Proceed to step 2906 to determine whether there are instructions regarding printing.
Ru. If the judgment result of this step P2906 is no,
Is the microprocessor 61 the upper user system?
Step P
Judge with 2909, and if the judgment result is yes, select it.
Select whether or not to select an external paper feed unit.
Judgment is made in step P2910. If step P2910
If the judgment result is yes, check the flag ENBF.
Steps to determine whether external paper feed unit can be selected
P2911), if the external paper feed unit is selectable (i.e.
That is, ENBF=1), the microprocessor 61 feeds paper
Change the mouth (step P2912). On the contrary,
If the judgment result in step P2910 is no, the micropro
The processor 61 directly proceeds to step P2912, and
If the judgment result of P2911 is no, microprocessor 6
1 is a direct trouble check processing subroutine program
Proceed to 5B291. Furthermore, if the judgment result in step P2909 is no, my
The cross processor 61 is used by users with higher sorter mode settings.
Step P
2913), the judgment result of step P2913 is YES.
Then, the microprocessor 61 executes the flag in step P2914.
Whether the lag ENBS is "1" or not, i.e. the sorter
Determine whether selection is possible. Judgment in step P2914
If the result is yes, the microprocessor 61
Step P2915), Step P29
If the judgment result in step 14 is no, the microprocessor 61
Trouble check without executing step P2915
Executes the block processing subroutine program 5B291. On the other hand, the determination result in step P2913 is no.
The microprocessor 61 also processes job data such as print data.
data is supplied from the upper user system (step
P2916), Trouble check processing subroutine program
Execute program 5B291. Before long, instructions regarding printing, such as operation mode, will be provided to the user system.
If supplied from the system, the judgment result of step P2906 is
Since the answer is yes, change the operation mode etc. to local mode.
write to the map 45 and the global mode map 44 (
Step P2907). Of course, at this time, the transmission request flag TR is also set.
. Thereafter, the microprocessor 61 flags JOBAC.
Set T to "1" and run the trouble check processing subroutine.
Run program 5B291. When the flag JOBACT is set to "1" in this way,
, the judgment result in step P2902 is YES, and my
The processor 61 executes the job sequence (step
Step P2903). After this, the microprocessor 61
is unable to determine whether the above job sequence has finished or not.
Step P2904), the judgment result of Step P2904 is
If yes, the microprocessor 61 performs step P29.
Proceed to 05 and set the flag JOBAC to display the standby state.
Set T to rOJ. After completing step P2905,
Or if the judgment result in step P2904 is no,
, the microprocessor 61 performs a trouble check described later.
The processing subroutine program 5B291 is executed. Trouble check subroutine program 5B291
The detailed procedure is shown in Figure 30, and the trouble check
Subroutine program 5B291 executes step P300
1, the microprocessor 61 checks
5SC22 as a target SSC
P3002), and check targets that have already been imported.
Detailed steps regarding the ERROR bit of the SSC
Whether the reception notification flag RR of the status information is “1” or not
is checked (step P3003). If the received notification
If the knowledge flag RR is "1", the microprocessor 61
is the reception notification flag attached to the detailed status information
Reset RR to "0" (step P3004), continued.
detailed status information in step P3005.
Executes error processing (ERROR processing) based on child
In the ERROR processing, the display of trouble points etc.
It will be done. After this, the microprocessor 61 steps
Proceed to P3006. On the other hand, if the reception notification flag RR is "o", the
The judgment result of step P3003 is no, and the microprop
The processor 61 directly proceeds to step P3006, and the FAT
Reception notification flag for detailed status information regarding AL bits
It is determined whether GRR is "1" or not. If the step
If the judgment result of step P3006 is yes, the microprocessor
The processor 61 sets the reception notification flag in step P3007.
RR is reset to "0", and then step P3008
Proceed to FATAL processing. This FATAL treatment
In the process, there is no indication that the problem is irreversible.
will be carried out. After this, the microprocessor 61 steps
Proceed to P3009. On the other hand, if the determination result in step P3006 is no,
, the microprocessor 61 proceeds to step P3009.
, change the SSC to be checked and check for all SSCs.
Determine whether detailed status information has been checked
(Step P3010). MSC21 becomes all SSC
has not finished checking for detailed status information.
Then. The judgment result in step P3010 is no, and the micro
The processor 61 returns to step P3003 and executes step P3003.
A loop consisting of steps P3003 to P3010 is
Repeat until the judgment result in step P3010 is YES.
Execute the return. In contrast, the judgment in step P3010
If the result is yes, detailed status for all SSCs
The information check has been completed and the microprocessor 6
1 returns to the job processing subroutine program. (Left below) SSC version The hardware configuration of the SSC is roughly shown in Figure 6.
However, the configuration of the transmission buffer 47 and its related circuits is the same as that of the 31st
As shown in the figure. Status as shown
Register 33 (GSTAT-REG), report register
Star 37 (REPO-REG), local mode Matsu
34 (LM-MAP) etc. each frame information.
Information stored in units and searched in advance by MSC21
etc., the address of the information to be supplied to the MSC is in the address buffer.
The data is stored in the file 3101 in units of frames. In this way, the information to be sent and how that information is stored
The addresses are stored in different buffers.
You can In this way, information is memorized in advance.
Since the memory address is searched and held, the MSC
Information is sent from registers etc. in a short time when a transmission request is made from
, convert it to a frame, and then convert it character by character.
Temporarily held in the transmission buffer 3102 and sent to the transmission register.
Macro system interface 27 via 3103
can be sent to. Also, transmission to all SSCs
When a request goes through a cycle and a sending request is received again, the information is lost along the way.
Provides the latest information to MSC21 no matter how many times it is updated.
be able to. However, the status register 33 is directly
Information can be provided to the transmit buffer 3102. This is
Enable status answers to be sent as soon as possible
It's for a reason. Note that in this embodiment, the address buffer 31
The number of addresses that can be registered in 01 is limited to a relatively small number.
This means that the more addresses are registered, the more
The number of reports from SSC increases, and the polling cycle increases.
This is to prevent it from becoming too long. Programs executed by each SSC are explained below.
. Used in the explanation of each program before the program explanation
First, we will explain the meanings of typical flags and the like. - and par - CCNT: Indicates character position in received frame
This is count data, and the microprocessor 6 of the SSC
1 is used when analyzing received data. JOBACT: Indicates that the SSC is processing a job.
flag, and if set in rlJ,
Job processing in progress, waiting if reset to 0
. LOOPF: Controls the cycle of the SSC main loop
If there is a flag and this flag is set to "1",
Indicates that it is time to process the job.
Ru. MSIFS: MSIF monitoring subroutine program execution
This is a parameter that indicates the row stage, and is a value from "0" to "3".
Set to one of the following values. 5TOPF: Forced termination request flag for job control processing.
Ru. 5YSWAIT: Execution prohibition flag for job control processing. TYPE: A flag indicating the type of mode set,
Set to “1” for string type mode set.
will be played. Figure 32 of ROHM shows the schematic structure of the program executed in SSC.
This is a flowchart diagram showing the
The SSC runs the main routine that starts running on power-up.
program and three mutually independent interrupt programs.
It consists of grams. First, when the power is turned on, a power-on event occurs and the EV
I, the microprocessor 61 (hereinafter referred to as
(simply referred to as microprocessor 61) will be described in detail later.
Execute SSC initialization subroutine program 5B501
Then, MSTF processing subroutine program 5B5
Execute 02. This MSIF processing subroutine program
The procedure for RAM 58502 will also be described in detail later. MSI
Determine the completion of the F processing subroutine program (step
P3201), the microprocessor 61 performs job processing.
Main loop timing indicating executable subroutine
Step P3202) to determine the arrival of the main loop.
When the arrival of job processing timing is detected, the job processing subroutine is executed.
Execute Chin program 5B503. Such MSIF
Processing subroutine program 58502 ~ Job processing service
The loop composed of routine program 5B503
During execution, the interrupt timer 66 of each SSC is set for a predetermined period.
When timing ends, timer interrupt event EV12
occurs, and the microprocessor 61 interrupts the main loop tie.
main loop timer processing to control the occurrence of
First execute the management subroutine program 5B504, and then continue.
job control timer processing subroutine program
Execute 5B505 and when a timer interrupt event occurs
Return to the main routine program step. Receiving
The signal interrupt event EV13 is the receive register of the SSC.
Occurs when latches one character, and the frame analysis
Processing of received data, including sending answers to and MSC
The sub-routine program 5B506 is executed. one
On the other hand, the first character in the transmit register 3103 of the SSC
data is sent to the macro system interface 27.
, a transmission interrupt event) EV14 occurs, and a transmission interrupt event occurs.
(event) Due to the occurrence of EV14, the transmission data processing sub
Routine program 5B507 is executed. This send
In the data processing subroutine program 5B507, S
The frames in the SC transmission buffer 3102 are sequentially macro-framed.
It is sent to the system interface 27. That's all, SS
I have explained the outline of the program executed in C, but below,
Detailed procedures for each program will be explained. Figure 33 shows the detailed procedure of the main routine program.
It is a flowchart diagram, and the main routine program is
As mentioned above, it starts with the occurrence of power-on event Ev1.
, First, initialize the internal circuit of the microprocessor 61.
Step P3302), then local mode
Domap 34°Global mode map 35 and frame
Clear each register 32 (step P3
303). After that, the microprocessor 61
G5 bit of status register 33 (NOT READY)
bit) is set to "1" and initialization is being executed.
shows. Next, set flag 5YSWAIT to "1"
step P330 to prohibit execution of job control processing.
5), set the parameter MSIFS to "0" and continue
MS IF monitoring subroutine program 5B511
Prepare for execution (step P3306). Furthermore, ma
In step P3307, the microprocessor 61
Set the in-loop timer and set the main loop timer
This allows for errors to occur. After completing this series of preparations,
Then, the microprocessor 61 sets the interrupt enable flag.
set to enable the various separations described above (step
P3308). In this way, SSC initialization subroutine program 5
When B501 is completed, the microprocessor 61
IF monitoring subroutine program 5B511, and
Then, execute the transmission request processing subroutine program 5B512.
Execute sequentially. The MS IF monitoring subroutine program 5B511 is
In step P3400 as shown in FIG.
The microprocessor 61 of the SSc
Reset command from MSC21 in step P3401
Determine whether the code (RESET) has already been supplied.
The MSIF monitoring subroutine shown in Figure 18
Please refer to step P1813 of the program @) and its judgment result.
If the result is no, proceed to step P3407 and set the parameter MS
Determine whether IFS is set to "1". The parameter MSIFS is set to “
0", so initially step P340
The judgment result of step 7 is no, and the microprocessor 61
Further, the process advances to step P3411, and the parameter MSIFS
is "2". Step P3411
However, at first, the result of that judgment will be no, so micro
Processor 61 immediately returns to the main routine program.
Return. Eventually, the MSC21 karari set command was provided.
If the answer is yes, the judgment result in step P3401 will be YES.
Therefore, the microprocessor 61 executes step P340.
Proceed to step 2 and check the import confirmation attached to the reset command.
Reset the authorization bit Q to "0". As a result, the MSC
21 becomes capable of transmitting the next command. In addition, reset
The status answer for the command is sent by the receive data processing service.
Because it is done in routine program 58506
, the main routine program contains information regarding status answers.
No processing is performed. Next, the microprocessor 61
sets bit 05 of the status register to “1”.
step P3403), then flag 5YSWAIT
is “0” (step P 340
4). Flag 5YSWAIT is set to "
1, so the MS IF monitoring subroutine
If the chin program is not completed, step P3404
The result is usually no. Therefore, micropro
Processor 61 executes step P3405 without executing step P3405.
Proceed to step P3406. However, SSC has already
If a reset command is received during operation, the flag
5YSWAIT is reset to “0”, so the
The microprocessor 61 flags 5 in step P3405.
Set TOPF to “1” to forcefully stop job processing.
After stopping, the process advances to step P3406. Flag STO
, PF is reset to rOJ when job processing is interrupted.
will be played. In step P3406, the parameter MSIFS is set to rl
J, and in the following step P3407 the parameter M
Determine whether SIFS is "1". If para
If the meter MSIFS is ``0'', the microprocessor
The processor 61 determines step P3407 as NO, and proceeds to step P3407.
Return to the main routine program via step P3411.
Ru. On the other hand, if the parameter MSIFS is "1"
, the judgment result in step P3407 is yes, so my
The flag 5TOPF of the macroprocessor 61 is “0”.
If the judgment result is no, the microprop
Processor 61 passes through step P3411 to the main route.
Return to the current program. In contrast, after job processing is interrupted, the flag
Flag 5, such as when 5TOPF is reset to "0"
If TOPF is "O", the microprocessor 61 is
is detected in step P3408 and the judgment result (YES
) to initialize the local mode map 34.
Ru. In this way, the local mode map 34 is initialized.
When the microprocessor 61
The information transmission request flag TR held in the push button 34 is
Set to "1" and notify the contents to MSC21
Make preparations (step P3409). Send it like this
The information for which the transmission request flag TR is set is the transmission request flag described later.
request processing subroutine program SB512, transmission data
M by executing the processing subroutine program 5B507.
It is sent to SC21. After this, the microprocessor 61 performs step P3410.
and rl flags 5YSWAIT and MS IFS respectively.
J, set it to “2” and proceed to step P3411 to
whether the parameter MSIFS is set to "2" or not.
to decide. If the judgment result in step P3411 is no
, the microprocessor 61 runs the main routine program.
If the judgment is yes, step
Proceed to step P3412 and display all items in local mode map 34.
It is determined whether all information has been sent to the MSC 21. If the judgment result in step P3412 is no, the microprocessor
Processor 61 returns to the main routine program and
If the judgment result is YES, proceed to step P3413 and perform the
Set the parameter MSIFS to "3" and
05 bit (NOT READY) of the status register
Reset to "0". After this, microprocessor 6
1 by resetting flag 5YSWAIT to “0” (switching
Step P3414) Return to the main routine program
Ru. Therefore, the information stored in the local mode map 34 is
until all information contained in the file has been sent to the MSC21.
Lag 5YSWAIT remains 'l' and job processing is not executed.
lines will be prohibited. Next, referring to FIG. 35, the transmission request processing subroutine routine will be explained.
The procedure of program 5B512 will be explained. The transmission request processing subroutine program 5B512 is MS
Main routine jump from IF monitoring subroutine 5B511
Immediately after returning to the program, go to step P3501.
First, there is free space in the address buffer 3101.
It is determined whether there is one (step P3502). address
If there is no space in the buffer 3101, the microprocessor
The sensor 61 determines step P3502 as no and immediately
Return to the main routine program and move to the step if there is space.
If P3502 is judged as yes, local mode Matsu
The transmission request pin attached to the information held in the
) Search for TR (step P3503). If specific
The transmission request flag TR is displayed in the local mode map 34 of
If there is no information set to 1, the microprocessor
61 determines step P3504 as NO and returns to step P.
Proceed to 3508, and conversely, if the judgment result is yes, the current
Information for which the transmission request flag TR is set to "1"
The address has already been registered in the address buffer 3101.
It is determined whether or not there is one (step P3505). if,
The address has already been registered in the address buffer 3101.
If so, the microprocessor 61 executes step P3505.
is judged as no and proceeds to step P3507, and on the contrary, if the
If it is registered, the microprocessor 61 performs step P3.
Proceeding to 506, the address is stored in the address buffer 310.
Register to 1. In this way, we proceeded to step P3507.
The microprocessor 61 sets the transmission request flag TR.
All local mode map 3 for address registration of information
Determine whether or not 4 has been completed, and the result of that determination is
- If so, return to step P3503 and the judgment result is YES.
If so, proceed to step P350B and write the address buffer again.
It is determined whether or not there is space in the space 3101. Step P
If the judgment result of 3508 is no, the main routine program
If yes, proceed to step P3509.
nothing. The microprocessor 61 proceeds to step P3509.
to determine whether there is a report to be sent to the MSC21.
cut off If the judgment result in step P3509 is no,
Then, the process proceeds to step P3512, and conversely, the judgment result is
If yes, the microprocessor 61 performs step P35.
10, the address of the memory that stores the above report
Determine whether the response is not registered in the address buffer 3101
do. If the address is already registered, the microphone
The processor 61 proceeds to step P3512, and vice versa.
If not registered, enter the above address in step P3511.
Step P3 after registering in address buffer 3101
Proceed to step 512. In step P3512, first, the local mode
Address “OCH” on map 34 (see Figure 14)
to determine whether it is in report mode and start reporting.
If the mode is not set, the main routine program is immediately executed.
If it returns and is in report mode, the stream to be sent to MSC12.
Determine whether there is a status (step P3513
). If there is no status to send to MSC21,
immediately returns to the main routine program, and if
If there is a status like this, proceed to step P3514.
The address of the memory that stores the status is added.
Determine whether it is unregistered in Resbuff y3101
. If it is already registered, the main routine will be started immediately.
Return to the program, and on the other hand, if it is not registered, the address
is registered in the address buffer 3101, and then the main route
Return to chin program. Returning to Figure 33 again, the steps for the main routine program are shown.
Continue explaining the order. Transmission request processing subroutine program
Return to main routine program from program 5B512
, the microprocessor 61 sets the flag 5YSWAIT.
Check and reset the flag 5YSWAIT to “0”.
(Step P3309)
. If flag 5YSWAIT is set to "1"
If this is the case, initialization is still in progress and the microprocessor is still being initialized.
The processor 61 again executes the MS IF monitoring subroutine block.
Execute program 5B511. On the other hand, flag 5
If YSWAIT has already been reset to "0",
The microprocessor 61 has the flag LOOPF set to "1".
Step P3310 to determine whether it is set or not.
), if the result is no, the main loop tie
Since the timing has not yet arrived, the MSIF monitoring subroutine program
Run Gram 5B511 again and check the main loop timing
wait for the arrival of If the main loop timing arrives
Then, the judgment result in step P3310 becomes YES.
Therefore, the microprocessor 61 goes to step P3311.
Proceed and reset the flag LOOPF to "0" for the next
Execute job processing until main loop timing arrives
prohibit. After executing step P3311, the microprocessor 61
executes a series of job processes to print the specified image on the print paper.
Enable to form an image (steps P3312~
Step P3313). In this way, the microprocessor
The server 61 is a subroutine in the main routine program.
The loop consisting of program 5B511 to P3313 is
Execute repeatedly. Next, execute when timer interrupt event (EV12) occurs
Hand of subroutine program 5B504.505
Please refer to Figure 36 for the order of main loop timer processing.
When the physical subroutine program 5B504 is started,
The microprocessor 61 is the main processor in step P3601.
Increments the value of the loop timer and returns the incremented main loop.
The value of the loop timer indicates that the main loop timing has arrived.
It is determined whether the value has been reached (step P3602). If the judgment result in step P3602 is no, my
The processor 61 proceeds to step P3604 and
If the judgment result is yes, set the flag LOOPF to "1".
” to enable job processing and main loop type.
Set the initial ltn value to the marker and start the main loop timing again.
(Step P3603)
. Next, the microprocessor 61 operates a sequence timer.
The process is executed in step P3604, and then the report
Determine whether mode is selected (Step P 3605
). If not in report mode, the microprocessor
The processor 61 proceeds to step P3611 and, on the contrary, reports
If it is in the address mode, proceed to step P3606 and
The address information of the data to be sent to the buffer 3101 is
Determine whether it exists or not. If the address buffer 310
If 1 does not have the above address information, the microprocessor
61 immediately proceeds to step P3611, and on the contrary, the add
If there is address information in the response buffer 3101, step
Proceed to P3607 and check that there is data in the transmission buffer 3102.
Determine whether or not. If the data in the transmit buffer 3102 is
If there is no data, the microprocessor 61 proceeds to step P.
Proceed to 3611, and if there is data, proceed to step P36
Proceed to step 08 and write the address in the address buffer 3101 (
The data is stored in the memory location specified by the specified address below.
The stored information is converted into a frame and sent to the transmission buffer 3.
102. In this way, the transmit buffer 310
The information held within 2 is the transmission interrupt event) EV,
Transmit data processing subroutine program when 14 occurs.
By executing 5B507, the macro system interface
It is sent to step 27. The microprocessor 61
After transferring the information to the sending buffer 3102 in
, delete the specified address from the address buffer 3101.
except step P3609), the data stored in the specified address is
The transmission request bit TR attached to the information is set to ``0''.
”. In this way, it is held in the address buffer 3101.
The information specified by the specified address is now ready to be sent.
Then, the microprocessor 61 proceeds to step P3611.
Proceed to determine whether there is information being transmitted. If sending
If the microprocessor 61 has the information, the microprocessor 61 immediately
The program that was running when the interrupt event occurred
On the other hand, if there is no information being sent, the sending buffer
Determine whether there is space in the file 3102 (step
P3612). If there is still some data in the send buffer 3102,
When the information is held, the microprocessor 61
is the program immediately upon the occurrence of a timer interrupt event.
, and if there is free space in the transmission buffer 3102, the transmission is scheduled.
Transfer the specified information to the transmission buffer 48 (step P3
613). After that, the microprocessor 61 issues a timer interrupt.
Return to the program at the time the event occurred. Next, the received data processing subroutine program 5B50
6 will be explained in detail with reference to FIG. Reception discount
When a write event occurs, the microprocessor 61
takes the character from the receive register 46 (step
P3701), determines whether a reception error has occurred (
Step P3702). If a reception error occurs,
If so, the microprocessor 61 executes step P3703.
Proceed to and execute the specified error handling, and no reception errors occur.
Sometimes, the step P3703 is not executed.
Proceeds to step P3704 and the count data CCNT is set to “0”.
Determine whether or not. As previously explained, the frame
At the start of frame reception, the count data CCNT is “0”.
Therefore, the judgment result in step P3704 is YES.
, the microprocessor 61 identifies the received character as an ID.
Determine whether it is a character (step P370
5). Even though the count data CCNT is "0"
However, the received character is not an ID character.
If it is determined that an error may have occurred during communication.
Therefore, the microprocessor 61 cancels further processing.
Immediately restarts the program that was running when the receive interrupt event occurred.
Return to Gram. In contrast, step P3705
The character received is determined to be an ilD character.
If the ID character is
data ID and area code respectively.
S, import as IDU and count data CCN
T is set to "2" (step P3706). Konoyo
Unisite, data IDS. Once the IDU is formed, the microprocessor 61
The character received based on the data IDS has a specific SSC.
Determine whether it is targeted (Step P3707
). If the judgment result in step P3707 is no,
The frame being received is the global mode of MSC21.
Since it is commonly sent from step 35 to all SSCs,
The microprocessor 61 immediately receives an interrupt event.
Return to the program that was running at the time of occurrence. to this
On the other hand, if the judgment result in step P3707 is YES,
The microprocessor 61 allows the received character to identify itself.
Step P to determine whether the message was sent as a target or not.
3708), and if the judgment result is yes, the reception is assigned immediately.
Return to the program that was running when the error occurred. child
In contrast, if the received character targets another SSC
If so, the microprocessor 61 executes step P3.
709 in preparation for receiving a frame that targets itself for transmission.
to initialize the count data to “0” and then
return to the program that was running when the event occurred
do. The received frame targets itself for transmission, and
In the case of a data request (step P3710), 1
Since it is a character frame, status/command processing support is
Execute routine 5B521. On the other hand, the determination result in step P3704 is no.
In this case, the microprocessor 61 executes step P371.
Step 1, the received character is a data character.
Determine whether it exists or not. If the judgment in step P3711
If the result is no, the received character is an ID character.
Therefore, the microprocessor 61 performs step P370.
Proceed to step 6 and perform the steps P3706 to P371 above.
Execute 0. In contrast, the received character
If it is a data character, the microprocessor 61 accepts it.
The frame being transmitted is a mode set or mode request.
It is determined whether or not (step P3712). If Ste.
If the judgment result of step P3712 is no, the frame being received is
Since the command is a sequence command, the microprocessor 6
1 is the status/command processing subroutine program
58521, and conversely, execute the judgment in step P3712.
If the result is YES, the microprocessor 61
The frame being received by P3713 is a mode request.
Determine whether it exists or not. If the frame being received is
If it is a request, the judgment result of step P3713 is
The microprocessor 61 issues a mode request.
Execute the client processing subroutine program 5B523. On the other hand, the judgment result in step P3713 is no.
Since the frame being received is a mode set, the micro
The processor 61 is a mode set processing subroutine program.
Run ram 5B522. These three subroutines
The program procedure is detailed below. First, the status/command processing subroutine program
The detailed procedure of the program 5B521 will be explained with reference to FIG.
. Status/command processing subroutine program
Starting at step P3801, microprocessor 6
1 indicates that the frame being received in step P3802 is a stator.
Determine whether or not the request is a request. If receiving
If the frame is a sequence command, step P
The judgment result of 3802 is no, and the microprocessor
61 indicates whether the count data CCNT is "3" or not.
A judgment is made (step P3803). If the data character l following the ID character is received,
If so, the count data is “1”, so the step
The judgment result of step P3803 is no, and the micropro
The processor 61 stores the received data characters in a temporary register.
1 and set the count data to “3” (step
P3804) L/te received data processing subroutine program
Return to Ram 5B506. In contrast, data cache
When the controller 2 is received, the count data CCNT
is set to "3" in step P3804, so
Microprocessor 61 answers step P3803 as YES.
It is judged that the process proceeds to step P3805, and the
The command is transferred from the command register 32 to the microprocessor.
is supplied to the server 61 to determine whether or not the process has been executed.
. If the processing between the previous command has already been executed
(confirmation beep) Q has been reset to “0”.
), the judgment result of step P3805 will be YES.
, the microprocessor 61 proceeds to step P3806.
along with data character 1 that was temporarily held in the register.
Data character 2 received in the command register 32
supply and hold. In contrast, step P380
If the judgment result in step 5 is no, the microprocessor 61
Step P3 directly without executing step P3806
Proceed to 807. Next, the microprocessor 61
Step P3807 determines whether the mode is report mode or not.
If the judgment result of step P3807 is no, the microprocessor
The processor 61 proceeds to step P3812. On the contrary,
If the judgment result in step P3807 is YES, the micro
The processor 61 is held in the status register 33.
Please set the information transmission request flag to “1”.
address buffer 3101), then the address buffer 3101 is empty.
It is determined whether there is any time (step P3809). too
If there is no space in the address buffer 3101, the My
The processor 61 proceeds to step P3812 and adds
If there is space in the response buffer 3101, step P38
Access information whose transmission request flag was set to “1” in 08
Register the dress (Step P3810) Step P3
Proceed to 812. On the other hand, the judgment result in step P3802 is YES.
If so, the microprocessor 61 is in polling mode or not.
step P3811), and the result of that judgment is
- If so, proceed to step P380B. On the other hand, Ste.
If the judgment result of P3811 is YES, micropro
The processor 61 is a polling answer processing subroutine program.
The program executes RAM 5B531 and proceeds to step P3812. In step P3812, the count data CCNT is
0” and executes the next received data processing subroutine.
In preparation for program execution, then the incoming data processing sub
Return to routine program. The above polling answer processing subroutine program 5B
The detailed procedure of 531 is shown in Figure 39, and this sub
The routine program 5B531 goes to step P3901.
Start. Microblossom sensor 61 is step P3
The process advances to 902 and is held in the status register 33.
The transmission request flag TR of the information is reset. continue
, the address of the information to be sent to the address buffer 3101
Step P390
2) If the address is not registered, the microphone
When the frame continuation bit N is “0”,
Sends the status answer to the transmission buffer 48 and transmits it.
Prepare for communication (step P3904), like this
, the status answer with frame continuation bit N is “0”
When the transmission preparation is completed, the microprocessor 61
The process advances to step P3915. In contrast, it should be sent to the address buffer 3101.
If the address of the information is registered and step P3903
If the decision is yes, the microprocessor
61 is a status attribute whose frame continuation bit N is “1”.
supply the sensor to the transmission buffer 3102 to prepare for transmission;
(Step P3905), then Step P390
Sequence report to address buffer 3101 at 6
Determine whether or not the address is registered. if,
If the sequence report address is registered,
The address of the sequence report is stored in address buffer 3.
101 and in the report register 37.
Send request file attached to retained report information
The lag TR is reset (step P3907). this
After that, the microprocessor 61 stores the information to be transmitted.
address is registered in the address buffer 3101.
Step P3908)
If the determination result of step P3908 is no, the frame continuation bit is
Send sequence report with bit N “0” to buffer 3
Step P3909)
, On the other hand, if the judgment result of step P3908 is YES, then
, sequence report where frame continuation bit N is “1”
is supplied to the transmission buffer 3102 to prepare for transmission (step
Step P3910). Next, the microprocessor 61 uses the address buffer 31
01 to check the string type model to be sent.
Determine whether the address of the address is registered or not.
(Step P3911). If it is registered, the microprocessor 61
address from the address buffer 3101 and
Transmission request bit attached to the information composing the door answer
TR is reset (step P3912). After that
, the microprocessor 61 is in string type mode.
The answer is supplied to the transmission buffer 48 and held, and the transmission is ready.
Complete preparations. After this, the microprocessor 61 terminates
The code is sent to the transmission buffer 3102 and held there. In this way, in this example, the string type mode
For answers, send all their data characters
Add end code before storing in buffer 3102
do. This is because string type mode answers are usually
Since it consists of many data characters, all can be processed at the same time.
If you process multiple responses, it will take a long time for one response and other
This is because communication with the SSC becomes slow. On the other hand, the judgment result in step P3911 is no.
, the microprocessor 61 uses the address buffer 310
Check 1 and enter the word type mode answer address.
Determine whether the device is registered and if
If the address is not registered, the microprocessor 61 immediately
Proceed to step P3915, and conversely, type the word type.
If a mode answer is registered, first
is deleted from the address buffer 3101 and the word type is
The transmission request attached to the information that constitutes the mode answer
Bit TR is reset (step P3917). child
After that, the microprocessor 61 enters the word type mode.
The answer is sent to the transmission buffer 3102 and held, and then
If the address of another word type mode answer is
Determine whether it is registered in the response buffer 3101
(Step P3919). If the address of the pond is registered,
If recorded (i.e., if the decision is no), then
The microprocessor 61 returns to step P3917 again.
and continue until the judgment result in step P3919 is YES.
A rule consisting of step P3917 to step P3919
Repeatedly execute the loop, and check the judgment result of step P3919.
is YES, the microprocessor 61 steps
Proceed to P3914 and send the end code to the buffer 3102
supply to. In this way, the file held in the transmission buffer 3102
The frame has one character in step P3915.
transfer from the transmit buffer 3102 to the transmit register 3103.
status/command processing subroutine program
Proceed to step P3812 of RAM 5B521. thus
, the characters held in the transmission register 3103 are transmitted.
To execute the data processing subroutine program 5B507
It is sent to N5C21. Next, mode set processing subroutine program 5B5
The procedure of step 22 will be explained with reference to FIG. mode set
The cut processing subroutine program 5B522
When started in P4001, the microprocessor
61 first checks the count data CCNT,
Therefore, whether the value of count data CCNT is "5" or not.
(Step P4002). data character
When receiving 1, the count data CCNT is normally ``2''.
Since the determination result in step P4002 is
becomes no. Therefore, the microprocessor 61
Proceed to step P4003 and count data CCN again.
Check T and determine whether its value is "2" or not.
Ru. When data character 1 is received, the count data
CCNT should be set to "2" as mentioned above.
Yes, the determination result in step P4003 is YES. For mode set, data character 1 is the map address.
Since it is assigned to address M, the microprocessor
61 proceeds to step P4004 and enters the map address M.
0, which is transferred to the address register and held, then the count
Set data CCNT to “4” and reset flag TYPE.
Set (step P4005). Next, step P
Map address held in address register in 4004
Whether or not the string area 36 is specified by referring to
(Step P4006). If step
If the result of P4006 is yes, the microprocessor
The server 61 proceeds to step P4007 and stores the count data C.
Set CNT to "3" and set flag TYPE to r.
Set it to lJ to start the received data processing subroutine program.
Return to Ram 5B506. On the other hand, step P
If the judgment result of 4006 is no, microprocessor 6
1 is received data without executing step P4007.
The process returns to the processing subroutine program 5B506. or
Then data character 2 is received and the mode set processing
When routine program 5B522 starts, the step
P4002. Judgment result of step P4003 is yes
Since both of the deviations are negative, the microprocessor 61
Proceeding to step P4008, count data CCNT is "
3". As described above, step P40
05 to step P4007, the string data is
In the type mode set, the count data CCNT is “
3”, and “4” in word type mode set.
Since each frame is set, the frame being received is
If the mode is set to type
Result is yes, judge if word type mode set
The result is no. Also, the frame being received is streamed.
If it is a mode set of type
Since it represents the data length, the microprocessor 61
Transfer data character 2 to data counter and hold it.
(Step P4009). After this, the microprocessor
The server 61 proceeds to step P4011. On the other hand, the reception
If the frame being transmitted has a word type mode set, the
Since data character 2 is the first byte of configuration data,
The microprocessor 61 reads the received data character 1.
Temporarily hold in register 1 (step P4010), counter
Increments the count data CCNT by "1" (step P4
011). Any type of microprocessor
The processor 61 processes the received data after executing step P4011.
The process returns to the management subroutine program 5B506. Eventually, when data character 3 is received, the string
In case of mode set of type, count data CC
Since NT is "4", step P4002, step
PuP 4003. The judgment result of step P4008 is
If the answer is NO in both cases, data capture is performed in step P4010.
After holding the data counter 3 in the temporary register, the data counter
Step CCNT by “1” and enter the received data processing subroutine.
Returns to the program 5B506. In contrast,
For mode sets of type code and data characters.
If the string type mode set receives the
If so, the judgment result in step P4002 becomes YES.
Therefore, the microprocessor 61 processes the received data character.
The last received data held in the vector and temporary register 1.
Retain data characters as configuration data (step
P4012). In the process of this step P4012
For word type mode sets, the local mode
The string type model is
In the case of a code set, it is set in the string area.
It turns out. Next, the microprocessor 61
Flag TY whether the frame is a string type
Judgment is made with reference to PE, and if the judgment result is no (all
In other words, the word type) has a reception of data character 3.
Since the reception has been completed, proceed to step P4017.
Initializes the count data CCNT to "0" and
Reception of setting data stored in local mode map 34
Set the notification flag RR to "1". On the contrary,
If the mode set being received is a string type, the step
The judgment result of P4013 is YES, and the micropro
The processor 61 steps to set the count data to “4”.
P4014), data held in the data counter
The length value is decreased (step P4015). like this
As a result of reducing the data length value, all configuration data
It is determined in step P4016 whether or not the
However, if the judgment result in step P4016 is no, immediately accept the
Return to communication data processing subroutine program 58506
However, on the other hand, if the judgment result in step P4016 is YES.
, the microprocessor 61 outputs count data CCNT.
is set to "0", and the reception notification flag of the received configuration data is displayed.
Set RR to "1". After that, the microp
Processor 61 is a received data processing subroutine program.
Return to 5B506. Next, the mode request subroutine program steps
will be explained with reference to FIG. mode request sub
Routine program 5B523 is step P 4.10
1, and in step P4102 the address buffer is
The file 3101 is searched first. Based on this search,
The processor 61 uses the received data characters to
The map address M represented by
Step P41 to determine whether it is unregistered in 101.
03), if it is already registered in the address buffer 3101.
If so, the judgment result in step P4103 will be no.
Therefore, the microprocessor 61 executes step P4107.
Go to , set the count data to "0" and receive the received data.
Return to the processing subroutine program. On the contrary
, if the map address M is not registered, step P4
Since the judgment result of 103 is yes, the microprocessor
The processor 61 checks whether there is space in the address buffer 3101.
Step P4104), if there is a vacancy
For example, address map address M in step P4105.
After registering in the buffer 3101, proceed to step P4107.
move on. On the other hand, the determination result of step P4104 is
If no, the microprocessor 61 uses the map address M
Set the transmission request flag TR of the information specified in
After that, the process advances to step P4107. Step P41
In 07, as mentioned above, the count data CCNT is
0", and then the microprocessor 61 receives
Execute data processing subroutine program 5B506.
Ru. Referring again to FIG. 33, the transmission request processing subroutine
Microprocessor 61 returned from Gram SB512
The flag 5YSWAIT is set in step P3309.
Check that SSC initialization has been completed (SYS
WAI T=0). Flag 5YSWA
IT is MSIF monitoring subroutine program 5B511
It is reset to "0" in step P3414 of
Therefore, if initialization is not completed yet, step P
The judgment result of 3309 is no, and the microprocessor
61 uses the MSIF monitoring service to continue SSC initialization.
Rerun the routine program. In contrast, the first
If the initialization has been completed, the judgment result of step P3309
becomes YES, and the microprocessor 61 sets the flag LO.
Check the OPF and the main loop timing has arrived.
(LOOPF=1). If,
If the in-loop timing has not arrived, the microprocessor
The server 61 is the MS IF monitoring subroutine program 5B.
511, and on the other hand, the main loop timing has arrived.
If so, reset the flag LOOPF to "0"
Then, job processing subroutine step P3312,...
- Execute step P3313. The procedure of the job processing subroutine program is shown in Figure 42.
This subroutine program is shown in step P.
Starting at 4201, the microprocessor 61
, first, the flag JOBACT is set to "1" and the SSC
Determines whether the device has been removed from the standby state (step
P4202). Flag JOBACT is at step P4
Since it is set to "1" in 208, a series of job processing
At the beginning of the process, the determination result in step P4202 is NO.
, the microprocessor 61 executes step P4203.
The command is held in the command register 32.
Determine whether or not. If step P4203
If the judgment result is no, the microprocessor 61
Proceed to step P4204 and display local mode map 34 and group.
Is there a received frame in the global mode map 35?
It is determined by searching the reception notification flag RR. if,
If the judgment result in step P4204 is no, the microprocessor
The processor 61 is a trouble check subroutine program.
Proceeds to step P4204, and conversely proceeds to step P4204.
If the result is YES, the information that makes up the received frame
Step to reset the reception notification flag RR to "0"
P 4205), followed by a module related to the received frame.
The internal processing of the code is executed (step P4206). child
After that, the microprocessor 61 performs a trouble check subroutine.
Proceed to routine program 5B541. Eventually, the command will be held in the command register 32.
, the judgment result in step P4203 is YES, and the master
The microprocessor 61 takes in the taken commands.
Step P42 to reset the confirmation bit Q to "0".
07), then set the flag JOBACT to "1".
(Step P4208). Process the job like this
When the preparation is completed, the microprocessor 61
Busy register set in the mode map 34
Set the job processing bit on the controller (BUSY-REG).
Trouble check step P4209)
Execute the program 5B541. As mentioned above, the flag JOBACT is set to "1".
When the next job processing subroutine program is executed,
At the time of execution, the judgment result of step P4202 becomes YES.
, the microprocessor 61 in step P4210
Determine whether flag 5TOPF is “0” or not.
If the judgment result is yes, the job processing is forcibly stopped.
is not requested, so the microprocessor 61
local mode map 34, global mode map 35
The information held in the command register 32 and the information held in the command register 32
Aims to achieve the specified function according to the commands provided.
. If the series of job processing is completed, step
Since the judgment result of P4212 is YES, the microprop
The processor 61 should set the flag JOBACT to “0”.
Step P4213), in the local mode map 34
Reset the job processing bit in the busy register that was set.
Set (step P4214). microprocessor
After this, the trouble check subroutine program
Run the program. On the other hand, if the determination result in step P4210 is no,
, step P42 to execute the job stop sequence process.
15), job processing is completed in step P4216
decide whether or not. If job processing has stopped
If so, the microprocessor 61 sets flag 5TOP.
Set F to "0" once, then trouble check sub.
Execute the routine program and stop job processing.
If not, do not execute step P4217.
Execute the trouble check subroutine program
. The trouble check subroutine program is shown in Figure 43.
Starting at step P4301 as shown, the master
The microprocessor 61 is located in the local motor map 34.
Set error register (ERROR-REG)
and check the errors held in the error register.
- Check whether the information has a value of “0” indicating that no error has occurred.
A judgment is made (step P4301). If the error information
If the value "l" indicates that an error has occurred, the microprocessor
The processor 61 sets the 01 bit of the status register 33 to “
1" (step P4303), on the contrary, the error
If the information indicates that no error has occurred with the value “o”, the
Reset bit 01 of status register 33 to “0”
(Step P4303). Like this the status bar
Bit 01 of register 33 was manipulated according to the error information.
After that, the microprocessor 61 uses the local mode map 3.
Fatal register (FATAL) set in 4
- The fatal information in REG) indicates that no serious accident has occurred.
ro” is set (step
P4304). If the fatal information is ``1'' and
If it indicates that a major accident has occurred, the microprocessor 61
is bit 02 (FATAL bit) of status register 33.
Step P4306) should be set to "1".
On the other hand, fatal information indicates that no serious accident has occurred at the value rOJ.
If so, set bit 02 of status register 33.
rO” (step P4305). This way
02 bit of status register 33 is set as fatal.
After operating according to the information, the microprocessor 61
The busy level set in the local mode map 34
Busy information in register (BUSY-REG) is commanded.
The value rOJ is set to indicate the non-execution of operations that involve changing the mode or changing the mode.
(Step P4307)
. If the busy information is ``1'' and the above command or mode
If it indicates that an operation is being executed due to a code change, the microprocessor
The processor 61 uses the 64 bits (B
Set the US Y bit) to "1" in step P.
4309), on the other hand, the busy information is 0 and the operation is disabled.
If execution is indicated, 64 bits of status register 33
reset to "0" (step P4308). In this way, the 64 bits of the status register 33 are read.
After operating according to the microprocessor 61
is the knot set in the local mode map 34.
The node in the ready register (NOTREADY-REG)
The set ready information is set to the value “0” indicating completion of initialization.
It is determined whether or not (step P4310). too
Then, the not ready information has a value of “1” indicating that initialization is being executed.
If so, the microprocessor 61 registers the status register.
Star 33 (7) G 5 bits (NOT READY bit)
Step P4312) should be set to "1".
On the other hand, the not ready information indicates the end of initialization with the value "o".
If so, set bit 05 of status register 33 to “
0'' (step P4311). like this
The 05 bit of status register 33 is set to not ready.
- After operating in accordance with the information, the microprocessor 61
Return to the job processing subroutine program.

[Brief explanation of the drawing]

FIG. 1 is a claim correspondence diagram of the present invention; FIG. 2 is a block diagram showing a macro system configuration of an embodiment of the present invention; FIG. 3 is a block diagram showing a logical address space set in a slave processing unit; FIG. 4 is a block diagram showing the relationship between the functional blocks in the master processing unit and the logical address space managed by the master processing unit, and FIG. 5 shows the communication network realized in the laser printer according to one embodiment. 6 is a block diagram showing the hardware configuration of the MSC, FIG. 7 is a timing chart explaining the communication method of one embodiment, and FIG. 8 shows the structure of a frame composed of multiple characters. Block diagram; FIG. 9 is a format diagram explaining the bit structure of each character; FIG. 1O is a format diagram showing the bit structure of the ID character; FIGS. 12 is a block diagram illustrating SSC break detection when information is transmitted across multiple frames, and FIG. 13 is a format showing status information assigned to each bit of the status register. Figure 14 is an address map diagram explaining detailed status information in the SSC standard mode map allocated to a part of the local mode map, and Figure 15 is a modification of the embodiment in which report mode and polling mode are mixed. 16 is a flowchart showing the overall configuration of the program executed by the MSC, FIG. 17 is a flowchart showing the execution procedure of the main routine program executed by the MSC, and FIGS. 18A to 18B are Figure 19 is a flowchart showing the steps of the system update subroutine program; Figure 20 is a flowchart showing the steps of the option connection check subroutine program; Figure 21 is the main flowchart. Flowchart showing the steps of the loop timer processing subroutine program and polling control timer processing subroutine program, FIG. 22 is a flowchart showing the detailed steps of the polling error processing subroutine program, and FIG. 23 is a flowchart showing the steps of the polling control subroutine program. Fig. 24 is a flowchart showing the procedure of the transmission request processing subroutine program, Fig. 25 is a flowchart showing the detailed procedure of the received data processing subroutine program, and Fig. 26 is a flowchart showing the detailed procedure of the status/report analysis subroutine program. 27 is a flowchart showing the procedure of the mode analysis subroutine program; FIG. 28 is a flowchart showing the procedure of the SSC status check subroutine program; FIG. 29 is a flowchart showing the procedure of the job processing subroutine program; 31 is a block diagram showing the configuration of the SSC transmission buffer and its related circuits. FIG. 32 is a flowchart showing the schematic configuration of the program executed by the SSC. , Figure 33 is a flowchart showing the procedure of the main routine program executed in SSC, Figure 34 is MSIF
FIG. 35 is a flowchart showing the steps of the monitoring subroutine program, FIG. 35 is a flowchart showing the steps of the SSC transmission request processing subroutine program, and FIG. 36 explains the steps of the main loop timer processing subroutine program and the job control timer processing subroutine program. FIG. 37 is a flowchart explaining the steps of the received data processing subroutine program, FIG. 38 is a flowchart showing the steps of the status/command processing subroutine program, and FIG. 39 is a flowchart explaining the steps of the polling answer processing subroutine program. FIG. 43 is a flowchart showing the procedure of the trouble check subroutine program. 1 to 3...Slave processing unit, 4...
Master processing unit, 5... Communication means, 6... Address space under master processing unit management, 7-9... Address space under slave processing unit management.

Claims (1)

[Claims] (1) An image including a plurality of slave processing units, each of which realizes a predetermined function, a master processing unit that manages the slave processing units, and a communication means that connects the slave processing units and the master processing unit. In the processing device, the master processing unit manages an address space that holds communication mode information indicating whether the fixed wiring communication method or the polling method is used for communication with each of the slave processing units. The plurality of slave processing units hold the above communication mode information in their respective managed address spaces in a rewritable manner according to commands from the master processing unit, and the master processing unit and each slave processing unit communicate with each other in the above communication mode. An image processing device characterized in that it communicates using a method specified by mode information.