JPH022122A - Semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To reduce switching noise without expanding the power-line width and power pad by forming a slit-shaped gap area in parallel to the longer direction of the power wiring between adjacent pads for power within power wiring area. CONSTITUTION:A plurality of signal pads 2 are formed at the periphery of an IC substrate 1, a GND pad 3 is formed for several of them, and a common GND line 4 is connected. Slit-shaped gap areas 5a, 5b, and 5c are formed with appropriate gap between them along the longer direction of the GND line 4 and the gap width delta is set to a size to allow insulation properties to be retained in accordance with the current capacity requested for the GND line 4. Branching wirings 4a, 4b,...4n are provided from this GND line 4 and are extended at required areas within a chip. According to the above configuration, if noise generation source is set to A, the generated noise is transmitted for example along the gap area 5b and then to the branching wirings 4a, 4b,...4n. Noise can be drastically reduced in this long transmission path.

Description

[Detailed Description of the Invention] [Summary] The present invention relates to a semiconductor integrated circuit device, and particularly relates to power supply line wiring (turns) formed on an IC substrate, such as widening the width of the power supply line or adding more power supply pads. The purpose of the present invention is to provide a semiconductor integrated circuit device equipped with a power supply line that can reduce switching noise without having to In a semiconductor integrated circuit device having a power supply wiring to be connected, a slit-shaped gap region is formed between adjacent power supply pads in the power supply wiring area in parallel to the longitudinal direction of the power supply wiring.

[Industrial application field]

The present invention relates to a semiconductor integrated circuit device (hereinafter referred to as IC).
In particular, the present invention relates to a wiring pattern of a power supply line formed on an IC substrate.

In recent years, ICs have become larger in size as semiconductor technology advances and the amount of information processed increases. In such a large-scale IC,
As the number of input/output signals increases and the operating speed increases, the switching noise of internal elements increases, and malfunctions due to the switching noise have become a serious problem. This is an attempt to reduce the above-mentioned switching noise.

[Conventional technology]

First, the mechanism of occurrence of malfunctions due to switching noise in large-scale ICs will be explained. An increase in integration density inevitably leads to an increase in the number of input/output signals, and therefore, signals often change simultaneously due to switching operations of each element. Particularly, in synchronous circuits, pass line receivers, drivers, etc., a large number of signals change simultaneously. Higher operating speeds further increase the frequency with which this signal change occurs. Simultaneous changes in a large number of signals cause fluctuations in the power supply voltage, making it impossible to maintain the voltage at a constant level. This voltage fluctuation appears as a level change in the power supply line formed on the IC substrate, which causes troubles such as malfunctions as switching noise.

To solve this problem, conventional methods have been to strengthen the power supply line and GND line (increase current capacity by increasing the pattern area), or to narrow the spacing between power supply pads and GND pads to place power supply pads or GND pads near the signal pads.
Care has been taken to avoid long current paths as much as possible by placing GND pads.

[Problem to be solved by the invention]

As mentioned above, strengthening the power supply line and GND line and adding power supply pads and GND pads in accordance with the amount of switching noise are effective means for reducing noise.

However, taking such measures would go against the trend of increasing the scale of ICs and would lead to an increase in chip size. As a negative method, it is possible to limit the number of input/output signal lines or to limit the total number of simultaneous signal changes, but these methods lead to a decrease in the signal processing ability of the IC and are not useful. It is not a good idea to help the grass.

As described above, in the past, there was a limit to the reduction of switching noise due to external dimensions such as chip size and processing capacity.

SUMMARY OF THE INVENTION An object of the present invention is to provide a semiconductor integrated circuit device equipped with a power supply line that can reduce switching noise without particularly increasing the width of the power supply line or adding additional power supply pads.

[Means to solve the problem]

In order to solve the above conventional problems, the present invention provides a plurality of power supply pads (1) provided on a semiconductor integrated circuit board (1).
3) and a power supply wiring (4) connecting the pads, the power supply wiring (4) is connected between adjacent power supply pads (3) in the power supply wiring (4) region.
Slit-shaped gap area (5a to 5f) parallel to the longitudinal direction of
).

[Effect]

According to the configuration of the present invention, the slit-shaped gap region (5
a to 5f) act as insulators. Power line (4)
By placing the insulator specified by the present invention inside, the noise propagation path becomes longer. Therefore, the noise has to bypass this gap region, and the noise is attenuated accordingly.

〔Example〕

Next, embodiments of the present invention will be described based on the drawings.

A first embodiment of the present invention is shown in FIG. In FIG. 1, a plurality of signal pads 2 are formed on the periphery of an IC substrate 1, and a GND pad 3 is formed for each of the signal pads 2. Each GND pad 3 is connected to a common GND line 4.

The GND line 4 is provided with slit-shaped gap regions 5a at appropriate intervals along its longitudinal direction.

5b and 5c are formed. These gap areas 5a,
The gap width δ between 5b and 5c may be any size that can maintain insulation, and is arbitrarily set according to the current capacity required of the GND line 4. Branch wiring 4a is branched from this GND line 4 at required locations.

4b, . . . 4n are applied and extended to required locations within the chip.

Note that the slit-shaped open area 5 formed in this way
The slits a, 5b, and 5c are formed only for the wiring material (for example, the A and Q wirings), and have completely different properties from the slits provided at the corners of the IC board to prevent cracking.

In the above configuration, if the noise source is 1, the generated noise propagates, for example, along the gap region 5b,
Branch wiring 4a, 4b, . . . bypasses this gap region 5b.
・Propagated to 4n. Noise is significantly attenuated in this long propagation path. Furthermore, since this propagated noise is significantly reduced at a GND pad on the way, it is highly desirable to allow the noise to propagate near the GND pad. In contrast, in the conventional configuration, the noise generation source A and the branch wirings 4a, 4b, ... 4n are connected over short distances, so there is almost no attenuation of the noise, and the noise is directly mixed into the signal within the IC. It was something.

Although the above embodiment has been described with respect to the GND wiring, the present invention has exactly the same effect on other power supply wiring.

A second embodiment of the present invention is shown in FIG. 2. In FIG. 2, parts that overlap with those in FIG.

The difference between the second embodiment and the first embodiment is that a plurality of slit-shaped gap regions are arranged in parallel in the width direction of the GND line (second
In the figure, these are points arranged in two horizontal lines). That is, as shown in FIG. 2, two slit-shaped gap regions 5a to
5f are formed at predetermined intervals. In FIG. 1, if switching noise occurs in (■), this noise will be directly transmitted to the branch wirings 4a, 4b, . . .
However, if the slit-shaped interval region and the GND line are provided as shown in FIG. 2, the above-mentioned problem will not occur.

The length of each slit-like interval region IJIU5a to 5f in the longitudinal direction of the GND line 4, the relative interval W and GN
The interval d in the width direction of the D line 4 is appropriately set according to the current capacity required by the IC. The same applies to the gap width δ of the slit-like gap region itself.

By arranging the slit-like gap regions 5a to 5f in multiple layers in this way, the length of the noise propagation path becomes longer, and the noise reduction effect of the negative layer can be ensured.

〔Effect of the invention〕

As described above, according to the present invention, by forming the slit-like gap region on the power supply line, it is possible to increase the length of the noise propagation path, and the distance that the noise reaches is correspondingly longer. Noise can be reduced without increasing the width of the power supply line or adding additional power supply pads.

3...GND pad, 4...GND line, 4a to 4n...branch wiring, 5a to 5f...Slit gap area.

[Brief explanation of the drawing]

FIG. 1 is a partially enlarged plan view showing a first embodiment of the present invention, and FIG. 2 is a partially enlarged plan view showing a second embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... IC board, 2... Signal pad, An enlarged plan view showing the first embodiment of the present invention. 1. An enlarged plan view showing the color of the second embodiment of the present invention.

Claims (1)

[Claims] A plurality of power supply pads (3) provided on a semiconductor integrated circuit board (1) and power supply wiring (4) connecting the pads.
In the semiconductor integrated circuit device having the power supply wiring (4
) A slit-shaped gap region (5) is provided between adjacent power supply pads (3) in the region parallel to the longitudinal direction of the power supply wiring (4).
A semiconductor integrated circuit device characterized in that a to 5f) are formed.