JPH02211135A - Ultrasonic diagnostic device - Google Patents

Abstract

PURPOSE:To form a picture of good ratio S/N of signal to noise by providing in a sampling delay means two circuits after level-dividing a signal delayed thereafter level-synthesized in a clip circuit and spreading a dynamic range. CONSTITUTION:The first delay means SDL-1 to SDL-k performing a relatively short delay, output addition means Al of the first delay means, second delay means SC-1 to SC-j performing a relatively long delay and an output addition means of the second delay means are provided. The second delay means is constituted of two systems of sampling delay means. One of the delay outputs is connected to a limit means LM for not more than a dynamic range of the sampling delay means to pass through. Another delay means connects its input to a 1/a times attenuator X (1/alpha) and output to alpha times (alpha1) amplifier X alpha, and an amplifier output is connected to a clip means CL for not less than the dynamic range to pass through, outputting a signal adding outputs of the means LM, CL.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a receiving phasing circuit in an electronic scanning ultrasonic diagnostic apparatus.

[Conventional technology]

A conventional receiving wave phasing circuit is disclosed in, for example, Patent No. 1 [60-262
As described in No. 447, there is a phasing circuit using delay means by sampling.

[Problem to be solved by the invention]

The above conventional technology generates delay switching noise due to dynamic focus due to the sampling delay means, fixed slam noise due to parallel sampling, and S/N.
was deteriorating.

An object of the present invention is to provide an ultrasonic diagnostic apparatus with a good S/N ratio by apparently increasing the dynamic range of the sampling delay means.

[Means to solve the problem]

In order to achieve the above object, the present invention has two sampling delay circuits and expands the dynamic range by dividing the signal into levels, delaying the signals, and then combining the levels with a clip circuit.

That is, the output of one of the two systems of sampling delay means is within the dynamic range V of the sampling delay means.
It is connected to a limiter that passes less than SH, and the other input is input after passing through a 1/α times (α>1) attenuator.
After passing through an α times amplifier, the output thereof is connected to a clip means that passes VSH or more.

[Effect]

When delaying a signal α times VSH with the above configuration, the signal portion below VSH is output from the limit means,
VS) Since the signal portion of 1 or more is multiplied by 1/α and then passes through the sampling delay means, it is output from the clipping means without being saturated. By adding the output through the limit means and the output through the clip means, the noise level remains constant and the sampling can be delayed up to α times the signal without saturation.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG.

1.2. ~． nXN (n, N are natural numbers of 1 or more), is a received signal phasing input terminal from each array vibrator, 5DL-1
, ~, 5DL-k (k is a natural number of 1 or more) is the first delay means, Al and A2 are the addition means, 5C-1, ~5C-j (j
is a natural number greater than or equal to 1) is a sampling delay means, X- is an attenuator, xα is an amplifier, LM is a limit means, CL is a clip means, ■ is an addition means, and Out is a phasing and addition output terminal.

The received signals from each array transducer are transmitted to the first delay means 5DL-1 to 5DL-1 in accordance with the focal position and beam direction of the ultrasonic beam.
Desired delays are respectively set in 5DL- by sampling delay means 5C-1 to 5C-j as second delay means, and phased and added by addition means Al and A2.

The first delay means performs a relatively short phasing delay within block 1 from input terminals 1 to N, and the second delay means performs a relatively long phasing delay between blocks 1 to n.

As the first delay means 5DL-1 to 5DL-, an analog delay line or a sampling delay element can be used. Sampling delay means 5C-1 to 5C of the second delay means
-j includes a sample hold circuit, a switched capacitor circuit, and a CCD described in JP-A No. 60-262447.
, a combination of an A/D converter, a line memory, and a D/A converter can be used.

In the above sampling delay means, delay switching noise and fixed bang noise (Nsc) occur, and since Nsc is larger than the input noise of the second delay means, the signal-to-noise ratio S/N
deteriorate. Therefore, two circuits of sampling delay means 5C-1 to 5C-j are provided as the second delay means, and linear processing is performed up to the dynamic range of the sampling delay means or a signal that is α times the linear maximum signal amplitude (Vso) (α>1). Enables the execution of a phasing delay.

FIG. 2 shows each point (atb l
c, a, eat "21 f). When a signal approximately α times as large as Vso is input as the signal at the input point a of the second delay means, the upper side of FIG. As shown in Fig. 2C, the signal passing through the sampling delay means SC1 to SCj has a distorted waveform in the part exceeding ±-Vso.In addition, the noise Nsc (α×NSC<VSH) generated by the sampling delay means is The output e□ of the limit means LM is a signal through which only signals in the linear range below Vs++ are passed, as shown in Fig. 2e.

As the limit means LM, a circuit as shown in FIG. 3(a) can be used. Vl is the input to the clamp means and vo is the output.

As shown in the sampling delay means 5C-1 on the lower side of Fig. 1,
After the signal of a is attenuated to - within Vso, it is input to 5C-1. Noise, I'Jsc, is added to the output of SC-,j, and is amplified by α times with an amplifier (×α). Assuming that the dynamic range of the amplifier is greater than α times VSH, its output will be as shown in FIG. 2d. That is, the amplitude at point a can be obtained while maintaining the linearity of the signal, but the noise Nsc of the sampling delay element is multiplied by α. Therefore, the output of the amplifier (Xα) is clipped to the clipping means CL.
The signal below VsH is cut by passing it through the second
Obtaining the signal shown in FIG. e2 6 As the clipping means CL-2, a circuit as shown in FIG. 3(b) can be used.

The output f obtained by adding el and e2 by the adder is.

As shown in FIG. 2f, the signal is linearly obtained up to α times VSH, and the noise remains at Nsc.

Therefore, according to this embodiment, since the dynamic range of the sampling delay means as the second delay means can be increased by α times, the S/N of the entire phasing circuit is also increased by α times.

In addition, in the detailed explanation of the present invention, an example of expanding the dynamic range in the second delay means is shown, but when a sampling delay means is used as the first delay means, the same effect can be obtained by using the same configuration as the second delay means. It is clear that the following can be obtained.

〔Effect of the invention〕

According to the present invention, it is possible to obtain an image with good S/H by expanding the dynamic range of the sampling delay means.

[Brief explanation of the drawing]

FIG. 1 is a circuit block diagram showing one embodiment of the present invention, and FIG.
The figure is an explanatory diagram showing signals and noise in an embodiment of the present invention, and FIGS. 3(a) and 3(b) are circuit diagrams showing specific configuration examples of a limit means and a clip means, respectively. 1~nXN...Phasing input terminal. 5DL-1 to 5DL-k...first delay means. Al, A2...addition means, 5C-1 to 5C-j...
Sampling delay means, X-...attenuator, ×α...
LM] limit means, CL... clip means. Deaf 1 Figure e;

Claims (1)

[Claims] 1. In a receiving phasing circuit that provides a required delay corresponding to each element of the vibrator, a first delay means that provides a relatively short delay, and an addition means that adds together the plurality of outputs of the first delay means. and a second delay means for delaying the output of the addition means for a relatively long time, and an addition means for adding together the outputs of the plurality of second delay means, and the second delay means is configured to delay the output of the two systems of sampling delay means. The output of one sampling delay means is connected to a limit means that passes the dynamic range (or maximum linear signal amplitude) of the sampling delay means or less, and the input of the other sampling delay means is connected to a 1/α times attenuator, The output is connected to an α-fold (α>1) amplifier,
The output of the amplifier is connected to clipping means that passes through a dynamic range exceeding the sampling delay element, and a signal obtained by adding the output of the limiting means and the output of the clipping means is used as the output of the second delay means. Sonic diagnostic equipment.