JPH02201527A - Sampling frequency converter - Google Patents

Abstract

PURPOSE:To stably convert a sampling frequency by generating interpolation data synchronized with the sampling frequency of input digital data and holding this interpolation data with another sampling frequency and filtering this held data. CONSTITUTION:Interpolation data DA00 synchronized with a sampling frequency f0 of input digital data Da0 is generated and is held with another sampling frequency f1, and this held data DA1 is filtered. Consequently, the interpolation error is reduced, and digital data Da0 synchronized with the sampling frequency f1 is obtained. Thus, slip of input data Da0 does not occur, and the sampling frequency is stably converted.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a sampling frequency converter, and particularly to obtaining digital data at a different sampling frequency 1 from digital data sampled at a first sampling frequency 10. This invention relates to a sampling frequency converter that can perform

[Conventional technology]

Conventionally, this type of first sampling frequency converter converts input digital data into analog data, and then samples the converted analog data at a different sampling frequency to obtain new digital data. This is how it was done.

A sophisticated second sampling frequency converter uses a digital filter to linearly interpolate digital data using the least common multiple of two sampling frequencies to obtain data at the required sampling frequency.

Furthermore, as a third sampling frequency converter, digital filters are connected in cascade to obtain the sampling frequency of the multiplier, and linear interpolation is performed on that data to obtain digital data with a different sampling frequency. It is.

[Problem to be solved by the invention]

The above-described first sampling frequency converter has disadvantages in that quantization noise accumulates and the quality of the data deteriorates due to aging of the constituent elements since the first sampling frequency converter converts the data back to analog data.

The second sampling frequency converter described above can only convert a predetermined value because it needs to have an oscillator that generates the two different sampling frequency values and a sampling frequency given by the least common multiple. There is a drawback.

The above-mentioned third sampling frequency converter has two problems: there is a large delay between the time it is manually inputted to obtain the multiplier frequency and the sampling value is output, and the sampling frequency of the manually inputted digital data is not synchronized. There is a drawback that it is not taken.

The present invention has been made in order to eliminate the above-mentioned drawbacks, and an object of the present invention is to provide a sampling frequency converter that is synchronized with the sampling frequency of input digital data and that enables highly stable sampling conversion. purpose.

[Means to solve the problem]

To achieve the above-mentioned object, the sampling frequency converter of the present invention has a first sampling frequency f. For digital data sampled at a first sampling frequency f. A first converting means calculates m pieces of interpolated data at a sampling frequency nfo which is n times higher than 0 and holds the interpolated data at a sampling frequency nfo, a second conversion means which holds the data at a second sampling frequency f, and performs a filtering operation on the held data at a second sampling frequency f, to obtain digital data synchronized with the second sampling frequency f,; It is characterized by:

The present invention is based on the sampling frequency f of input digital data. By creating interpolated data synchronized with , holding that data at different sampling frequencies, f, and filtering the held data, interpolation errors can be reduced, and digital data between different sampling frequencies, f, , f, can be reduced. Since the delay from data input to output is minimized and synchronized with the sampling frequency f0 of human-powered digital data, no input data slip occurs and highly stable sampling frequency conversion is possible.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the sampling frequency converter of the present invention.

In FIG. 1, a sampling frequency converter 1 includes a first
It is composed of a converting means 2 and a second converting means 3.

The first conversion means 2 has a first sampling frequency f0
Digital data Da sampled at For,
m pieces of interpolated data DA are calculated at a sampling frequency nf0 that is n times higher than the first sampling frequency f0, and this interpolated data DA. the sampling frequency nf,
This is a circuit that holds the The second converting means 3 holds the interpolated data D A, , held by the first converting means 2 at a second sampling frequency f, and converts the held data DΔ, to a second sampling frequency f. This circuit performs filtering calculations with , and obtains digital data Da synchronized with the second sampling frequency f.

The first conversion means 2 includes a digital filter 21, a frequency multiplier 22, and a holder 23. The digital filter 21 has a sampling frequency r. Digital data Da0 sampled at 1 is supplied. The frequency multiplier 22 has a sampling frequency f0
and obtain n times the sampling frequency nf,
This sampling frequency nf0 is set to the digital filter 21.
and is applied to the retainer 23. The digital filter 21 is configured to calculate m pieces of interpolated data DAo using a sampling frequency nf0 that is n times higher. The holder 23 is capable of latching the interpolated data DAo obtained by the digital filter 21 at a timing of n times the sampling frequency nf.

The second conversion means 3 includes a holder 31 and a digital filter 32. The cage 31 is the cage 23
This is so that the interpolated data DA, .

The digital filter 32 performs a filtering operation at the sampling frequency f1 to calculate the data DA latched in the holder 31 at the sampling frequency f, so that the digital data Da synchronized with the sampling frequency f1 can be obtained. .

The operation of the embodiment configured in this way will be explained.

The sampling frequency f0 is input to the frequency multiplier 22, and the frequency multiplier 22 converts the sampling frequency [. A sampling frequency nf0 that is n times higher than that synchronized with is generated.

The digital data Da0 sampled at the sampling frequency f0 is converted into m pieces of interpolated data DA synchronized with the sampling frequency nf by the digital filter 21.
Calculate o. Interpolated data DA calculated by the digital filter 21 in this way.

is held in the holder 23 at the timing of the sampling frequency nf.

The interpolated data DAoo held in the holder 23 is transferred to the second conversion means 3 at the timing of the sampling frequency f,
It is held by a holder 31. The interpolated data D A + held in the holder 31 is passed through the digital filter 32
A filtering operation is performed at the sampling frequency f, to remove unnecessary noise components and obtain digital data Da1 synchronized with the sampling frequency f,.

Such an embodiment creates interpolated data DAoo synchronized with the sampling frequency f0 of input digital data Dao, holds the data DAoo at a different sampling frequency f1, and filters the held data DA. , digital data D a that reduces interpolation errors and synchronizes with the sampling frequency f
o and different sampling frequencies f0, f.

Minimize the delay from input to output of digital data between
Since the input data Dao is synchronized with 0, no slip occurs in the input data Dao, and highly stable sampling frequency conversion is possible.

[Effects of the Invention] As explained above, the present invention creates interpolated data synchronized with the sampling frequency f0 of human-powered digital data, holds that data at a different sampling frequency f, and filters the held data. By doing so, interpolation errors are reduced, the delay from input to output of digital data between different sampling frequencies f0 and f is minimized, and the input data is synchronized with the sampling frequency f0 of the input digital data. This has the advantage that no slip occurs and highly stable sampling frequency conversion can be performed.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention. 1... Sampling frequency converter, 2...
...First conversion means, 3...Second conversion means.

Claims (1)

[Claims] For digital data sampled at the first sampling frequency f_0, the first sampling frequency f_0 is
A first conversion that calculates m (positive integer, the same below) pieces of interpolated data at a sampling frequency nf_0 that is n (positive integer, the same below) times synchronized with _0, and holds the interpolated data at the sampling frequency nf_0. means; holding the interpolated data held by the first conversion means at a second sampling frequency f_1; performing a filtering operation on the held data at the second sampling frequency f_1; a second converting means for obtaining digital data synchronized with the sampling frequency converter.