JPH02200041A - Light receiving circuit - Google Patents

Light receiving circuit

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Publication number
JPH02200041A
JPH02200041A JP1017477A JP1747789A JPH02200041A JP H02200041 A JPH02200041 A JP H02200041A JP 1017477 A JP1017477 A JP 1017477A JP 1747789 A JP1747789 A JP 1747789A JP H02200041 A JPH02200041 A JP H02200041A
Authority
JP
Japan
Prior art keywords
circuit
signal
identification
output
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1017477A
Other languages
Japanese (ja)
Inventor
Tsutomu Tajima
勉 田島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP1017477A priority Critical patent/JPH02200041A/en
Publication of JPH02200041A publication Critical patent/JPH02200041A/en
Pending legal-status Critical Current

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  • Dc Digital Transmission (AREA)
  • Optical Communication System (AREA)

Abstract

PURPOSE:To secure a satisfactory range of identification against the fluctuation of the mark rate of an input signal by applying the output signal of a surface acoustic wave SAW filter to a peak value detecting circuit to obtain the output voltage corresponding to the mark rate and applying the output voyage to an identification reproduction circuit. CONSTITUTION:The received optical signal is converted into an electric signal by a photodetecting element 1 and then amplified by a main amplifier circuit 4, etc. The electric signal received from the circuit 4 is inputted to an identification circuit 5 via a capacitor 13 as well as to a SAW filter 6. The output of the filter 6 is distributed via a distribution circuit 7 to be set at a prescribed amplitude via an amplitude limiting circuit 8 and inputted to the circuit 5. At the same time, a peak value detecting circuit 10 produces the DC voltage in response to the set amplitude. The DC voltage undergoes the level conversion via a DC-DC converter 11 and is applied to an amplified current signal. Thus, it is possible to apply an identification level corresponding to the input mark rate to the circuit 5 against an input signal having a fluctuating mark rate.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は光受信回路に関し、特に、光信号のマーク率を
検出するための検出方式に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an optical receiving circuit, and particularly to a detection method for detecting the mark rate of an optical signal.

〔従来の技術〕[Conventional technology]

一般に、光通信装置の光受信回路として第6図に示すも
のが知られている。
Generally, the one shown in FIG. 6 is known as an optical receiving circuit for an optical communication device.

第5図を参照して、受光素子21で受信された光信号は
ここで電気信号に変換され、前置増幅回路22.利得可
変増幅回路23及び主増幅回路24で増幅される。そし
て、この増幅電流信号は識別再生回路25.微分回路3
1及び制御回路32に与えられる。つまシ9図示のよう
に交流結合で増幅2分配を行っている。
Referring to FIG. 5, the optical signal received by the light receiving element 21 is converted into an electrical signal here, and the preamplifier circuit 22. The signal is amplified by a variable gain amplifier circuit 23 and a main amplifier circuit 24. This amplified current signal is then transmitted to the identification reproducing circuit 25. Differential circuit 3
1 and the control circuit 32. As shown in the diagram with the handle 9, amplification and distribution into two parts is performed by AC coupling.

制御回路62はこの増幅電流信号に基づいて利得可変増
幅回路23の利得を制御して、受光レベルを所定の値に
する。
The control circuit 62 controls the gain of the variable gain amplifier circuit 23 based on this amplified current signal to set the light reception level to a predetermined value.

微分回路31からの微分出力はコンデンサ64を介して
表面弾性波フィルタ(sAWフィルタ)26に与えられ
、ここでクロックが抽出される。
The differential output from the differentiating circuit 31 is given to a surface acoustic wave filter (sAW filter) 26 via a capacitor 64, where a clock is extracted.

そして、タイミング増幅回路27及び振幅制限回路28
で所要の振幅まで増幅されて識別用クロックが生成され
2分配回路29によって識別再生回路25に与えられる
。識別再生回路25ばこの識別用クロックを用いて、増
幅電流信号の識別再生を行う。
Then, a timing amplification circuit 27 and an amplitude limiting circuit 28
The signal is amplified to a required amplitude to generate an identification clock, which is provided to the identification reproducing circuit 25 by the two-way distribution circuit 29. The identification and reproduction circuit 25 performs identification and reproduction of the amplified current signal using the identification clock.

ところで、伝送路符号がRZ倍信号の場合。By the way, when the transmission path code is an RZ multiplied signal.

りまシ、マーク率が変動する信号ではその直流レベルが
マーク率によって変動する。その結果。
However, in the case of a signal whose mark rate varies, its DC level varies depending on the mark rate. the result.

このような信号を交流結合を介して識別再生回路25に
与えた場合、直流レベルの変動によって識別再生回路2
5で符号誤りが生じる。
When such a signal is applied to the identification reproducing circuit 25 via AC coupling, the identification reproducing circuit 2
5, a code error occurs.

このため、従来の光受信回路では第3図に示すように識
別再生回路25の前段にダイオードあるいはトランジス
タを用いた直流再生回路30を備えており、この直流再
生回路60で入力される増幅電流信号のベースライン側
をクランプして、さらに、外部から所定の識別レベル調
整電圧を与え、その後、識別再生回路25で識別を行っ
ている。
For this reason, the conventional optical receiving circuit is equipped with a DC regeneration circuit 30 using a diode or a transistor in front of the identification regeneration circuit 25, as shown in FIG. A predetermined discrimination level adjustment voltage is applied from the outside, and then the discrimination is performed by the discrimination reproducing circuit 25.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の光受信回路では、マーク率変動の伴う入
力信号に対しては、直流再生回路により入力信号のベー
スライン側をクランプし。
In the above-mentioned conventional optical receiving circuit, when an input signal is accompanied by mark rate fluctuation, the DC regeneration circuit clamps the baseline side of the input signal.

さらに外部から識別レベル調整電圧VTRにより所定の
識別レベルを与えている。このため、直流再生回路の動
作が不十分であると識別範囲の動作余裕がな(なる。特
に伝送速度がギガビット/秒(Gb/s)以上のd高速
ディジタル信号に対しては第4図に示すように直流再生
回路のクランプ動作が不完全になるため、入力信号の1
″を“0”と誤る点(第4図曲線a)と。
Further, a predetermined identification level is applied externally by an identification level adjustment voltage VTR. For this reason, if the operation of the DC regeneration circuit is insufficient, there will be no operating margin in the identification range.Especially for high-speed digital signals with transmission speeds of Gigabits per second (Gb/s) or higher, as shown in Figure 4. As shown in the figure, because the clamping operation of the DC regeneration circuit becomes incomplete, one of the input signals
” is mistaken for “0” (curve a in Figure 4).

“0”を“1”と誤る点(第4図曲線b)の範囲はマー
ク率に対して変化し、外部よシ一定の電圧を与えた場合
実効的な動作可能範囲は、第40の斜線で示した範囲に
限定される。
The range of the point where "0" is mistaken for "1" (curve b in Figure 4) changes with the mark rate, and when a constant external voltage is applied, the effective operable range is the 40th diagonal line. Limited to the range shown.

このように、従来の光受信回路では、入力信号のマーク
率変動に対して識別範囲を十分に確保できないという問
題点がある。
As described above, the conventional optical receiving circuit has a problem in that it is not possible to ensure a sufficient identification range against fluctuations in the mark rate of the input signal.

本発明の目的は入力信号のマーク率変動に対して識別範
囲を十分に確保できる光信回路を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide an optical communication circuit that can sufficiently secure a discrimination range against mark rate fluctuations of input signals.

〔課題を解決するための手段〕[Means to solve the problem]

本発明によれば、光信号を電気信号に変換する受光素子
と、この電気信号を増幅する前置増幅回路と、光信号の
レベルに応じて利得を変化して、前置増幅回路の出力信
号を所定の振幅に増幅する利得可変増幅回路と、利得可
変増幅回路の出力信号をさらに増幅して、増幅電気信号
を送出する主増幅回路と、この増幅電気信号を識別再生
する識別再生回路と、上記の増幅電気信号からクロック
成分を抽出して、クロック成分信号を出力するSAWフ
ィルタと、このクロック成分信号を所定の振幅に増幅す
る振幅制限回路と、上記のクロック成分信号をその振幅
に対応する直流電圧に変換するピーク値検出回路と、ピ
ーク値検出回路の出力直流電圧をレベル変換し、前記識
別回路に入力される増幅電気信号に識別電圧として与え
る直流電圧−直流電圧変換回路とを有し、R別再生回路
はクロック成分信号に基づいて識別電圧が与えられた増
幅電気信号を識別再生することを特徴とする光受信回路
が得られる。
According to the present invention, there is provided a light receiving element that converts an optical signal into an electrical signal, a preamplifier circuit that amplifies the electrical signal, and an output signal of the preamplifier circuit that changes the gain according to the level of the optical signal. a variable gain amplifier circuit that amplifies the output signal of the variable gain amplifier circuit to a predetermined amplitude, a main amplifier circuit that further amplifies the output signal of the variable gain amplifier circuit and sends out an amplified electrical signal, and an identification and regeneration circuit that identifies and reproduces this amplified electrical signal; a SAW filter that extracts a clock component from the amplified electrical signal and outputs the clock component signal; an amplitude limiting circuit that amplifies the clock component signal to a predetermined amplitude; and an amplitude limiting circuit that amplifies the clock component signal to a predetermined amplitude; It has a peak value detection circuit that converts it into a DC voltage, and a DC voltage-DC voltage conversion circuit that converts the level of the output DC voltage of the peak value detection circuit and applies it as an identification voltage to the amplified electric signal input to the identification circuit. , an optical receiving circuit is obtained in which the R-specific regeneration circuit identifies and regenerates the amplified electric signal to which the identification voltage is applied based on the clock component signal.

〔実施例〕〔Example〕

次に本発明について実施例によって説明する。 Next, the present invention will be explained with reference to examples.

第1図を参照して、伝送路(図示せず)から受信された
光信号は、受光素子1により電気信号に変換され、前置
増幅回路2.利得可変増幅回路6及び主増幅回路4で増
幅される。この際。
Referring to FIG. 1, an optical signal received from a transmission line (not shown) is converted into an electrical signal by a light receiving element 1, and a preamplifier circuit 2. The signal is amplified by the variable gain amplifier circuit 6 and the main amplifier circuit 4. On this occasion.

制御回路12は主増幅回路4の出力に基づいて利得可変
増幅回路3を制御する。この結果、主増幅回路4から一
定振幅の電気信号が出力される。主増幅回路4からの電
気信号(以下増幅電気信号という)はコンデンサ16を
介して識別回路5へ入力されるとともにSAWフィルタ
6へ入力される。そして、SAWフィルタ6でクロック
成分が抽出され、SAWフィルタの出力としてマーク率
の変化に応じて出力振幅の異なる正弦波が得られる。
The control circuit 12 controls the variable gain amplifier circuit 3 based on the output of the main amplifier circuit 4. As a result, the main amplifier circuit 4 outputs an electrical signal with a constant amplitude. An electrical signal from the main amplifier circuit 4 (hereinafter referred to as an amplified electrical signal) is input to the identification circuit 5 via the capacitor 16 and is also input to the SAW filter 6. Then, the clock component is extracted by the SAW filter 6, and a sine wave whose output amplitude differs according to the change in mark rate is obtained as the output of the SAW filter.

SAWフィルタ6の出力(以下フィルタ出力という)は
分配回路7で振幅制限回路8及びピーク値検出回路10
に分配される。フィルタ出力は振幅制限回路8で所定の
振幅にされ9分配回路9を介して識別再生回路5に入力
される。
The output of the SAW filter 6 (hereinafter referred to as filter output) is sent to the distribution circuit 7 by an amplitude limiting circuit 8 and a peak value detection circuit 10.
distributed to. The filter output is set to a predetermined amplitude by an amplitude limiting circuit 8 and is inputted to an identification reproducing circuit 5 via a nine-part distribution circuit 9.

一方、ピーク値検出回路10は、このフィルタ出力によ
ってその振幅に応じた直流電圧を生成する。この直流電
圧はDC−DCコンバータ11によってレベル変換され
、この出力電圧(VDC)を抵抗器14を介して増幅電
流信号に与える。
On the other hand, the peak value detection circuit 10 generates a DC voltage according to the amplitude of the filter output. This DC voltage is level-converted by a DC-DC converter 11, and this output voltage (VDC) is applied to an amplified current signal via a resistor 14.

これによって、第2図に示すようにマーク率の変動する
入力信号に対して、その入力するマーク率に応じた識別
レベルが識別再生回路5に与えられる。
As a result, as shown in FIG. 2, for an input signal whose mark rate varies, a discrimination level corresponding to the input mark rate is given to the discrimination reproducing circuit 5.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明ではSAWフィルタの出力信
号をピーク値検出回路に与えて、マーク率に応じた出力
電圧を得る。この出力電圧を識別再生回路を与えている
から、マーク率の変動に応じた識別レベルが得られ、入
力信号のマーク率変動に対して実効的な識別範囲の劣化
を軽減できるという効果がある。
As explained above, in the present invention, the output signal of the SAW filter is given to the peak value detection circuit to obtain the output voltage according to the mark rate. Since this output voltage is applied to the discrimination/reproduction circuit, a discrimination level corresponding to the variation in the mark rate can be obtained, and there is an effect that deterioration of the effective discrimination range due to the variation in the mark rate of the input signal can be reduced.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明による光受信回路の一実施例を示すプ、
ロック図、第2図は第1図に示す光受信回路におけるマ
ーク率に対する識別可能範囲と出力電圧(Voc )の
変化を示す図、第6図は従来の光受信回路を示すブロッ
ク図、第4図は第3図に示す光受信回路におけるマーク
率に対する識別可能範囲と実効的な識別可能範囲を示す
図である。 1・・・受光素子、2・・・前置増幅回路、3・・・利
得可変増幅回路、4・・・主増幅回路、5・・・識別再
生回路、6・・・SAWフィルタ、7,9・・・分配回
路。 8・・・振幅制限回路、10・・・ピーク値検出回路。 11・・・DC−DCコンバータ、12・・・制御回路
FIG. 1 shows an example of an optical receiving circuit according to the present invention.
2 is a diagram showing the change in the distinguishable range and output voltage (Voc) with respect to the mark rate in the optical receiving circuit shown in FIG. 1. FIG. 6 is a block diagram showing the conventional optical receiving circuit. The figure is a diagram showing the distinguishable range and effective distinguishable range with respect to the mark rate in the optical receiving circuit shown in FIG. 3. DESCRIPTION OF SYMBOLS 1... Light receiving element, 2... Preamplifier circuit, 3... Variable gain amplifier circuit, 4... Main amplifier circuit, 5... Identification regeneration circuit, 6... SAW filter, 7, 9...Distribution circuit. 8... Amplitude limiting circuit, 10... Peak value detection circuit. 11...DC-DC converter, 12... Control circuit.

Claims (1)

【特許請求の範囲】[Claims] 1、光信号を電気信号に変換する受光素子と、該電気信
号を所定の振幅レベルに増幅して増幅電気信号を出力す
る利得可変増幅手段と、該増幅電気信号を受け、クロッ
ク成分を抽出してクロック信号を送出するクロック成分
抽出手段と、該クロック信号を受け、該クロック信号の
振幅に対応する直流電圧を生成し、前記増幅電気信号に
識別電圧として与える識別電圧生成手段と、該識別電圧
が与えられた増幅電気信号を前記クロック信号に基づい
て識別再生する識別再生手段とを有することを特徴とす
る光受信回路。
1. A light receiving element that converts an optical signal into an electrical signal, a variable gain amplifier that amplifies the electrical signal to a predetermined amplitude level and outputs an amplified electrical signal, and receives the amplified electrical signal and extracts a clock component. a clock component extracting means for transmitting a clock signal using a clock signal, an identification voltage generating means for receiving the clock signal, generating a DC voltage corresponding to the amplitude of the clock signal, and applying the generated DC voltage to the amplified electric signal as an identification voltage; 1. An optical receiving circuit comprising identification and reproducing means for identifying and reproducing an amplified electric signal given based on the clock signal.
JP1017477A 1989-01-30 1989-01-30 Light receiving circuit Pending JPH02200041A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1017477A JPH02200041A (en) 1989-01-30 1989-01-30 Light receiving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1017477A JPH02200041A (en) 1989-01-30 1989-01-30 Light receiving circuit

Publications (1)

Publication Number Publication Date
JPH02200041A true JPH02200041A (en) 1990-08-08

Family

ID=11945086

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1017477A Pending JPH02200041A (en) 1989-01-30 1989-01-30 Light receiving circuit

Country Status (1)

Country Link
JP (1) JPH02200041A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5730526A (en) * 1995-02-21 1998-03-24 Sun Electric U.K. Limited Method and apparatus for machine diagnosis

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5730526A (en) * 1995-02-21 1998-03-24 Sun Electric U.K. Limited Method and apparatus for machine diagnosis

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