JPH02198103A - Trimming of film resistor - Google Patents
Trimming of film resistorInfo
- Publication number
- JPH02198103A JPH02198103A JP1017969A JP1796989A JPH02198103A JP H02198103 A JPH02198103 A JP H02198103A JP 1017969 A JP1017969 A JP 1017969A JP 1796989 A JP1796989 A JP 1796989A JP H02198103 A JPH02198103 A JP H02198103A
- Authority
- JP
- Japan
- Prior art keywords
- resistance value
- trimming
- film resistor
- resistor
- resistors
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000009966 trimming Methods 0.000 title claims abstract description 27
- 238000000034 method Methods 0.000 claims abstract description 8
- 239000012528 membrane Substances 0.000 claims description 9
- 239000004020 conductor Substances 0.000 abstract description 3
- 229910000679 solder Inorganic materials 0.000 abstract description 2
Landscapes
- Apparatuses And Processes For Manufacturing Resistors (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、膜抵抗体のトリミング方法に関するものであ
る。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for trimming a film resistor.
従来の技術
一般に、混成集積回路基板上の１つの抵抗値は、１つの
膜抵抗体の抵抗値トリミングによって得られている。１
つの抵抗値を２つ以上の膜抵抗体の抵抗値トリミングに
よって得る場合もあるが、この場合、２つ以上の膜抵抗
体は各々独立に抵抗値トリミングされるのではなく、こ
れらの膜抵抗体の合成抵抗値の抵抗値トリミングを行な
っている。BACKGROUND OF THE INVENTION Generally, one resistance value on a hybrid integrated circuit board is obtained by trimming the resistance value of one film resistor. 1
In some cases, a single resistance value can be obtained by trimming the resistance value of two or more membrane resistors, but in this case, the two or more membrane resistors are not trimmed independently, but rather by trimming the resistance values of these membrane resistors. Resistance value trimming of the combined resistance value is performed.
発明が解決しようとする課題
この方法では、トリミング装置の電圧電流計の精度及び
、トリミング装置の検針の接触抵抗により、低い抵抗値
（数Ω以下）では抵抗値トリミング精度が極端に悪くな
ってしまう。Problems to be Solved by the Invention In this method, the accuracy of trimming the resistance value becomes extremely poor at low resistance values (several Ω or less) due to the accuracy of the voltage-ammeter of the trimming device and the contact resistance of the meter reading of the trimming device. .
従って、本発明の目的は、低い抵抗値の膜抵抗体の抵抗
値トリミングを精度良く行い、高精度の低抵抗値膜抵抗
体を有する混成集積回路基板を提供することにある。SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to perform resistance value trimming of a low resistance film resistor with high accuracy and to provide a hybrid integrated circuit board having a highly accurate low resistance value film resistor.
課題を解決するだめの手段
上記目的を達成するだめの本発明の膜抵抗体のトリミン
グ方法は、回路上の１つの抵抗値を２つ以上の膜抵抗体
の並列の合成抵抗値により得られるように、かつ、この
２つ以上の膜抵抗体が各々独立に抵抗値が測定できるよ
うにオープン箇所を設けた抵抗回路を形成、前記膜抵抗
体の各々を設計抵抗値にトリミングした後に、オープン
箇所を短絡させ、所定の合成抵抗値を得るものである。Means for Solving the Problem The method for trimming a membrane resistor of the present invention which achieves the above object is to trim one resistance value on a circuit so that it can be obtained by the combined resistance value of two or more membrane resistors in parallel. and form a resistance circuit with open points so that the resistance values of these two or more film resistors can be measured independently. After trimming each of the film resistors to the designed resistance value, open points are formed. is short-circuited to obtain a predetermined combined resistance value.
作用
本発明によれば、低い抵抗値を高い抵抗値に拡大して抵
抗値トリミングできるため、接触抵抗などの影響を小さ
くすることができ、低い抵抗値の膜抵抗体を精度良く抵
抗値トリミングすることが出来る。According to the present invention, since a low resistance value can be expanded to a high resistance value for resistance value trimming, the influence of contact resistance etc. can be reduced, and the resistance value of a film resistor with a low resistance value can be precisely trimmed. I can do it.
実施例 次に、本発明の実施例について図面を用いて説明する。Example Next, embodiments of the present invention will be described using the drawings.
第１図は本発明の一実施例を示す平面図である。FIG. 1 is a plan view showing one embodiment of the present invention.
基板１１には、配線導体１２、検針ランド１３１Ｌ。On the board 11, a wiring conductor 12 and a meter-reading land 131L are provided.
１３ｂ、１３０，１３１１．１３１５１膜抵抗体１４ａ
。13b, 130, 1311.13151 film resistor 14a
.
１４ｂ、１４０，１４ｄ、１４ｅが設けられている。各
抵抗体を所定の抵抗値Ｒｘにトリミングした後、各トリ
ミング検針ランドをはんだブリッジまだは、導電ペース
ト１５１Ｌ、１５ｂ、１５０゜１ｓｄ 、 １ｓｅにて
短絡させれば、合成抵抗値Ｒｘ１５が得られる。従来の
トリミング方法で抵抗値ＲＸ／６を得るのに比べ、トリ
ミング抵抗値を６倍のＲｘに拡大して、抵抗値Ｒ）Ｃ１
５を得ることが出来る。仮に、検針の接触抵抗が０．１
Ω、Ｒｘが１０Ωであるとすれば、ＲＩＣ１５に対する
接触抵抗の割合は６％に達するが、Ｒｘに対する接触抵
抗の割合は１チに過ぎず、接触抵抗の影響を小さくし、
精度良く抵抗値トリミングをすることができる。14b, 140, 14d, and 14e are provided. After each resistor is trimmed to a predetermined resistance value Rx, each trimming meter reading land is short-circuited using conductive pastes 151L, 15b, 150° 1sd, 1se to obtain a combined resistance value Rx15. Compared to obtaining a resistance value RX/6 using the conventional trimming method, the trimming resistance value is expanded to 6 times Rx, and the resistance value R)C1
You can get 5. Suppose that the contact resistance of the meter reading is 0.1.
If Ω and Rx are 10Ω, the ratio of contact resistance to RIC15 reaches 6%, but the ratio of contact resistance to Rx is only 1ch, which reduces the influence of contact resistance.
Resistance value trimming can be done with high precision.
なお、本発明は上記実施例のような各分割膜抵抗体の形
状およびトリミング抵抗値が同一の場合だけでなく、そ
れらの一部あるいは全てが異なる場合にも適用できる。Note that the present invention can be applied not only to the case where the shape and trimming resistance value of each divided film resistor are the same as in the above embodiment, but also to the case where some or all of them are different.
発明の詳細
な説明したように、本発明によれば、低抵抗値のトリミ
ングを高抵抗値のトリミングに変換して所定の低抵抗値
を得ることが出来るため、接触抵抗などの影響を小さく
して低抵抗値の膜抵抗体の抵抗値トリミングを精度良く
行い、高精度の低抵抗値膜抵抗体を有する混成集積回路
基板を提供することが出来る。As described in detail, according to the present invention, a predetermined low resistance value can be obtained by converting low resistance value trimming into high resistance value trimming, thereby reducing the influence of contact resistance etc. By using this method, it is possible to precisely trim the resistance value of a low resistance value film resistor, and to provide a hybrid integrated circuit board having a highly accurate low resistance value film resistor.
第１図は本発明の一実施例による膜抵抗体のトリミング
方法を示す平面図である。
１１・・・・・・基板、１２・川・・配線導体、１３１
Ｌ。
１３ｂ 、 １３０ 、１３ｄ 、 １３６・山、、検
針ラント、１４１Ｌ、１４ｂ、１４０，１４ｄ、１４６
．川、、膜抵抗体、１５２Ｌ、１５ｂ、１５０，１６ｄ
、１６ｔｌＢ・・・・・・はんだブリッジまたは導電ペ
ースト。
代理人の氏名 弁理士 粟 野 重 孝 ほか１多部
図
１３ａ、ｒ３４．Ｉ３ｃ、Ｉ３ｄ、Ｉ３ｅ −−−Δα
嵐を火、 １４ｄ、脚−−−
蟇 叛
Ｗｊ！Ｗ 鼻 停
情針うソ
ｎ低抗俸FIG. 1 is a plan view showing a method for trimming a film resistor according to an embodiment of the present invention. 11... Board, 12... Wiring conductor, 131
L. 13b, 130, 13d, 136・mountain,, meter reading runt, 141L, 14b, 140, 14d, 146
．． Kawa,, membrane resistor, 152L, 15b, 150, 16d
, 16tlB...Solder bridge or conductive paste. Name of agent: Patent attorney Shigetaka Awano et al. Figure 13a, r34. I3c, I3d, I3e ---Δα
Fire the storm, 14d, legs --- Toad Rebellion Wj! W nose stationary needle lie n low resistance salary
Claims (1)
合成抵抗値により得られかつ、この２つ以上の膜抵抗体
が各々独立に抵抗値が側定可能なようにオープン箇所を
設けた抵抗回路を形成し、前記膜抵抗体の各々を設計抵
抗値にトリミングした後に、オープン箇所を短絡させ、
所定の合成抵抗値を得ることを特徴とする膜抵抗体のト
リミング方法。One resistance value on the circuit can be obtained by the combined resistance value of two or more membrane resistors in parallel, and open points are provided so that the resistance value of each of these two or more membrane resistors can be determined independently. After forming the provided resistance circuit and trimming each of the film resistors to the designed resistance value, short-circuiting the open points,
A method for trimming a membrane resistor, characterized by obtaining a predetermined combined resistance value.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1017969A JPH02198103A (en) | 1989-01-27 | 1989-01-27 | Trimming of film resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1017969A JPH02198103A (en) | 1989-01-27 | 1989-01-27 | Trimming of film resistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02198103A true JPH02198103A (en) | 1990-08-06 |
Family
ID=11958562
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1017969A Pending JPH02198103A (en) | 1989-01-27 | 1989-01-27 | Trimming of film resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02198103A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014045104A (en) * | 2012-08-28 | 2014-03-13 | Panasonic Corp | Manufacturing method of chip resistor |
| JP2017034289A (en) * | 2016-11-15 | 2017-02-09 | パナソニックＩｐマネジメント株式会社 | Method of manufacturing chip resistor |
-
1989
- 1989-01-27 JP JP1017969A patent/JPH02198103A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2014045104A (en) * | 2012-08-28 | 2014-03-13 | Panasonic Corp | Manufacturing method of chip resistor |
| JP2017034289A (en) * | 2016-11-15 | 2017-02-09 | パナソニックＩｐマネジメント株式会社 | Method of manufacturing chip resistor |
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