JPH0219777A - Instrument for measuring linearity error of a/d converter - Google Patents
Instrument for measuring linearity error of a/d converterInfo
- Publication number
- JPH0219777A JPH0219777A JP17070788A JP17070788A JPH0219777A JP H0219777 A JPH0219777 A JP H0219777A JP 17070788 A JP17070788 A JP 17070788A JP 17070788 A JP17070788 A JP 17070788A JP H0219777 A JPH0219777 A JP H0219777A
- Authority
- JP
- Japan
- Prior art keywords
- converter
- voltage
- resistors
- string
- reference voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000013139 quantization Methods 0.000 claims description 2
- 238000005259 measurement Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 5
- 238000001514 detection method Methods 0.000 description 2
- 238000004364 calculation method Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Testing Electric Properties And Detecting Electric Faults (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明はA−D変換器直線性誤差測定装置に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to an A-D converter linearity error measuring device.
従来のA−D変換器直線性誤差測定装置は、第2図の構
成図に示すように、アナログ入力端子5に可変の入力電
圧源14、基準電圧端子3,4にアナログ入力電圧の量
子化ステップの上限と下限を設定する低電位および高電
位基準電圧源9.10をそれぞれ接続している。電圧計
19は、アナログ入力端子5と接地電位との間の入力電
圧を測定するように構成される0、tな、複数のディジ
タル出力端子11.クロック端子12に対してそれぞれ
出力モニタ部17.クロック部18を接続している。一
方、A−D変換器l内には、抵抗列13で分割された各
ステップの基準電圧値電圧とアナログ信号を入力し、ア
ナログ信号の電圧が基準電圧に達した時点で検出信号を
出方する複数の電圧比較器8、および、複数の電圧比較
器8の検出出力を判断して符号化ディジタル信号を出力
モニタ部17に出力するディジタル変換器16を備えて
いる。A−D変換器の直線性誤差は出力符号の変化する
点における電圧計19により測定された入力電圧の値と
、対応するX段目の電圧7の設計基準電圧値とより算出
していた。The conventional A-D converter linearity error measuring device has a variable input voltage source 14 at the analog input terminal 5, and a quantized analog input voltage at the reference voltage terminals 3 and 4, as shown in the block diagram of FIG. Low potential and high potential reference voltage sources 9.10 are connected, respectively, for setting the upper and lower limits of the step. The voltmeter 19 has a plurality of digital output terminals 11.0, t configured to measure the input voltage between the analog input terminal 5 and ground potential. For each clock terminal 12, an output monitor section 17. A clock section 18 is connected. On the other hand, the analog signal and the reference voltage value of each step divided by the resistor array 13 are input into the A-D converter l, and a detection signal is output when the voltage of the analog signal reaches the reference voltage. and a digital converter 16 that judges the detection outputs of the plurality of voltage comparators 8 and outputs an encoded digital signal to an output monitor section 17. The linearity error of the A-D converter was calculated from the input voltage value measured by the voltmeter 19 at the point where the output sign changes and the design reference voltage value of the corresponding X-stage voltage 7.
上述した従来のA−D変換器直線性誤差測定装置におい
ては、入力電圧と基準電圧との間に関連は無く完全に独
立の電源から供給されている。したがって、測定中に基
準電圧源にドリフトが生じ、各電圧比較器8への基準電
圧が変動した場合、測定される入力電圧は基準電圧の変
化分だけの誤差を生じてしまい、正確な測定結果を得ら
れない欠点がある。特に高精度のA−D変換器を測定す
る時にはこの測定誤差によってA−D変換器本来の誤差
が測定不能となる事もある。一方、従来、正確な測定を
行うための手段として、基準電圧のドリフトを測定精度
に対し無視し得る値に抑圧する方法があるが実現に限度
がある。また、測定されるアナログ入力電圧が設計の許
°容値にあるかどうかを精度よく測定するためには、有
効桁数が充分に多い精密電圧計が必要となり、高価な測
定器を必要とする問題もある。In the conventional A-D converter linearity error measuring device described above, there is no relationship between the input voltage and the reference voltage, and the input voltage and the reference voltage are supplied from completely independent power sources. Therefore, if a drift occurs in the reference voltage source during measurement and the reference voltage to each voltage comparator 8 fluctuates, the measured input voltage will have an error equal to the change in the reference voltage, resulting in inaccurate measurement results. There is a drawback that it cannot be obtained. Particularly when measuring a high-precision A-D converter, this measurement error may make it impossible to measure the inherent error of the A-D converter. On the other hand, conventionally, as a means for performing accurate measurements, there is a method of suppressing the drift of the reference voltage to a value that can be ignored with respect to measurement accuracy, but there are limits to its implementation. In addition, in order to accurately measure whether the analog input voltage being measured is within the design tolerance, a precision voltmeter with a sufficiently large number of significant digits is required, which requires an expensive measuring device. There are also problems.
本発明の目的は基準電源の変動があっても正確な測定が
でき、かつ、高価な精密電圧計を必要としないA−D変
換器直線性誤差測定装置を提供することにある。SUMMARY OF THE INVENTION An object of the present invention is to provide an A-D converter linearity error measuring device that can perform accurate measurements even when there are fluctuations in the reference power source and does not require an expensive precision voltmeter.
本発明のA−D変換器直線性誤差測定装置は入力電圧の
変化に対する出力ディジタル信号の直線性を測定するA
−D変換器直線性誤差測定装置において、
測定されるA−D変換器の基準電圧用端子間に接続され
る、前記A−D変換器内の量子化のための基準電圧を生
成する抵抗列の設計値に等しい抵抗値を有する基準抵抗
列と、前記基準抵抗列の各抵抗接続点と前記A−D:変
換器の入力端子との間を切りかえて接続される電圧計と
を備え、前記A−り変換器の出力ディジタル信号が変化
した時点の入力電圧と前記基準抵抗列により生成された
対応する抵抗接続点の電圧間の電位差を測定する。The A-D converter linearity error measuring device of the present invention measures the linearity of an output digital signal with respect to changes in input voltage.
- In the D converter linearity error measuring device, a resistor string that is connected between reference voltage terminals of the A-D converter to be measured and that generates a reference voltage for quantization in the A-D converter. a reference resistor string having a resistance value equal to the design value of the reference resistor string; and a voltmeter connected alternately between each resistance connection point of the reference resistance string and the input terminal of the A-D converter; The potential difference between the input voltage at the time when the output digital signal of the A-reverse converter changes and the voltage at the corresponding resistor connection point generated by the reference resistor string is measured.
次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.
第1図は本発明の一実施例の構成図である。FIG. 1 is a block diagram of an embodiment of the present invention.
本実施例は、基準電圧端子3.4の間にA−D変換器1
の抵抗列13と同一の構成で量子化電圧を判定するため
に基準電圧を分割する設計の抵抗値の基準抵抗列2を接
続し、アナログ入力端子5と基準抵抗列2の各抵抗端子
との間に電圧計6を接続している。また、基準抵抗列2
の測定点は適宜移動できる。なお、従来例の電圧計19
に代り電圧計6が使用される。上記以外の構成は従来例
と同一の構成である。本実施例による測定装置において
は、低電位、高電位の基準電圧源9,10の電圧のドリ
フトによって生じる電圧比較器8の基準電圧、例えば、
X段目の電圧7の変動と同一の変動が外部の基準抵抗列
2のX段目の外部電圧15においても表われる。したが
って、出力モニタ部17の変化点におけるアナログ入力
端子5とX段目の外部電圧15に相当する抵抗接続端子
との間にて測定している被測定電位には基準電圧のドリ
フトの影響は出ない、ここで、測定されたX段目におけ
る電圧計6の指示値は基準電圧源変動を含まないX段目
の設計電圧値との偏差つまり、誤差を直接表わしている
。In this embodiment, the A-D converter 1 is connected between the reference voltage terminals 3 and 4.
Connect the reference resistor array 2 with the same configuration as the resistor array 13 with the resistance value designed to divide the reference voltage in order to determine the quantized voltage, and connect the analog input terminal 5 and each resistor terminal of the reference resistor array 2. A voltmeter 6 is connected between them. In addition, the reference resistance string 2
The measurement point can be moved as appropriate. In addition, the conventional voltmeter 19
A voltmeter 6 is used instead. The configuration other than the above is the same as the conventional example. In the measuring device according to this embodiment, the reference voltage of the voltage comparator 8 caused by the voltage drift of the low potential and high potential reference voltage sources 9 and 10, for example,
The same fluctuation as that of the X-th stage voltage 7 appears in the X-th stage external voltage 15 of the external reference resistor array 2. Therefore, the potential to be measured between the analog input terminal 5 at the change point of the output monitor section 17 and the resistance connection terminal corresponding to the X-stage external voltage 15 is not affected by the drift of the reference voltage. Here, the measured value indicated by the voltmeter 6 at the X-th stage directly represents the deviation from the design voltage value at the X-th stage, which does not include fluctuations in the reference voltage source, that is, the error.
このようにA−D変換器内の量子化電圧を生成する各ス
テップ電圧の設計値からの偏差のみであれば、従来のよ
うに入力電圧を測定する電圧計19は不要であり、かつ
、設計値と入力測定値との算定を行うことなしにA−D
変換器の直線性誤差を直接測定できる。In this way, if there is only a deviation from the design value of each step voltage that generates the quantized voltage in the A-D converter, there is no need for the voltmeter 19 that measures the input voltage as in the past, and the design A-D without performing calculations between values and input measurements.
The linearity error of the converter can be directly measured.
以上説明したように本発明によれば、被測定入力電圧に
対し、基準電圧のドリフトの影響を除去でき、測定精度
を向上できる効果があ′る。また、従来対接地間で測定
していた入力電圧計重こ比べ直線性誤差電圧の測定なの
ではるかに小さな値となり、有効桁数の少ない電圧計で
測定が可能であり測定装置を安価に構成できる効果もあ
る。As described above, according to the present invention, it is possible to remove the influence of the drift of the reference voltage on the input voltage to be measured, and the measurement accuracy can be improved. In addition, since it measures the linearity error voltage compared to the conventional input voltmeter that measures between ground and ground, the value is much smaller, and it can be measured with a voltmeter with a small number of effective digits, making it possible to configure the measuring device at a low cost. It's also effective.
第1図は本発明の一実施例の構成図、第2図は従来のA
−D変換器直線性誤差測定装置の構成図である。
1・・・A−D変換器、2・・・基準抵抗列、3.4・
・・基準電圧端子、5・・・アナログ入力端子、6・・
・電圧計、7・・・X段目の電圧、8・・・電圧比較器
、9・・・低電位基準電圧源、10・・・高電位基準電
圧源、11・・・ディジタル出力端子、12・・・タロ
ツク端子、13・・・抵抗例、14・・・入力電源、1
5・・・X段目の外部電圧、16・・・ディジタル変換
器、17・・・出力モ二タ部、18・・・クロック部、
1つ・・・電圧計、20・・電源。FIG. 1 is a configuration diagram of an embodiment of the present invention, and FIG. 2 is a diagram of a conventional A.
- It is a block diagram of a D converter linearity error measuring device. DESCRIPTION OF SYMBOLS 1...A-D converter, 2...Reference resistance string, 3.4.
...Reference voltage terminal, 5...Analog input terminal, 6...
・Voltmeter, 7... X-stage voltage, 8... Voltage comparator, 9... Low potential reference voltage source, 10... High potential reference voltage source, 11... Digital output terminal, 12...Tarlock terminal, 13...Resistance example, 14...Input power supply, 1
5...X-stage external voltage, 16...Digital converter, 17...Output monitor section, 18...Clock section,
1...voltmeter, 20...power supply.
Claims (1)
測定するA−D変換器直線性誤差測定装置において、 測定されるA−D変換器の基準電圧用端子間に接続され
る、前記A−D変換器内の量子化のための基準電圧を生
成する抵抗列の設計値に等しい抵抗値を有する基準抵抗
列と、前記基準抵抗列の各抵抗接続点と前記A−D変換
器の入力端子との間を切りかえて接続される電圧計とを
備え、前記A−D変換器の出力ディジタル信号が変化し
た時点の入力電圧と前記基準抵抗列により生成された対
応する抵抗接続点の電圧間の電位差を測定することを特
徴とするA−D変換器直線性誤差測定装置。[Claims] In an A-D converter linearity error measuring device that measures the linearity of an output digital signal with respect to changes in input voltage, the device is connected between reference voltage terminals of the A-D converter to be measured. , a reference resistance string having a resistance value equal to the design value of a resistance string that generates a reference voltage for quantization in the A-D converter, and each resistance connection point of the reference resistance string and the A-D converter. a voltmeter connected to the input terminal of the A-D converter, the input voltage at the time when the output digital signal of the A-D converter changes and the corresponding resistance connection point generated by the reference resistor string; An A-D converter linearity error measuring device, characterized in that it measures a potential difference between voltages.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17070788A JPH0219777A (en) | 1988-07-07 | 1988-07-07 | Instrument for measuring linearity error of a/d converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17070788A JPH0219777A (en) | 1988-07-07 | 1988-07-07 | Instrument for measuring linearity error of a/d converter |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0219777A true JPH0219777A (en) | 1990-01-23 |
Family
ID=15909906
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17070788A Pending JPH0219777A (en) | 1988-07-07 | 1988-07-07 | Instrument for measuring linearity error of a/d converter |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0219777A (en) |
-
1988
- 1988-07-07 JP JP17070788A patent/JPH0219777A/en active Pending
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