JPH0219008A - Microwave transistor - Google Patents

Microwave transistor

Info

Publication number
JPH0219008A
JPH0219008A JP16960588A JP16960588A JPH0219008A JP H0219008 A JPH0219008 A JP H0219008A JP 16960588 A JP16960588 A JP 16960588A JP 16960588 A JP16960588 A JP 16960588A JP H0219008 A JPH0219008 A JP H0219008A
Authority
JP
Japan
Prior art keywords
fet
matching circuit
chip
electrode
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16960588A
Other languages
Japanese (ja)
Inventor
Tetsuo Mori
哲郎 森
Masahide Yamauchi
山内 眞英
Yoshinobu Kadowaki
門脇 好伸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP16960588A priority Critical patent/JPH0219008A/en
Publication of JPH0219008A publication Critical patent/JPH0219008A/en
Pending legal-status Critical Current

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  • Microwave Amplifiers (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To obtain a small sized microwave amplifier offering ease of assembling by constituting two transistors(TRs) to one chip and arranging an input electrode of the one TR to the same one side of the chip and an output electrode of the other TR. CONSTITUTION:Two GaAs MES FETs, that is, FET-A13 and FET-B14 are formed to a GaAs MES FET chip main body 12. Furthermore, a gate electrode 2A of the FET-A13, a drain electrode 3B of the FET-B14, a gate electrode 2B of the FET-B14, and a drain electrode 3A of the FET-A13 are arranged to the end face of the same size of the GaAs MES FET chip main body 12. Then an input matching circuit 6 of the FET-A13 and an output matching circuit 8 of the FET-B14 are patterned on one and same board in an input/ output matching circuit 15. Thus, an inexpensive microwave amplifier with small size and ease of assembling is obtained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 こノ発明に、マイクロ波帯で動作するトランジスタのチ
ップパターンに関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a chip pattern of a transistor operating in a microwave band.

〔従来の技術〕[Conventional technology]

第4図は、従来のマイクロ波帯で動作するガリウム砒素
メタルセミコンダクタ電界効果トランジスタ(以下Ga
Aa MES FETと称す)チップのパターン図、第
5図は従来のGmA@MES FETを用いたマイクロ
波2段増幅器の一例を示すパターン図である(バイアス
回路パターンを省略しである)。
Figure 4 shows a conventional gallium arsenide metal semiconductor field effect transistor (hereinafter referred to as Ga) that operates in the microwave band.
FIG. 5 is a pattern diagram showing an example of a microwave two-stage amplifier using a conventional GmA@MES FET (the bias circuit pattern is omitted).

図において、 fil t! GaA−半導体で構成さ
れるGaAsMESFBTチップ本体、(21はゲート
電極、(3)はドレイン電極、(41はソース電極、(
5)はソース電極(4)を裏面のアース電極に接続する
ためのスルーホール、(6)は入力整合回路、(7)は
段間の整合回路、(8)は出力整合回路、(9)に1段
目のGmAs MES FETのドレイン電極と2段目
のGaAs FETのゲート電極の6各に印加されるバ
イアス電圧を分離するDCカットコンデンサ、+101
 H金ワイヤ、 (IllはGaAs MES FET
本体tl+及び入力整合回路(6)2段関整合回路(7
)、出力整合回路(8)を接地するための接地基板であ
る。
In the figure, fil t! A GaAs MESFBT chip body composed of a GaA-semiconductor, (21 is a gate electrode, (3) is a drain electrode, (41 is a source electrode, (
5) is a through hole for connecting the source electrode (4) to the ground electrode on the back side, (6) is an input matching circuit, (7) is a matching circuit between stages, (8) is an output matching circuit, (9) A DC cut capacitor, +101, is used to separate the bias voltage applied to each of the drain electrode of the first-stage GmAs MES FET and the gate electrode of the second-stage GaAs FET.
H gold wire, (Ill is GaAs MES FET
Main body tl+ and input matching circuit (6) 2-stage matching circuit (7
), which is a grounding board for grounding the output matching circuit (8).

なお、入力整合回路(6)9段間整合回路(7)、出力
整合回路(8)ハアルミナセラミック基板等の誘電体基
板上に、金等の導体をパターニングしたものである。
The input matching circuit (6), the nine-stage matching circuit (7), and the output matching circuit (8) are formed by patterning a conductor such as gold on a dielectric substrate such as a halumina ceramic substrate.

次に動作について説明する。Next, the operation will be explained.

第4図で示されるGaAs MES FETチップ本体
fi+では、ドレイン電極(3)とソース電極(4)と
の間に電流が流れ、ショットキバリア接合のゲート電極
(2)による空乏層て、この電流がコントロールされる
ので増幅作用が得られる。
In the GaAs MES FET chip body fi+ shown in Fig. 4, a current flows between the drain electrode (3) and the source electrode (4), and this current flows through the depletion layer formed by the gate electrode (2) of the Schottky barrier junction. Since it is controlled, an amplification effect can be obtained.

ただし、qIJA図で示されるG5A1 MES FE
Tでマイクロ波帯の増幅器を構成する場合、入力信号が
、GaA龜Mgs FETで反射されずに効率よく増幅
するためには整合回路が必要で、第5図に示すごとく入
力整合回路(6)1段間整合回路(7)、出力整合回路
+81 tl−設ける。
However, G5A1 MES FE shown in the qIJA diagram
When configuring a microwave band amplifier using T, a matching circuit is required in order to efficiently amplify the input signal without being reflected by the GaA/Mgs FET, and as shown in Figure 5, an input matching circuit (6) is required. An inter-stage matching circuit (7) and an output matching circuit +81 tl- are provided.

〔発明が解決しようとするl!16) 従来のマイクロ波帯で動作するGaA魯MES FET
の利得は比較的小さいので、多くのGmAs MIC5
FETを縦続接続して用いているが、各々のGmA@M
ES FETの入力部に整合回路が必要であるので、上
記増幅器の形状が大きくなるという欠点があった。また
、整合回路をパターニングした誘電体基板を多く用いる
ので、組立が複雑になり、かつ高価になるという問題点
があつ之。
[What the invention attempts to solve! 16) GaA MES FET operating in conventional microwave band
Since the gain of MIC5 is relatively small, many GmAs MIC5
FETs are used in cascade connection, but each GmA@M
Since a matching circuit is required at the input section of the ES FET, there is a drawback that the size of the amplifier becomes large. Furthermore, since many dielectric substrates patterned with matching circuits are used, assembly becomes complicated and expensive.

この発明は、上記のような問題点を解消するためになさ
れたもので、小型で組立が容易、かつ安価なマイクロ波
増幅器全構成できるマイクロ波トランジスタ?得ること
を目的とする。
This invention was made to solve the above-mentioned problems. It is a small, easy to assemble, and inexpensive microwave transistor that can be used to configure a complete microwave amplifier. The purpose is to obtain.

〔課l!J!を解決するための手段〕[Lesson l! J! [Means to solve]

この発明に係るマイクロ波トランジスタハ、1つのチッ
プに2つのトランジスタが構成され、1つのトランジス
タの入力電極と他のトランジスタの出力電極がチップの
同じ片側に配置されたものである。
The microwave transistor according to the present invention includes two transistors on one chip, and the input electrode of one transistor and the output electrode of the other transistor are arranged on the same side of the chip.

〔作用〕[Effect]

この発明におけるマイクロ波トランジスタでは、1つの
トランジスタの入力電極と別のトランジスタの出力電極
がチップの同じ片側に配置されているので、多段増幅器
の入出力整合回路及び段間の整合回路が2つの基板で構
成できる。
In the microwave transistor according to the present invention, the input electrode of one transistor and the output electrode of another transistor are arranged on the same side of the chip, so that the input/output matching circuit of the multistage amplifier and the matching circuit between stages are formed on two substrates. It can be composed of

〔実施例〕〔Example〕

以下、この発明の一実施例全図について説明する。第1
図はマイクロ波帯で動作するGaAa MESFETチ
ップのパターン図、1fJ2図は9J1図のGaA a
MES FETを用いたマイクロ波増幅器の他の実施例
を示すパターン図である。図において、 ill e 
tit〜Htry tri 4 l&及び第5図の従来
例に示し次ものと同等であるので説明の重複を避ける。
DESCRIPTION OF THE PREFERRED EMBODIMENTS The entire drawings of an embodiment of the present invention will be described below. 1st
The figure is a pattern diagram of a GaAa MESFET chip that operates in the microwave band, and the 1fJ2 figure is a GaAa MESFET chip pattern diagram of 9J1 figure.
FIG. 7 is a pattern diagram showing another example of a microwave amplifier using MES FETs. In the figure, ill e
Tit~Htry tri 4 l & is shown in the conventional example of FIG. 5 and is equivalent to the following, so redundant explanation will be avoided.

021はこの発明のGaAs MES FETチップ本
体であり、GaAs MES FETチップ本体(目に
はJ@1図の点線で囲んである2つのG5As MES
 FETすなわち、FET−A C131とFET−8
04が構成されている。また、GsAa MES FE
Tチップ本体α2の各同じ側の端面には、FET−A 
C131のゲート電極(2人)とpar−a (141
のドレイン電極(3B)、及びPET−B Q41のゲ
ート電極(2B)とFET−AQ国のドレイン電極(3
A)が配置されている。彌は入出力整合回路であり、F
ET−A 輪の人力整合回路(61とPET−B 04
)の出力整合回路(8)が同一基板にパターニングされ
ている。(lntiインダクタンス、θ7)にコンデン
サである。
021 is the GaAs MES FET chip body of this invention, and the GaAs MES FET chip body (the two G5As MES surrounded by the dotted line in Figure J@1)
FET i.e. FET-A C131 and FET-8
04 is configured. Also, GsAa MES FE
FET-A is installed on the end face of each same side of the T-chip body α2.
C131 gate electrode (2 people) and par-a (141
drain electrode (3B), and gate electrode (2B) of PET-B Q41 and drain electrode (3B) of FET-AQ country.
A) is located. Ya is an input/output matching circuit, and F
ET-A wheel manual matching circuit (61 and PET-B 04
) is patterned on the same substrate. (lnti inductance, θ7) is a capacitor.

次に動作について説明する。Next, the operation will be explained.

9f;2図で示し比マイクロ波増幅器は、従来例の第5
図で示したマイクロ波増幅器と全く同じ構成(2つのG
5As ME、S FETと入出力整合回路パターン及
び股間整合回路パターン)となっていをので、従来と同
一の原理でマイクロ波信号を増幅することができる。た
だし、この発明のGsAa MES FETケ用いたマ
イクロ波増幅器では、 1、入出力整合回路051のパターンが1つの基板上で
構成できる。
9f: The ratio microwave amplifier shown in Fig. 2 is the fifth conventional example.
Exactly the same configuration as the microwave amplifier shown in the figure (two G
5As ME, S FET, input/output matching circuit pattern, and crotch matching circuit pattern), the microwave signal can be amplified using the same principle as the conventional one. However, in the microwave amplifier using the GsAa MES FET of the present invention: 1. The pattern of the input/output matching circuit 051 can be constructed on one substrate.

2.1つのGaAa MES FETチップ本健a−に
2つのMES FET スナわちFET−A H及びF
ET−B 04) カ構成されているので、アセンブリ
が容易でかつ増幅器が小型化できる。
2. One GaAa MES FET chip A- and two MES FET Snap FET-A H and F
ET-B 04) Since the amplifier is configured in a single configuration, assembly is easy and the amplifier can be miniaturized.

という利点がある。There is an advantage.

@3図において、FET−BO2)のドレインを櫃(3
B)からFET−A (131のゲート電極(2A)へ
の帰還回路を構成しており、Q頓にインダクタ、a7)
はキャパシタである。帰還回路を付けることで、増幅器
の利得の平坦性の改善及び増幅帯域の拡大が可能である
が、この発明のGaAa MES FET f用いるこ
とで、整合回路基板を新たに追加することなく、パター
ンを変更することで帰還型マイクロ波増幅器が構成でき
る。
In Figure @3, connect the drain of FET-BO2) to the
B) to FET-A (constitutes a feedback circuit to the gate electrode (2A) of 131, and inductor, a7)
is a capacitor. By adding a feedback circuit, it is possible to improve the flatness of the gain of the amplifier and expand the amplification band, but by using the GaAa MES FET f of this invention, the pattern can be changed without adding a new matching circuit board. By changing it, a feedback type microwave amplifier can be constructed.

なお、上記実施例では、マイクロ波トランジスタとして
GaAs MES FETの場合について説明したが、
バイポーラ接合型トランジスタでもよい。また、上記実
施例では、2段トランジスタ増幅器について説明し念が
、3段、4段等の多段トランジスタ増幅器においても、
1つのチップの同じ片側にゲート電極及びドレイン電極
全交互にそれぞれ3個及び4個並べることで同様の効果
がある。
Note that in the above embodiment, the case where a GaAs MES FET was used as the microwave transistor was explained.
A bipolar junction transistor may also be used. In addition, although the above embodiment describes a two-stage transistor amplifier, it is also possible to use a multi-stage transistor amplifier such as a three-stage or four-stage transistor amplifier.
A similar effect can be obtained by arranging three and four gate electrodes and four drain electrodes alternately on the same side of one chip.

〔発明の効果〕〔Effect of the invention〕

以上のようにこの発明によれば、1つのチップに2つの
トランジスタを構成し、チップの同じ片側VC1つのト
ランジスタの入力電極と、他のトランジスタの出力電極
とを配置したので、小型で組立の容易なマイクロ波増幅
器が得られる効果がある。
As described above, according to the present invention, two transistors are configured on one chip, and the input electrode of one transistor and the output electrode of the other transistor are arranged on the same side of the chip, so it is small and easy to assemble. This has the effect of providing a microwave amplifier with a high quality.

【図面の簡単な説明】[Brief explanation of drawings]

Wr1図は、この発明の一実施例によるGaA@MES
FETチップのパターン図、第2図はこの発明のGmA
s MES FETを用い九マイクロ波増幅器の一実施
例のパターン図、第3図はこの発明のGaA@MESF
ETI用い念マイクロ波増幅器の他の実施例のパターン
図、4PJA図は従来のGaAs MES FETチッ
プのパターン図、第5図は従来のGaA@MES FE
Tを用いたマイクロ波増幅器の一例を示すパターン図で
ある。 図において、(2a)(2b) 11ゲート電極、(3
1)(3b)はドレイン電極、(4)はソース電極、(
5)はスルーホール、(6)は入力整合回路、(7)は
股間整合回路、(8)は出力整合回路、+91HDCカ
ツトコンデンサ、tlO+は金ワイヤ、(11)は接地
基板、αりはGaAa MES FETチップ本体、(
131i FET−A 、α4はFET−B %d51
f’!入出力整合回路、omaインダクタ、(Iηにキ
ャパシタである。 なお、図中、同一符号に同一、又は相当部分?示す。
Wr1 diagram shows GaA@MES according to an embodiment of the present invention.
The pattern diagram of the FET chip, Figure 2, shows the GmA of this invention.
s A pattern diagram of an embodiment of a microwave amplifier using MES FET, Figure 3 is a GaA@MESF of this invention.
A pattern diagram of another embodiment of an ETI-based microwave amplifier, 4PJA diagram is a pattern diagram of a conventional GaAs MES FET chip, and Fig. 5 is a pattern diagram of a conventional GaAs MES FET chip.
It is a pattern diagram which shows an example of the microwave amplifier using T. In the figure, (2a) (2b) 11 gate electrodes, (3
1) (3b) is the drain electrode, (4) is the source electrode, (
5) is a through hole, (6) is an input matching circuit, (7) is a crotch matching circuit, (8) is an output matching circuit, +91 HDC cut capacitor, tlO+ is a gold wire, (11) is a grounding board, α is GaAa MES FET chip body, (
131i FET-A, α4 is FET-B %d51
f'! Input/output matching circuit, oma inductor, (Iη is a capacitor. In the figure, the same reference numerals indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】[Claims] 1つのチップに、2つ以上のマイクロ波トランジスタを
形成し、チップの片側に1つのトランジスタの入力電極
と他のもう1つのトランジスタの出力電極を交互に配置
したことを特徴とするマイクロ波トランジスタ。
A microwave transistor characterized in that two or more microwave transistors are formed on one chip, and the input electrode of one transistor and the output electrode of another transistor are alternately arranged on one side of the chip.
JP16960588A 1988-07-07 1988-07-07 Microwave transistor Pending JPH0219008A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16960588A JPH0219008A (en) 1988-07-07 1988-07-07 Microwave transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16960588A JPH0219008A (en) 1988-07-07 1988-07-07 Microwave transistor

Publications (1)

Publication Number Publication Date
JPH0219008A true JPH0219008A (en) 1990-01-23

Family

ID=15889595

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16960588A Pending JPH0219008A (en) 1988-07-07 1988-07-07 Microwave transistor

Country Status (1)

Country Link
JP (1) JPH0219008A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11154837A (en) * 1997-09-18 1999-06-08 Sanyo Electric Co Ltd Semiconductor device, semiconductor integrated circuit and high frequency processing circuit
WO2005055418A1 (en) * 2003-12-05 2005-06-16 Murata Manufacturing Co., Ltd. High-frequency amplifier and high-frequency radio communication device
JP2008228347A (en) * 2008-05-26 2008-09-25 Renesas Technology Corp High-frequency power amplifier module
JP2011066380A (en) * 2009-08-21 2011-03-31 Toshiba Corp High frequency circuit having multi-chip module structure

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11154837A (en) * 1997-09-18 1999-06-08 Sanyo Electric Co Ltd Semiconductor device, semiconductor integrated circuit and high frequency processing circuit
WO2005055418A1 (en) * 2003-12-05 2005-06-16 Murata Manufacturing Co., Ltd. High-frequency amplifier and high-frequency radio communication device
GB2423417A (en) * 2003-12-05 2006-08-23 Murata Manufacturing Co High-Frequency Amplifier And High-Frequency Radio Communication Device
GB2423417B (en) * 2003-12-05 2007-10-10 Murata Manufacturing Co High-Frequency Amplifier And High-Frequency Radio Communication Device
JP2008228347A (en) * 2008-05-26 2008-09-25 Renesas Technology Corp High-frequency power amplifier module
JP2011066380A (en) * 2009-08-21 2011-03-31 Toshiba Corp High frequency circuit having multi-chip module structure
US8345434B2 (en) 2009-08-21 2013-01-01 Kabushiki Kaisha Toshiba High frequency circuit having multi-chip module structure

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